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>4. CPU/FPU</H1
><P
> Please see <A
HREF="intro.html#ARCH"
>this note</A
> for more on non-x86
hardware.
</P
><DIV
CLASS="SECT2"
><H2
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><A
NAME="AEN414"
></A
>4.1. Intel</H2
><P
> Intel 386SX/DX/SL, 486SX/DX/SL/SX2/DX2/DX4, Pentium, Pentium Pro,
Pentium II, Pentium III (regular and Xeon versions), Pentium 4,
and Celeron (including mobile versions of all of the above) are
all supported.
</P
></DIV
><DIV
CLASS="SECT2"
><H2
CLASS="SECT2"
><A
NAME="AEN417"
></A
>4.2. AMD</H2
><P
> AMD 386SX/DX, 486SX/DX/DX2/DX4, K5, K6, K6-2, K6-3, and Athlon (all
varieties, including MP) are all supported. Older versions of K6
should be avoided as they are buggy. Setting "internal cache"
disabled in bios setup can be a workaround. Some early K6-2 300Mhz
have problems with the system chips.
</P
><P
> AMD's 64-bit Opteron and Athlon64 processors, as well as the mobile
Athlon64 (or Turion64), are also supported, running either in
32-bit or 64-bit mode. For 32-bit mode, compile a kernel for i386,
optionally optimized for Athlons, since that's essentially what
these processors look like in 32-bit mode. For 64-bit mode,
compile a kernel for
<A
HREF="http://www.x86-64.org/"
TARGET="_top"
>x86_64</A
>. It will still
run 32-bit binaries, assuming all the appropriate libraries are
available. Opteron and Athlon64 systems use standard PC hardware,
so the information in this HOWTO still applies.
</P
><P
> The old NexGen processors are also supported.
</P
><P
> A few very early AMD 486DX's may hang in some special situations. All
current chips should be okay and getting a chip swap for old CPU's
should not be a problem.
</P
></DIV
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><H2
CLASS="SECT2"
><A
NAME="AEN424"
></A
>4.3. Cyrix</H2
><P
> Cyrix 386SX/DX, 486SX/DX, 5x86, 6x86, and MediaGX are all supported.
</P
><P
> <P
></P
><UL
><LI
><P
> <A
HREF="ftp://ftp.ibiblio.org/pub/Linux/kernel/patches/CxPatch030.tar.z"
TARGET="_top"
> enable cache on Cyrix processors</A
>
</P
></LI
><LI
><P
> <A
HREF="ftp://ftp.ibiblio.org/pub/Linux/kernel/patches/linux.cxpatch"
TARGET="_top"
> Cyrix software cache control</A
>
</P
></LI
><LI
><P
> <A
HREF="ftp://ftp.ibiblio.org/pub/Linux/kernel/patches/cx5x86mod_1.0c.tgz"
TARGET="_top"
> Cyrix 5x86 CPU register settings</A
>
</P
></LI
></UL
>
</P
></DIV
><DIV
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><H2
CLASS="SECT2"
><A
NAME="AEN438"
></A
>4.4. IDT</H2
><P
> <A
HREF="http://www.winchip.com/"
TARGET="_top"
>IDT Winchip</A
>
C6-PSME2006A processors are supported under Linux.
</P
></DIV
><DIV
CLASS="SECT2"
><H2
CLASS="SECT2"
><A
NAME="AEN442"
></A
>4.5. Transmeta</H2
><P
> The Transmeta
<A
HREF="http://www.transmeta.com/"
TARGET="_top"
>Crusoe</A
>
processors are supported.
</P
></DIV
><DIV
CLASS="SECT2"
><H2
CLASS="SECT2"
><A
NAME="AEN446"
></A
>4.6. Misc. notes</H2
><P
> Linux has built-in FPU emulation if you don't have a math coprocessor.
</P
><P
> Linux supports SMP (multiple CPUs) in all 2.x kernels. See the
<A
HREF="http://www.tldp.org/HOWTO/SMP-HOWTO.html"
TARGET="_top"
>Linux SMP
HOWTO</A
> for more information.
</P
><P
> ULSI Math*Co series has a bug in the FSAVE and FRSTOR instructions that
causes problems with all protected mode operating systems. Some older
IIT and Cyrix chips may also have this problem.
</P
><P
> There are problems with TLB flushing in UMC U5S chips in very old
kernels. (1.1.x)
</P
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