Name:          vhd2vl
Version:       2.3
Release:       1%{?dist}
Summary:       VHDL to Verilog translator

License:       GPLv2+
Group:         Applications/Engineering
Url:           http://doolittle.icarus.com/~larry/%{name}/

Source0:       http://doolittle.icarus.com/~larry/%{name}/%{name}-%{version}.tar.gz

BuildRoot:     %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)

BuildRequires: flex bison


%description
vhd2vl is a VHDL to Verilog translation program.
It targets the translation of synthetisable RTL.
While far from complete it supports a useful
subset of VHDL, sufficient for complex designs.


%prep
%setup -q


%{__sed} -i "s|gcc -Wall|gcc %{optflags}|" src/makefile


%build
%{__make} %{?_smp_mflags} -C src


%install
%{__rm} -rf %{buildroot}

%{__mkdir} -p %{buildroot}%{_bindir}
%{__install} -pm 755 src/%{name} %{buildroot}%{_bindir}


%clean
%{__rm} -rf %{buildroot}


%files
%defattr(-,root,root)
%{_bindir}/%{name}
%doc README.txt GPLv2.txt changes
%doc examples translated_examples/


%changelog
* Mon Jul 12 2010 Chitlesh Goorah <chitlesh [AT] fedoraproject DOT org> 2.3-1
- New upstream release

* Sun Nov 29 2009 Chitlesh Goorah <chitlesh [AT] fedoraproject DOT org> 2.2-1
- New upstream release

* Sun Jul 26 2009 Fedora Release Engineering <rel-eng@lists.fedoraproject.org> - 2.0-5
- Rebuilt for https://fedoraproject.org/wiki/Fedora_12_Mass_Rebuild

* Wed Feb 25 2009 Fedora Release Engineering <rel-eng@lists.fedoraproject.org> - 2.0-4
- Rebuilt for https://fedoraproject.org/wiki/Fedora_11_Mass_Rebuild

* Mon Dec 15 2008 Chitlesh Goorah <chitlesh [AT] fedoraproject DOT org> 2.0-3
- fix for bison 2.4-2.fc11

* Sun Dec 14 2008 Chitlesh Goorah <chitlesh [AT] fedoraproject DOT org> 2.0-2
- enabled parallel build

* Sat Dec 06 2008 Chitlesh Goorah <chitlesh [AT] fedoraproject DOT org> 2.0-1
- Initial package for fedora