%{!?python_sitelib: %global python_sitelib %(%{__python} -c "from distutils.sysconfig import get_python_lib; print get_python_lib()")} Name: python-myhdl Version: 0.7 Release: 1%{?dist} Summary: A python hardware description and verification language Group: Applications/Engineering License: LGPLv2+ URL: http://myhdl.org Source0: http://downloads.sourceforge.net/myhdl/myhdl-%{version}.tar.gz BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n) BuildArch: noarch BuildRequires: python2-devel %description %{name} is a Python hardware description and verification language that helps you go from Python to silicon. MyHDL code can be converted to Verilog and VHDL. It can also be used to convert signals, do co-simulation with Verilog, generating test benches with test vectors for VHDL, Verilog and supports viewing waveform by tracing signal changes in a VCD file. %prep %setup -q -n myhdl-%{version} find -name '*.txt' | xargs chmod -x find -name '*.py' | xargs sed -i '1s|^#!python|#!%{__python}|' %build %{__python} setup.py build %install rm -rf %{buildroot} %{__python} setup.py install --skip-build --root %{buildroot} %clean rm -rf %{buildroot} %files %defattr(-,root,root,-) %doc CHANGELOG.txt CHANGES.txt LICENSE.txt README.txt example %{python_sitelib}/* %changelog * Sun Jun 05 2011 Shakthi Kannan <shakthimaan [AT] fedoraproject DOT org> - 0.7-1 - Initial package.