v 20031011 1 C 38100 43600 1 0 0 gnd-1.sym C 35500 43500 1 90 0 switcap-switch-1.sym { T 35700 43700 5 10 1 1 90 0 1 clock=#CLK1 T 35200 43600 5 10 1 1 90 0 1 refdes=S2 } C 34100 43400 1 90 0 switcap-vsrc-1.sym { T 33600 43700 5 10 1 1 90 0 1 refdes=V1 } N 38200 43900 38200 44200 4 N 38200 44200 38500 44200 4 C 33800 42800 1 0 0 gnd-1.sym N 33900 43100 33900 43400 4 N 33900 44300 33900 44600 4 N 33900 44600 34400 44600 4 C 34400 44400 1 0 0 switcap-switch-1.sym { T 34600 44200 5 10 1 1 0 0 1 clock=CLK1 T 34500 44700 5 10 1 1 0 0 1 refdes=S1 } N 35200 44600 35500 44600 4 C 36700 43500 1 90 0 switcap-switch-1.sym { T 36900 43700 5 10 1 1 90 0 1 clock=CLK1 T 36400 43600 5 10 1 1 90 0 1 refdes=S3 } C 35200 42900 1 0 0 gnd-1.sym N 35300 43200 35300 43500 4 C 36400 42900 1 0 0 gnd-1.sym N 36500 43200 36500 43500 4 N 36500 44300 36500 44600 4 N 37900 46000 39000 46000 4 N 39900 46000 40800 46000 4 N 35300 44300 35300 44600 4 C 38500 44900 1 180 1 switcap-vcvs-3.sym { T 39200 44100 5 12 1 1 180 6 1 refdes=E1 T 38750 44550 5 12 1 1 180 6 1 gain=2.3e5 } N 39900 44400 40800 44400 4 { T 40300 44500 5 10 1 1 0 0 1 netname=OUT } C 35500 44400 1 0 0 switcap-capacitor-1.sym { T 36100 44700 5 10 1 1 0 0 1 refdes=C1 T 36100 44400 5 10 1 1 0 0 1 value=1.0 } C 39000 45800 1 0 0 switcap-capacitor-1.sym { T 39600 46100 5 10 1 1 0 0 1 refdes=C2 T 39600 45800 5 10 1 1 0 0 1 value=1.0 } C 32700 40900 0 0 0 title-A.sym C 36800 44400 1 0 0 switcap-switch-1.sym { T 37000 44200 5 10 1 1 0 0 1 clock=#CLK1 T 36900 44700 5 10 1 1 0 0 1 refdes=S4 } N 36400 44600 36800 44600 4 N 37600 44600 38500 44600 4 C 39000 47000 1 0 0 switcap-capacitor-1.sym { T 39600 47300 5 10 1 1 0 0 1 refdes=C3 T 39600 47000 5 10 1 1 0 0 1 value=0.2 } C 38100 46200 1 90 0 switcap-switch-1.sym { T 38300 46400 5 10 1 1 90 0 1 clock=CLK1 T 37800 46300 5 10 1 1 90 0 1 refdes=S5 } C 41000 46200 1 90 0 switcap-switch-1.sym { T 41200 46400 5 10 1 1 90 0 1 clock=CLK1 T 40700 46300 5 10 1 1 90 0 1 refdes=S6 } C 41000 47600 1 90 0 switcap-switch-1.sym { T 41200 47800 5 10 1 1 90 0 1 clock=#CLK1 T 40700 47700 5 10 1 1 90 0 1 refdes=S8 } C 38100 47600 1 90 0 switcap-switch-1.sym { T 38300 47800 5 10 1 1 90 0 1 clock=#CLK1 T 37800 47700 5 10 1 1 90 0 1 refdes=S7 } C 36900 48000 1 0 0 gnd-1.sym N 37000 48300 37000 48600 4 N 37000 48600 40800 48600 4 N 40800 48600 40800 48400 4 N 37900 48400 37900 48600 4 N 37900 47600 37900 47000 4 N 39000 47200 37900 47200 4 N 40800 47600 40800 47000 4 N 39900 47200 40800 47200 4 N 40800 44400 40800 46200 4 N 37900 44600 37900 46200 4