From: Bhavna Sarathy <bnagendr@redhat.com>
Date: Wed, 25 Aug 2010 15:55:39 -0400
Subject: [xen] add support for dom0 to access APERF/MPERF for AMD
Message-id: <20100825160133.6821.73948.sendpatchset@localhost.localdomain>
Patchwork-id: 27810
O-Subject: [RHEL5.6 XEN PATCH] Add suport for dom0 to access APERF/MPERF for AMD
Bugzilla: 568772
RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
RH-Acked-by: Andrew Jones <drjones@redhat.com>

Resolves BZ 568772

Starting with family 0x10, model 10 processors, the Effective Frequency
Reporting Interface uses the APERF/MPERF MSRs.  Xen currently allows dom0
to access those MSRs on Intel CPUs.  This patch also allows AMD processors
to access them.

RHEL5 Xen does not have support for cpufreq in the HV and relies on the
dom0 powernow driver.  The upstream links are not relevent here, but are
shown below in anycase.

Upstream links:
http://xenbits.xensource.com/xen-unstable.hg?rev/6c3db6c83a02
http://xenbits.xensource.com/xen-unstable.hg?rev/b432d7d9be92
http://xenbits.xensource.com/xen-unstable.hg?rev/b44a4f9b9a62

Please review and ACK

Signed-off-by: Jarod Wilson <jarod@redhat.com>

diff --git a/arch/x86/traps.c b/arch/x86/traps.c
index b15163e..4b6e6db 100644
--- a/arch/x86/traps.c
+++ b/arch/x86/traps.c
@@ -1859,6 +1859,14 @@ static int emulate_privileged_op(struct cpu_user_regs *regs)
             break;
         case MSR_IA32_MPERF:
         case MSR_IA32_APERF:
+            if (( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL ) &&
+                ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD ) )
+                goto fail;
+            if ( !is_cpufreq_controller(v->domain) )
+                break;
+            if ( wrmsr_safe(regs->ecx, eax, edx) != 0 )
+                goto fail;
+            break;
         case MSR_IA32_PERF_CTL:
             if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
                 goto fail;