From: David Milburn <dmilburn@redhat.com> Date: Wed, 27 Aug 2008 09:15:33 -0500 Subject: [sata] update driver to 2.6.26-rc5 Message-id: 20080827141533.GA17507@dhcp-210.hsv.redhat.com O-Subject: Re: [RHEL5.3 PATCH 2/3 v2] SATA driver update Bugzilla: 439247 442906 445727 450962 451586 455445 459197 RH-Acked-by: Jeff Garzik <jgarzik@redhat.com> This patch syncs RHEL5.3 sata drivers to 2.6.26-rc5 which includes updates to PMP, sata_mv, and error handling. This addresses BZ 439247 - DVD drive pull errors BZ 442906 - sata_nv: disable ADMA by default BZ 445727 - Backport NCQ support for sata_mv driver from 2.6.25 BZ 450962 - Add NCQ support for mcp55 BZ 451586 - SB600/700 SATA controller PMP support BZ 455445 - System crashes in ata_scsi_rbuf_get. BZ 459197 - Add back rhel-specific drac code. Please review. Thanks, David diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 9990e7f..a62103a 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -775,6 +775,52 @@ running once the system is up. llsc*= [IA64] See function print_params() in arch/ia64/sn/kernel/llsc4.c. + libata.dma= [LIBATA] DMA control + libata.dma=0 Disable all PATA and SATA DMA + libata.dma=1 PATA and SATA Disk DMA only + libata.dma=2 ATAPI (CDROM) DMA only + libata.dma=4 Compact Flash DMA only + Combinations also work, so libata.dma=3 enables DMA + for disks and CDROMs, but not CFs. + + libata.noacpi [LIBATA] Disables use of ACPI in libata suspend/resume + when set. + Format: <int> + + libata.force= [LIBATA] Force configurations. The format is comma + separated list of "[ID:]VAL" where ID is + PORT[:DEVICE]. PORT and DEVICE are decimal numbers + matching port, link or device. Basically, it matches + the ATA ID string printed on console by libata. If + the whole ID part is omitted, the last PORT and DEVICE + values are used. If ID hasn't been specified yet, the + configuration applies to all ports, links and devices. + + If only DEVICE is omitted, the parameter applies to + the port and all links and devices behind it. DEVICE + number of 0 either selects the first device or the + first fan-out link behind PMP device. It does not + select the host link. DEVICE number of 15 selects the + host link and device attached to it. + + The VAL specifies the configuration to force. As long + as there's no ambiguity shortcut notation is allowed. + For example, both 1.5 and 1.5G would work for 1.5Gbps. + The following configurations can be forced. + + * Cable type: 40c, 80c, short40c, unk, ign or sata. + Any ID with matching PORT is used. + + * SATA link speed limit: 1.5Gbps or 3.0Gbps. + + * Transfer mode: pio[0-7], mwdma[0-4] and udma[0-7]. + udma[/][16,25,33,44,66,100,133] notation is also + allowed. + + * [no]ncq: Turn on or off NCQ. + + If there are multiple matching configurations changing + the same attribute, the last one is used. load_ramdisk= [RAM] List of ramdisks to load from floppy See Documentation/ramdisk.txt. diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 60d758a..a30c655 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -26,7 +26,7 @@ config ATA_NONSTANDARD default n config ATA_ACPI - bool + bool "ATA ACPI Support" depends on ACPI && PCI default y help @@ -38,6 +38,13 @@ config ATA_ACPI You can disable this at kernel boot time by using the option libata.noacpi=1 +config SATA_PMP + bool "SATA Port Multiplier support" + default y + help + This option adds support for SATA Port Multipliers + (the SATA version of an ethernet hub, or SAS expander). + config SATA_AHCI tristate "AHCI SATA support" depends on PCI @@ -46,6 +53,43 @@ config SATA_AHCI If unsure, say N. +config SATA_SIL24 + tristate "Silicon Image 3124/3132 SATA support" + depends on PCI + help + This option enables support for Silicon Image 3124/3132 Serial ATA. + + If unsure, say N. + +config SATA_FSL + tristate "Freescale 3.0Gbps SATA support" + depends on FSL_SOC + help + This option enables support for Freescale 3.0Gbps SATA controller. + It can be found on MPC837x and MPC8315. + + If unsure, say N. + +config ATA_SFF + bool "ATA SFF support" + default y + help + This option adds support for ATA controllers with SFF + compliant or similar programming interface. + + SFF is the legacy IDE interface that has been around since + the dawn of time. Almost all PATA controllers have an + SFF interface. Many SATA controllers have an SFF interface + when configured into a legacy compatibility mode. + + For users with exclusively modern controllers like AHCI, + Silicon Image 3124, or Marvell 6440, you may choose to + disable this uneeded SFF support. + + If unsure, say Y. + +if ATA_SFF + config SATA_SVW tristate "ServerWorks Frodo / Apple K2 SATA support" depends on PCI @@ -67,7 +111,7 @@ config ATA_PIIX config SATA_MV tristate "Marvell SATA support (HIGHLY EXPERIMENTAL)" - depends on PCI && EXPERIMENTAL + depends on EXPERIMENTAL help This option enables support for the Marvell Serial ATA family. Currently supports 88SX[56]0[48][01] chips. @@ -122,14 +166,6 @@ config SATA_SIL If unsure, say N. -config SATA_SIL24 - tristate "Silicon Image 3124/3132 SATA support" - depends on PCI - help - This option enables support for Silicon Image 3124/3132 Serial ATA. - - If unsure, say N. - config SATA_SIS tristate "SiS 964/965/966/180 SATA support" depends on PCI @@ -166,8 +202,8 @@ config SATA_VITESSE If unsure, say N. config SATA_INIC162X - tristate "Initio 162x SATA support (HIGHLY EXPERIMENTAL)" - depends on PCI && EXPERIMENTAL + tristate "Initio 162x SATA support" + depends on PCI help This option enables support for Initio 162x Serial ATA. @@ -180,15 +216,6 @@ config PATA_ACPI firmware in the BIOS. This driver can sometimes handle otherwise unsupported hardware. -config SATA_FSL - tristate "Freescale 3.0Gbps SATA support" - depends on PPC_MPC837x - help - This option enables support for Freescale 3.0Gbps SATA controller. - It can be found on MPC837x and MPC8315. - - If unsure, say N. - config PATA_ALI tristate "ALi PATA support (Experimental)" depends on PCI && EXPERIMENTAL @@ -457,6 +484,15 @@ config PATA_NETCELL If unsure, say N. +config PATA_NINJA32 + tristate "Ninja32/Delkin Cardbus ATA support (Experimental)" + depends on PCI && EXPERIMENTAL + help + This option enables support for the Ninja32, Delkin and + possibly other brands of Cardbus ATA adapter + + If unsure, say N. + config PATA_NS87410 tristate "Nat Semi NS87410 PATA support (Experimental)" depends on PCI && EXPERIMENTAL @@ -527,6 +563,15 @@ config PATA_RADISYS If unsure, say N. +config PATA_RB532 + tristate "RouterBoard 532 PATA CompactFlash support" + depends on MIKROTIK_RB532 + help + This option enables support for the RouterBoard 532 + PATA CompactFlash controller. + + If unsure, say N. + config PATA_RZ1000 tristate "PC Tech RZ1000 PATA support" depends on PCI @@ -605,13 +650,23 @@ config PATA_WINBOND_VLB config PATA_PLATFORM tristate "Generic platform device PATA support" - depends on EMBEDDED || ARCH_RPC + depends on EMBEDDED || ARCH_RPC || PPC help This option enables support for generic directly connected ATA devices commonly found on embedded systems. If unsure, say N. +config PATA_OF_PLATFORM + tristate "OpenFirmware platform device PATA support" + depends on PATA_PLATFORM && PPC_OF + help + This option enables support for generic directly connected ATA + devices commonly found on embedded systems with OpenFirmware + bindings. + + If unsure, say N. + config PATA_ICSIDE tristate "Acorn ICS PATA support" depends on ARM && ARCH_ACORN @@ -639,6 +694,15 @@ config PATA_SCC If unsure, say N. +config PATA_SCH + tristate "Intel SCH PATA support" + depends on PCI + help + This option enables support for Intel SCH PATA on the Intel + SCH (US15W, US15L, UL11L) series host controllers. + + If unsure, say N. + config PATA_BF54X tristate "Blackfin 54x ATAPI support" depends on BF542 || BF548 || BF549 @@ -653,4 +717,5 @@ config ATA_INTEL_COMBINED depends on IDE=y && !BLK_DEV_IDE_SATA && (SATA_AHCI || ATA_PIIX) default y +endif # ATA_SFF endif # ATA diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index b13feb2..674965f 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile @@ -41,6 +41,7 @@ obj-$(CONFIG_PATA_IT821X) += pata_it821x.o obj-$(CONFIG_PATA_IT8213) += pata_it8213.o obj-$(CONFIG_PATA_JMICRON) += pata_jmicron.o obj-$(CONFIG_PATA_NETCELL) += pata_netcell.o +obj-$(CONFIG_PATA_NINJA32) += pata_ninja32.o obj-$(CONFIG_PATA_NS87410) += pata_ns87410.o obj-$(CONFIG_PATA_NS87415) += pata_ns87415.o obj-$(CONFIG_PATA_OPTI) += pata_opti.o @@ -54,6 +55,7 @@ obj-$(CONFIG_PATA_PDC2027X) += pata_pdc2027x.o obj-$(CONFIG_PATA_PDC_OLD) += pata_pdc202xx_old.o obj-$(CONFIG_PATA_QDI) += pata_qdi.o obj-$(CONFIG_PATA_RADISYS) += pata_radisys.o +obj-$(CONFIG_PATA_RB532) += pata_rb532_cf.o obj-$(CONFIG_PATA_RZ1000) += pata_rz1000.o obj-$(CONFIG_PATA_SC1200) += pata_sc1200.o obj-$(CONFIG_PATA_SERVERWORKS) += pata_serverworks.o @@ -65,8 +67,10 @@ obj-$(CONFIG_PATA_SIS) += pata_sis.o obj-$(CONFIG_PATA_TRIFLEX) += pata_triflex.o obj-$(CONFIG_PATA_IXP4XX_CF) += pata_ixp4xx_cf.o obj-$(CONFIG_PATA_SCC) += pata_scc.o +obj-$(CONFIG_PATA_SCH) += pata_sch.o obj-$(CONFIG_PATA_BF54X) += pata_bf54x.o obj-$(CONFIG_PATA_PLATFORM) += pata_platform.o +obj-$(CONFIG_PATA_OF_PLATFORM) += pata_of_platform.o obj-$(CONFIG_PATA_ICSIDE) += pata_icside.o # Should be last but two libata driver obj-$(CONFIG_PATA_ACPI) += pata_acpi.o @@ -75,6 +79,7 @@ obj-$(CONFIG_ATA_GENERIC) += ata_generic.o # Should be last libata driver obj-$(CONFIG_PATA_LEGACY) += pata_legacy.o -libata-objs := libata-core.o libata-scsi.o libata-sff.o libata-eh.o \ - libata-pmp.o +libata-objs := libata-core.o libata-scsi.o libata-eh.o +libata-$(CONFIG_ATA_SFF) += libata-sff.o +libata-$(CONFIG_SATA_PMP) += libata-pmp.o libata-$(CONFIG_ATA_ACPI) += libata-acpi.o diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index a267120..eae701c 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -49,6 +49,10 @@ #define DRV_NAME "ahci" #define DRV_VERSION "3.0" +static int ahci_skip_host_reset; +module_param_named(skip_host_reset, ahci_skip_host_reset, int, 0444); +MODULE_PARM_DESC(skip_host_reset, "skip global host reset (0=don't skip, 1=skip)"); + static int ahci_enable_alpm(struct ata_port *ap, enum link_pm policy); static void ahci_disable_alpm(struct ata_port *ap); @@ -58,7 +62,6 @@ enum { AHCI_MAX_PORTS = 32, AHCI_MAX_SG = 168, /* hardware max is 64K */ AHCI_DMA_BOUNDARY = 0xffffffff, - AHCI_USE_CLUSTERING = 1, AHCI_MAX_CMDS = 32, AHCI_CMD_SZ = 32, AHCI_CMD_SLOT_SZ = AHCI_MAX_CMDS * AHCI_CMD_SZ, @@ -186,7 +189,7 @@ enum { AHCI_HFLAG_NO_MSI = (1 << 5), /* no PCI MSI */ AHCI_HFLAG_NO_PMP = (1 << 6), /* no PMP */ AHCI_HFLAG_NO_HOTPLUG = (1 << 7), /* ignore PxSERR.DIAG.N */ - AHCI_HFLAG_SECT255 = (1 << 8), /* max 255 sectors */ + AHCI_HFLAG_SECT255 = (1 << 8), /* max 255 sectors */ /* ap->flags bits */ @@ -194,24 +197,23 @@ enum { ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | ATA_FLAG_ACPI_SATA | ATA_FLAG_AN | ATA_FLAG_IPM, - AHCI_LFLAG_COMMON = ATA_LFLAG_SKIP_D2H_BSY, ICH_MAP = 0x90, /* ICH MAP register */ }; struct ahci_cmd_hdr { - u32 opts; - u32 status; - u32 tbl_addr; - u32 tbl_addr_hi; - u32 reserved[4]; + __le32 opts; + __le32 status; + __le32 tbl_addr; + __le32 tbl_addr_hi; + __le32 reserved[4]; }; struct ahci_sg { - u32 addr; - u32 addr_hi; - u32 reserved; - u32 flags_size; + __le32 addr; + __le32 addr_hi; + __le32 reserved; + __le32 flags_size; }; struct ahci_host_priv { @@ -241,19 +243,26 @@ static int ahci_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); static int ahci_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc); -static void ahci_irq_clear(struct ata_port *ap); +static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc); static int ahci_port_start(struct ata_port *ap); static void ahci_port_stop(struct ata_port *ap); -static void ahci_tf_read(struct ata_port *ap, struct ata_taskfile *tf); static void ahci_qc_prep(struct ata_queued_cmd *qc); -static u8 ahci_check_status(struct ata_port *ap); static void ahci_freeze(struct ata_port *ap); static void ahci_thaw(struct ata_port *ap); static void ahci_pmp_attach(struct ata_port *ap); static void ahci_pmp_detach(struct ata_port *ap); +static int ahci_softreset(struct ata_link *link, unsigned int *class, + unsigned long deadline); +static int ahci_sb600_softreset(struct ata_link *link, unsigned int *class, + unsigned long deadline); +static int ahci_hardreset(struct ata_link *link, unsigned int *class, + unsigned long deadline); +static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class, + unsigned long deadline); +static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class, + unsigned long deadline); +static void ahci_postreset(struct ata_link *link, unsigned int *class); static void ahci_error_handler(struct ata_port *ap); -static void ahci_vt8251_error_handler(struct ata_port *ap); -static void ahci_p5wdh_error_handler(struct ata_port *ap); static void ahci_post_internal_cmd(struct ata_queued_cmd *qc); static int ahci_port_resume(struct ata_port *ap); static void ahci_dev_config(struct ata_device *dev); @@ -272,129 +281,60 @@ static struct class_device_attribute *ahci_shost_attrs[] = { }; static struct scsi_host_template ahci_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .change_queue_depth = ata_scsi_change_queue_depth, + ATA_NCQ_SHT(DRV_NAME), .can_queue = AHCI_MAX_CMDS - 1, - .this_id = ATA_SHT_THIS_ID, .sg_tablesize = AHCI_MAX_SG, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = AHCI_USE_CLUSTERING, - .proc_name = DRV_NAME, .dma_boundary = AHCI_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, .shost_attrs = ahci_shost_attrs, }; -static const struct ata_port_operations ahci_ops = { - .check_status = ahci_check_status, - .check_altstatus = ahci_check_status, - .dev_select = ata_noop_dev_select, - - .dev_config = ahci_dev_config, - - .tf_read = ahci_tf_read, +static struct ata_port_operations ahci_ops = { + .inherits = &sata_pmp_port_ops, .qc_defer = sata_pmp_qc_defer_cmd_switch, .qc_prep = ahci_qc_prep, .qc_issue = ahci_qc_issue, - - .irq_clear = ahci_irq_clear, - - .scr_read = ahci_scr_read, - .scr_write = ahci_scr_write, + .qc_fill_rtf = ahci_qc_fill_rtf, .freeze = ahci_freeze, .thaw = ahci_thaw, - + .softreset = ahci_softreset, + .hardreset = ahci_hardreset, + .postreset = ahci_postreset, + .pmp_softreset = ahci_softreset, .error_handler = ahci_error_handler, .post_internal_cmd = ahci_post_internal_cmd, - - .pmp_attach = ahci_pmp_attach, - .pmp_detach = ahci_pmp_detach, - -#ifdef CONFIG_PM - .port_suspend = ahci_port_suspend, - .port_resume = ahci_port_resume, -#endif - .enable_pm = ahci_enable_alpm, - .disable_pm = ahci_disable_alpm, - - .port_start = ahci_port_start, - .port_stop = ahci_port_stop, -}; - -static const struct ata_port_operations ahci_vt8251_ops = { - .check_status = ahci_check_status, - .check_altstatus = ahci_check_status, - .dev_select = ata_noop_dev_select, - - .tf_read = ahci_tf_read, - - .qc_defer = sata_pmp_qc_defer_cmd_switch, - .qc_prep = ahci_qc_prep, - .qc_issue = ahci_qc_issue, - - .irq_clear = ahci_irq_clear, + .dev_config = ahci_dev_config, .scr_read = ahci_scr_read, .scr_write = ahci_scr_write, - - .freeze = ahci_freeze, - .thaw = ahci_thaw, - - .error_handler = ahci_vt8251_error_handler, - .post_internal_cmd = ahci_post_internal_cmd, - .pmp_attach = ahci_pmp_attach, .pmp_detach = ahci_pmp_detach, + .enable_pm = ahci_enable_alpm, + .disable_pm = ahci_disable_alpm, #ifdef CONFIG_PM .port_suspend = ahci_port_suspend, .port_resume = ahci_port_resume, #endif - .port_start = ahci_port_start, .port_stop = ahci_port_stop, }; -static const struct ata_port_operations ahci_p5wdh_ops = { - .check_status = ahci_check_status, - .check_altstatus = ahci_check_status, - .dev_select = ata_noop_dev_select, - - .tf_read = ahci_tf_read, - - .qc_defer = sata_pmp_qc_defer_cmd_switch, - .qc_prep = ahci_qc_prep, - .qc_issue = ahci_qc_issue, - - .irq_clear = ahci_irq_clear, - - .scr_read = ahci_scr_read, - .scr_write = ahci_scr_write, - - .freeze = ahci_freeze, - .thaw = ahci_thaw, - - .error_handler = ahci_p5wdh_error_handler, - .post_internal_cmd = ahci_post_internal_cmd, - - .pmp_attach = ahci_pmp_attach, - .pmp_detach = ahci_pmp_detach, +static struct ata_port_operations ahci_vt8251_ops = { + .inherits = &ahci_ops, + .hardreset = ahci_vt8251_hardreset, +}; -#ifdef CONFIG_PM - .port_suspend = ahci_port_suspend, - .port_resume = ahci_port_resume, -#endif +static struct ata_port_operations ahci_p5wdh_ops = { + .inherits = &ahci_ops, + .hardreset = ahci_p5wdh_hardreset, +}; - .port_start = ahci_port_start, - .port_stop = ahci_port_stop, +static struct ata_port_operations ahci_sb600_ops = { + .inherits = &ahci_ops, + .softreset = ahci_sb600_softreset, + .pmp_softreset = ahci_sb600_softreset, }; #define AHCI_HFLAGS(flags) .private_data = (void *)(flags) @@ -403,7 +343,6 @@ static const struct ata_port_info ahci_port_info[] = { /* board_ahci */ { .flags = AHCI_FLAG_COMMON, - .link_flags = AHCI_LFLAG_COMMON, .pio_mask = 0x1f, /* pio0-4 */ .udma_mask = ATA_UDMA6, .port_ops = &ahci_ops, @@ -412,7 +351,6 @@ static const struct ata_port_info ahci_port_info[] = { { AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP), .flags = AHCI_FLAG_COMMON, - .link_flags = AHCI_LFLAG_COMMON | ATA_LFLAG_HRST_TO_RESUME, .pio_mask = 0x1f, /* pio0-4 */ .udma_mask = ATA_UDMA6, .port_ops = &ahci_vt8251_ops, @@ -421,7 +359,6 @@ static const struct ata_port_info ahci_port_info[] = { { AHCI_HFLAGS (AHCI_HFLAG_IGN_IRQ_IF_ERR), .flags = AHCI_FLAG_COMMON, - .link_flags = AHCI_LFLAG_COMMON, .pio_mask = 0x1f, /* pio0-4 */ .udma_mask = ATA_UDMA6, .port_ops = &ahci_ops, @@ -429,13 +366,12 @@ static const struct ata_port_info ahci_port_info[] = { /* board_ahci_sb600 */ { AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL | - AHCI_HFLAG_32BIT_ONLY | - AHCI_HFLAG_SECT255 | AHCI_HFLAG_NO_PMP), + AHCI_HFLAG_32BIT_ONLY | AHCI_HFLAG_NO_MSI | + AHCI_HFLAG_SECT255), .flags = AHCI_FLAG_COMMON, - .link_flags = AHCI_LFLAG_COMMON, .pio_mask = 0x1f, /* pio0-4 */ .udma_mask = ATA_UDMA6, - .port_ops = &ahci_ops, + .port_ops = &ahci_sb600_ops, }, /* board_ahci_mv */ { @@ -443,20 +379,17 @@ static const struct ata_port_info ahci_port_info[] = { AHCI_HFLAG_MV_PATA), .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA, - .link_flags = AHCI_LFLAG_COMMON, .pio_mask = 0x1f, /* pio0-4 */ .udma_mask = ATA_UDMA6, .port_ops = &ahci_ops, }, /* board_ahci_sb700 */ { - AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL | - AHCI_HFLAG_NO_PMP), + AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL), .flags = AHCI_FLAG_COMMON, - .link_flags = AHCI_LFLAG_COMMON, .pio_mask = 0x1f, /* pio0-4 */ .udma_mask = ATA_UDMA6, - .port_ops = &ahci_ops, + .port_ops = &ahci_sb600_ops, }, }; @@ -568,6 +501,18 @@ static const struct pci_device_id ahci_pci_tbl[] = { { PCI_VDEVICE(NVIDIA, 0x0abd), board_ahci }, /* MCP79 */ { PCI_VDEVICE(NVIDIA, 0x0abe), board_ahci }, /* MCP79 */ { PCI_VDEVICE(NVIDIA, 0x0abf), board_ahci }, /* MCP79 */ + { PCI_VDEVICE(NVIDIA, 0x0bc8), board_ahci }, /* MCP7B */ + { PCI_VDEVICE(NVIDIA, 0x0bc9), board_ahci }, /* MCP7B */ + { PCI_VDEVICE(NVIDIA, 0x0bca), board_ahci }, /* MCP7B */ + { PCI_VDEVICE(NVIDIA, 0x0bcb), board_ahci }, /* MCP7B */ + { PCI_VDEVICE(NVIDIA, 0x0bcc), board_ahci }, /* MCP7B */ + { PCI_VDEVICE(NVIDIA, 0x0bcd), board_ahci }, /* MCP7B */ + { PCI_VDEVICE(NVIDIA, 0x0bce), board_ahci }, /* MCP7B */ + { PCI_VDEVICE(NVIDIA, 0x0bcf), board_ahci }, /* MCP7B */ + { PCI_VDEVICE(NVIDIA, 0x0bc4), board_ahci }, /* MCP7B */ + { PCI_VDEVICE(NVIDIA, 0x0bc5), board_ahci }, /* MCP7B */ + { PCI_VDEVICE(NVIDIA, 0x0bc6), board_ahci }, /* MCP7B */ + { PCI_VDEVICE(NVIDIA, 0x0bc7), board_ahci }, /* MCP7B */ /* SiS */ { PCI_VDEVICE(SI, 0x1184), board_ahci }, /* SiS 966 */ @@ -576,6 +521,7 @@ static const struct pci_device_id ahci_pci_tbl[] = { /* Marvell */ { PCI_VDEVICE(MARVELL, 0x6145), board_ahci_mv }, /* 6145 */ + { PCI_VDEVICE(MARVELL, 0x6121), board_ahci_mv }, /* 6121 */ /* Generic, PCI class code for AHCI */ { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, @@ -615,6 +561,31 @@ static inline void __iomem *ahci_port_base(struct ata_port *ap) return __ahci_port_base(ap->host, ap->port_no); } +static void ahci_enable_ahci(void __iomem *mmio) +{ + int i; + u32 tmp; + + /* turn on AHCI_EN */ + tmp = readl(mmio + HOST_CTL); + if (tmp & HOST_AHCI_EN) + return; + + /* Some controllers need AHCI_EN to be written multiple times. + * Try a few times before giving up. + */ + for (i = 0; i < 5; i++) { + tmp |= HOST_AHCI_EN; + writel(tmp, mmio + HOST_CTL); + tmp = readl(mmio + HOST_CTL); /* flush && sanity check */ + if (tmp & HOST_AHCI_EN) + return; + msleep(10); + } + + WARN_ON(1); +} + /** * ahci_save_initial_config - Save and fixup initial config values * @pdev: target PCI device @@ -636,6 +607,10 @@ static void ahci_save_initial_config(struct pci_dev *pdev, void __iomem *mmio = pcim_iomap_table(pdev)[AHCI_PCI_BAR]; u32 cap, port_map; int i; + int mv; + + /* make sure AHCI mode is enabled before accessing CAP */ + ahci_enable_ahci(mmio); /* Values prefixed with saved_ are written back to host after * reset. Values without are used for driver operation. @@ -656,7 +631,7 @@ static void ahci_save_initial_config(struct pci_dev *pdev, cap &= ~HOST_CAP_NCQ; } - if ((cap && HOST_CAP_PMP) && (hpriv->flags & AHCI_HFLAG_NO_PMP)) { + if ((cap & HOST_CAP_PMP) && (hpriv->flags & AHCI_HFLAG_NO_PMP)) { dev_printk(KERN_INFO, &pdev->dev, "controller can't do PMP, turning off CAP_PMP\n"); cap &= ~HOST_CAP_PMP; @@ -668,34 +643,34 @@ static void ahci_save_initial_config(struct pci_dev *pdev, * presence register, as bit 4 (counting from 0) */ if (hpriv->flags & AHCI_HFLAG_MV_PATA) { + if (pdev->device == 0x6121) + mv = 0x3; + else + mv = 0xf; dev_printk(KERN_ERR, &pdev->dev, "MV_AHCI HACK: port_map %x -> %x\n", - hpriv->port_map, - hpriv->port_map & 0xf); + port_map, + port_map & mv); - port_map &= 0xf; + port_map &= mv; } /* cross check port_map and cap.n_ports */ if (port_map) { - u32 tmp_port_map = port_map; - int n_ports = ahci_nr_ports(cap); + int map_ports = 0; - for (i = 0; i < AHCI_MAX_PORTS && n_ports; i++) { - if (tmp_port_map & (1 << i)) { - n_ports--; - tmp_port_map &= ~(1 << i); - } - } + for (i = 0; i < AHCI_MAX_PORTS; i++) + if (port_map & (1 << i)) + map_ports++; - /* If n_ports and port_map are inconsistent, whine and - * clear port_map and let it be generated from n_ports. + /* If PI has more ports than n_ports, whine, clear + * port_map and let it be generated from n_ports. */ - if (n_ports || tmp_port_map) { + if (map_ports > ahci_nr_ports(cap)) { dev_printk(KERN_WARNING, &pdev->dev, - "nr_ports (%u) and implemented port map " - "(0x%x) don't match, using nr_ports\n", - ahci_nr_ports(cap), port_map); + "implemented port map (0x%x) contains more " + "ports than nr_ports (%u), using nr_ports\n", + port_map, ahci_nr_ports(cap)); port_map = 0; } } @@ -1054,50 +1029,55 @@ static int ahci_deinit_port(struct ata_port *ap, const char **emsg) static int ahci_reset_controller(struct ata_host *host) { struct pci_dev *pdev = to_pci_dev(host->dev); + struct ahci_host_priv *hpriv = host->private_data; void __iomem *mmio = host->iomap[AHCI_PCI_BAR]; u32 tmp; /* we must be in AHCI mode, before using anything * AHCI-specific, such as HOST_RESET. */ - tmp = readl(mmio + HOST_CTL); - if (!(tmp & HOST_AHCI_EN)) { - tmp |= HOST_AHCI_EN; - writel(tmp, mmio + HOST_CTL); - } + ahci_enable_ahci(mmio); /* global controller reset */ - if ((tmp & HOST_RESET) == 0) { - writel(tmp | HOST_RESET, mmio + HOST_CTL); - readl(mmio + HOST_CTL); /* flush */ - } + if (!ahci_skip_host_reset) { + tmp = readl(mmio + HOST_CTL); + if ((tmp & HOST_RESET) == 0) { + writel(tmp | HOST_RESET, mmio + HOST_CTL); + readl(mmio + HOST_CTL); /* flush */ + } - /* reset must complete within 1 second, or - * the hardware should be considered fried. - */ - ssleep(1); + /* reset must complete within 1 second, or + * the hardware should be considered fried. + */ + ssleep(1); - tmp = readl(mmio + HOST_CTL); - if (tmp & HOST_RESET) { - dev_printk(KERN_ERR, host->dev, - "controller reset failed (0x%x)\n", tmp); - return -EIO; - } + tmp = readl(mmio + HOST_CTL); + if (tmp & HOST_RESET) { + dev_printk(KERN_ERR, host->dev, + "controller reset failed (0x%x)\n", tmp); + return -EIO; + } - /* turn on AHCI mode */ - writel(HOST_AHCI_EN, mmio + HOST_CTL); - (void) readl(mmio + HOST_CTL); /* flush */ + /* turn on AHCI mode */ + ahci_enable_ahci(mmio); - /* some registers might be cleared on reset. restore initial values */ - ahci_restore_initial_config(host); + /* Some registers might be cleared on reset. Restore + * initial values. + */ + ahci_restore_initial_config(host); + } else + dev_printk(KERN_INFO, host->dev, + "skipping global host reset\n"); if (pdev->vendor == PCI_VENDOR_ID_INTEL) { u16 tmp16; /* configure PCS */ pci_read_config_word(pdev, 0x92, &tmp16); - tmp16 |= 0xf; - pci_write_config_word(pdev, 0x92, tmp16); + if ((tmp16 & hpriv->port_map) != hpriv->port_map) { + tmp16 |= hpriv->port_map; + pci_write_config_word(pdev, 0x92, tmp16); + } } return 0; @@ -1139,9 +1119,14 @@ static void ahci_init_controller(struct ata_host *host) int i; void __iomem *port_mmio; u32 tmp; + int mv; if (hpriv->flags & AHCI_HFLAG_MV_PATA) { - port_mmio = __ahci_port_base(host, 4); + if (pdev->device == 0x6121) + mv = 2; + else + mv = 4; + port_mmio = __ahci_port_base(host, mv); writel(0, port_mmio + PORT_IRQ_MASK); @@ -1176,7 +1161,7 @@ static void ahci_dev_config(struct ata_device *dev) if (hpriv->flags & AHCI_HFLAG_SECT255) { dev->max_sectors = 255; ata_dev_printk(dev, KERN_INFO, - "SB600 AHCI: limiting to 255 sectors per cmd\n"); + "SB600 AHCI: limiting to 255 sectors per cmd\n"); } } @@ -1210,13 +1195,14 @@ static void ahci_fill_cmd_slot(struct ahci_port_priv *pp, unsigned int tag, static int ahci_kick_engine(struct ata_port *ap, int force_restart) { - void __iomem *port_mmio = ap->ioaddr.cmd_addr; + void __iomem *port_mmio = ahci_port_base(ap); struct ahci_host_priv *hpriv = ap->host->private_data; + u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF; u32 tmp; int busy, rc; /* do we need to kick the port? */ - busy = ahci_check_status(ap) & (ATA_BUSY | ATA_DRQ); + busy = status & (ATA_BUSY | ATA_DRQ); if (!busy && !force_restart) return 0; @@ -1284,8 +1270,8 @@ static int ahci_exec_polled_cmd(struct ata_port *ap, int pmp, } static int ahci_do_softreset(struct ata_link *link, unsigned int *class, - int pmp, unsigned long deadline) -{ + int pmp, unsigned long deadline, + int (*check_ready)(struct ata_link *link)){ struct ata_port *ap = link->ap; const char *reason = NULL; unsigned long now, msecs; @@ -1294,12 +1280,6 @@ static int ahci_do_softreset(struct ata_link *link, unsigned int *class, DPRINTK("ENTER\n"); - if (ata_link_offline(link)) { - DPRINTK("PHY reports no device\n"); - *class = ATA_DEV_NONE; - return 0; - } - /* prepare for SRST (AHCI-1.1 10.4.1) */ rc = ahci_kick_engine(ap, 1); if (rc && rc != -EOPNOTSUPP) @@ -1329,10 +1309,8 @@ static int ahci_do_softreset(struct ata_link *link, unsigned int *class, tf.ctl &= ~ATA_SRST; ahci_exec_polled_cmd(ap, pmp, &tf, 0, 0, 0); - /* wait a while before checking status */ - ata_wait_after_reset(ap, deadline); - - rc = ata_wait_ready(ap, deadline); + /* wait for link to become ready */ + rc = ata_wait_after_reset(link, deadline, check_ready); /* link occupied, -ENODEV too is an error */ if (rc) { reason = "device not ready"; @@ -1348,24 +1326,81 @@ static int ahci_do_softreset(struct ata_link *link, unsigned int *class, return rc; } +static int ahci_check_ready(struct ata_link *link) +{ + void __iomem *port_mmio = ahci_port_base(link->ap); + u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF; + + return ata_check_ready(status); +} + static int ahci_softreset(struct ata_link *link, unsigned int *class, unsigned long deadline) { - int pmp = 0; + int pmp = sata_srst_pmp(link); + + DPRINTK("ENTER\n"); + + return ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready); +} + +static int ahci_sb600_check_ready(struct ata_link *link) +{ + void __iomem *port_mmio = ahci_port_base(link->ap); + u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF; + u32 irq_status = readl(port_mmio + PORT_IRQ_STAT); + + /* + * There is no need to check TFDATA if BAD PMP is found due to HW bug, + * which can save timeout delay. + */ + if (irq_status & PORT_IRQ_BAD_PMP) + return -EIO; + + return ata_check_ready(status); +} + +static int ahci_sb600_softreset(struct ata_link *link, unsigned int *class, + unsigned long deadline) +{ + struct ata_port *ap = link->ap; + void __iomem *port_mmio = ahci_port_base(ap); + int pmp = sata_srst_pmp(link); + int rc; + u32 irq_sts; + + DPRINTK("ENTER\n"); - if (link->ap->flags & ATA_FLAG_PMP) - pmp = SATA_PMP_CTRL_PORT; + rc = ahci_do_softreset(link, class, pmp, deadline, + ahci_sb600_check_ready); + + /* + * Soft reset fails on some ATI chips with IPMS set when PMP + * is enabled but SATA HDD/ODD is connected to SATA port, + * do soft reset again to port 0. + */ + if (rc == -EIO) { + irq_sts = readl(port_mmio + PORT_IRQ_STAT); + if (irq_sts & PORT_IRQ_BAD_PMP) { + ata_link_printk(link, KERN_WARNING, + "failed due to HW bug, retry pmp=0\n"); + rc = ahci_do_softreset(link, class, 0, deadline, + ahci_check_ready); + } + } - return ahci_do_softreset(link, class, pmp, deadline); + return rc; } static int ahci_hardreset(struct ata_link *link, unsigned int *class, unsigned long deadline) { + const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context); struct ata_port *ap = link->ap; struct ahci_port_priv *pp = ap->private_data; u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; struct ata_taskfile tf; + bool online; int rc; DPRINTK("ENTER\n"); @@ -1377,14 +1412,13 @@ static int ahci_hardreset(struct ata_link *link, unsigned int *class, tf.command = 0x80; ata_tf_to_fis(&tf, 0, 0, d2h_fis); - rc = sata_std_hardreset(link, class, deadline); + rc = sata_link_hardreset(link, timing, deadline, &online, + ahci_check_ready); ahci_start_engine(ap); - if (rc == 0 && ata_link_online(link)) + if (online) *class = ahci_dev_classify(ap); - if (rc != -EAGAIN && *class == ATA_DEV_UNKNOWN) - *class = ATA_DEV_NONE; DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class); return rc; @@ -1394,7 +1428,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class, unsigned long deadline) { struct ata_port *ap = link->ap; - u32 serror; + bool online; int rc; DPRINTK("ENTER\n"); @@ -1402,11 +1436,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class, ahci_stop_engine(ap); rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context), - deadline); - - /* vt8251 needs SError cleared for the port to operate */ - ahci_scr_read(ap, SCR_ERROR, &serror); - ahci_scr_write(ap, SCR_ERROR, serror); + deadline, &online, NULL); ahci_start_engine(ap); @@ -1415,7 +1445,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class, /* vt8251 doesn't clear BSY on signature FIS reception, * request follow-up softreset. */ - return rc ?: -EAGAIN; + return online ? -EAGAIN : rc; } static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class, @@ -1425,6 +1455,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class, struct ahci_port_priv *pp = ap->private_data; u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; struct ata_taskfile tf; + bool online; int rc; ahci_stop_engine(ap); @@ -1435,16 +1466,10 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class, ata_tf_to_fis(&tf, 0, 0, d2h_fis); rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context), - deadline); + deadline, &online, NULL); ahci_start_engine(ap); - if (rc || ata_link_offline(link)) - return rc; - - /* spec mandates ">= 2ms" before checking status */ - msleep(150); - /* The pseudo configuration device on SIMG4726 attached to * ASUS P5W-DH Deluxe doesn't send signature FIS after * hardreset if no device is attached to the first downstream @@ -1458,11 +1483,13 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, unsigned int *class, * have to be reset again. For most cases, this should * suffice while making probing snappish enough. */ - rc = ata_wait_ready(ap, jiffies + 2 * HZ); - if (rc) - ahci_kick_engine(ap, 0); - - return 0; + if (online) { + rc = ata_wait_after_reset(link, jiffies + 2 * HZ, + ahci_check_ready); + if (rc) + ahci_kick_engine(ap, 0); + } + return rc; } static void ahci_postreset(struct ata_link *link, unsigned int *class) @@ -1485,27 +1512,6 @@ static void ahci_postreset(struct ata_link *link, unsigned int *class) } } -static int ahci_pmp_softreset(struct ata_link *link, unsigned int *class, - unsigned long deadline) -{ - return ahci_do_softreset(link, class, link->pmp, deadline); -} - -static u8 ahci_check_status(struct ata_port *ap) -{ - void __iomem *mmio = ap->ioaddr.cmd_addr; - - return readl(mmio + PORT_TFDATA) & 0xFF; -} - -static void ahci_tf_read(struct ata_port *ap, struct ata_taskfile *tf) -{ - struct ahci_port_priv *pp = ap->private_data; - u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; - - ata_tf_from_fis(d2h_fis, tf); -} - static unsigned int ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl) { struct scatterlist *sg; @@ -1537,7 +1543,7 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct ahci_port_priv *pp = ap->private_data; - int is_atapi = is_atapi_taskfile(&qc->tf); + int is_atapi = ata_is_atapi(qc->tf.protocol); void *cmd_tbl; u32 opts; const u32 cmd_fis_len = 5; /* five dwords */ @@ -1622,27 +1628,27 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat) u32 *unk = (u32 *)(pp->rx_fis + RX_FIS_UNK); active_ehi->err_mask |= AC_ERR_HSM; - active_ehi->action |= ATA_EH_SOFTRESET; + active_ehi->action |= ATA_EH_RESET; ata_ehi_push_desc(active_ehi, "unknown FIS %08x %08x %08x %08x" , unk[0], unk[1], unk[2], unk[3]); } - if (ap->nr_pmp_links && (irq_stat & PORT_IRQ_BAD_PMP)) { + if (sata_pmp_attached(ap) && (irq_stat & PORT_IRQ_BAD_PMP)) { active_ehi->err_mask |= AC_ERR_HSM; - active_ehi->action |= ATA_EH_SOFTRESET; + active_ehi->action |= ATA_EH_RESET; ata_ehi_push_desc(active_ehi, "incorrect PMP"); } if (irq_stat & (PORT_IRQ_HBUS_ERR | PORT_IRQ_HBUS_DATA_ERR)) { host_ehi->err_mask |= AC_ERR_HOST_BUS; - host_ehi->action |= ATA_EH_SOFTRESET; + host_ehi->action |= ATA_EH_RESET; ata_ehi_push_desc(host_ehi, "host bus error"); } if (irq_stat & PORT_IRQ_IF_ERR) { host_ehi->err_mask |= AC_ERR_ATA_BUS; - host_ehi->action |= ATA_EH_SOFTRESET; + host_ehi->action |= ATA_EH_RESET; ata_ehi_push_desc(host_ehi, "interface fatal error"); } @@ -1663,7 +1669,7 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat) static void ahci_port_intr(struct ata_port *ap) { - void __iomem *port_mmio = ap->ioaddr.cmd_addr; + void __iomem *port_mmio = ahci_port_base(ap); struct ata_eh_info *ehi = &ap->link.eh_info; struct ahci_port_priv *pp = ap->private_data; struct ahci_host_priv *hpriv = ap->host->private_data; @@ -1725,21 +1731,16 @@ static void ahci_port_intr(struct ata_port *ap) else qc_active = readl(port_mmio + PORT_CMD_ISSUE); - rc = ata_qc_complete_multiple(ap, qc_active, NULL); + rc = ata_qc_complete_multiple(ap, qc_active); /* while resetting, invalid completions are expected */ if (unlikely(rc < 0 && !resetting)) { ehi->err_mask |= AC_ERR_HSM; - ehi->action |= ATA_EH_SOFTRESET; + ehi->action |= ATA_EH_RESET; ata_port_freeze(ap); } } -static void ahci_irq_clear(struct ata_port *ap) -{ - /* TODO */ -} - static irqreturn_t ahci_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs) { struct ata_host *host = dev_instance; @@ -1813,6 +1814,15 @@ static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc) return 0; } +static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc) +{ + struct ahci_port_priv *pp = qc->ap->private_data; + u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; + + ata_tf_from_fis(d2h_fis, &qc->result_tf); + return true; +} + static void ahci_freeze(struct ata_port *ap) { void __iomem *port_mmio = ahci_port_base(ap); @@ -1845,37 +1855,7 @@ static void ahci_error_handler(struct ata_port *ap) ahci_start_engine(ap); } - /* perform recovery */ - sata_pmp_do_eh(ap, ata_std_prereset, ahci_softreset, - ahci_hardreset, ahci_postreset, - sata_pmp_std_prereset, ahci_pmp_softreset, - sata_pmp_std_hardreset, sata_pmp_std_postreset); -} - -static void ahci_vt8251_error_handler(struct ata_port *ap) -{ - if (!(ap->pflags & ATA_PFLAG_FROZEN)) { - /* restart engine */ - ahci_stop_engine(ap); - ahci_start_engine(ap); - } - - /* perform recovery */ - ata_do_eh(ap, ata_std_prereset, ahci_softreset, ahci_vt8251_hardreset, - ahci_postreset); -} - -static void ahci_p5wdh_error_handler(struct ata_port *ap) -{ - if (!(ap->pflags & ATA_PFLAG_FROZEN)) { - /* restart engine */ - ahci_stop_engine(ap); - ahci_start_engine(ap); - } - - /* perform recovery */ - ata_do_eh(ap, ata_std_prereset, ahci_softreset, ahci_p5wdh_hardreset, - ahci_postreset); + sata_pmp_error_handler(ap); } static void ahci_post_internal_cmd(struct ata_queued_cmd *qc) @@ -1920,7 +1900,7 @@ static int ahci_port_resume(struct ata_port *ap) ahci_power_up(ap); ahci_start_port(ap); - if (ap->nr_pmp_links) + if (sata_pmp_attached(ap)) ahci_pmp_attach(ap); else ahci_pmp_detach(ap); @@ -1970,22 +1950,6 @@ static int ahci_pci_device_resume(struct pci_dev *pdev) struct ata_host *host = dev_get_drvdata(&pdev->dev); int rc; - if (pdev->vendor == PCI_VENDOR_ID_ATI && - (pdev->device == 0x4380 || pdev->device == 0x4390)) { - u8 tmp; - pci_read_config_byte(pdev, PCI_CLASS_DEVICE, &tmp); - if (tmp == 0x01) { - pci_read_config_byte(pdev, 0x40, &tmp); - pci_write_config_byte(pdev, 0x40, tmp|1); - pci_write_config_byte(pdev, 0x9, 1); - pci_write_config_byte(pdev, 0xa, 6); - pci_write_config_byte(pdev, 0x40, tmp); - - pdev->class = PCI_CLASS_STORAGE_SATA_AHCI; - printk(KERN_INFO "PCI: set SATA to AHCI mode\n"); - } - } - rc = ata_pci_device_do_resume(pdev); if (rc) return rc; @@ -2232,7 +2196,7 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) struct device *dev = &pdev->dev; struct ahci_host_priv *hpriv; struct ata_host *host; - int i, rc; + int n_ports, i, rc; VPRINTK("ENTER\n"); @@ -2245,7 +2209,7 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) rc = pcim_enable_device(pdev); if (rc) return rc; - + rc = pcim_iomap_regions(pdev, 1 << AHCI_PCI_BAR, DRV_NAME); if (rc == -EBUSY) pcim_pin_device(pdev); @@ -2286,7 +2250,14 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) if (hpriv->cap & HOST_CAP_PMP) pi.flags |= ATA_FLAG_PMP; - host = ata_host_alloc_pinfo(&pdev->dev, ppi, fls(hpriv->port_map)); + /* CAP.NP sometimes indicate the index of the last enabled + * port, at other times, that of the last possible port, so + * determining the maximum port number requires looking at + * both CAP.NP and port_map. + */ + n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map)); + + host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports); if (!host) return -ENOMEM; host->iomap = pcim_iomap_table(pdev); @@ -2294,7 +2265,6 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) for (i = 0; i < host->n_ports; i++) { struct ata_port *ap = host->ports[i]; - void __iomem *port_mmio = ahci_port_base(ap); ata_port_pbar_desc(ap, AHCI_PCI_BAR, -1, "abar"); ata_port_pbar_desc(ap, AHCI_PCI_BAR, @@ -2303,12 +2273,8 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) /* set initial link pm policy */ ap->pm_policy = NOT_AVAILABLE; - /* standard SATA port setup */ - if (hpriv->port_map & (1 << i)) - ap->ioaddr.cmd_addr = port_mmio; - /* disabled/not-implemented port */ - else + if (!(hpriv->port_map & (1 << i))) ap->ops = &ata_dummy_port_ops; } diff --git a/drivers/ata/ata_generic.c b/drivers/ata/ata_generic.c index 9032998..75a406f 100644 --- a/drivers/ata/ata_generic.c +++ b/drivers/ata/ata_generic.c @@ -26,7 +26,7 @@ #include <linux/libata.h> #define DRV_NAME "ata_generic" -#define DRV_VERSION "0.2.13" +#define DRV_VERSION "0.2.15" /* * A generic parallel ATA driver using libata @@ -48,80 +48,60 @@ static int generic_set_mode(struct ata_link *link, struct ata_device **unused) struct ata_port *ap = link->ap; int dma_enabled = 0; struct ata_device *dev; + struct pci_dev *pdev = to_pci_dev(ap->host->dev); /* Bits 5 and 6 indicate if DMA is active on master/slave */ if (ap->ioaddr.bmdma_addr) dma_enabled = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); + if (pdev->vendor == PCI_VENDOR_ID_CENATEK) + dma_enabled = 0xFF; + ata_link_for_each_dev(dev, link) { - if (ata_dev_enabled(dev)) { - /* We don't really care */ - dev->pio_mode = XFER_PIO_0; - dev->dma_mode = XFER_MW_DMA_0; - /* We do need the right mode information for DMA or PIO - and this comes from the current configuration flags */ - if (dma_enabled & (1 << (5 + dev->devno))) { - ata_id_to_dma_mode(dev, XFER_MW_DMA_0); - dev->flags &= ~ATA_DFLAG_PIO; - } else { - ata_dev_printk(dev, KERN_INFO, "configured for PIO\n"); - dev->xfer_mode = XFER_PIO_0; - dev->xfer_shift = ATA_SHIFT_PIO; - dev->flags |= ATA_DFLAG_PIO; + if (!ata_dev_enabled(dev)) + continue; + + /* We don't really care */ + dev->pio_mode = XFER_PIO_0; + dev->dma_mode = XFER_MW_DMA_0; + /* We do need the right mode information for DMA or PIO + and this comes from the current configuration flags */ + if (dma_enabled & (1 << (5 + dev->devno))) { + unsigned int xfer_mask = ata_id_xfermask(dev->id); + const char *name; + + if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA)) + name = ata_mode_string(xfer_mask); + else { + /* SWDMA perhaps? */ + name = "DMA"; + xfer_mask |= ata_xfer_mode2mask(XFER_MW_DMA_0); } + + ata_dev_printk(dev, KERN_INFO, "configured for %s\n", + name); + + dev->xfer_mode = ata_xfer_mask2mode(xfer_mask); + dev->xfer_shift = ata_xfer_mode2shift(dev->xfer_mode); + dev->flags &= ~ATA_DFLAG_PIO; + } else { + ata_dev_printk(dev, KERN_INFO, "configured for PIO\n"); + dev->xfer_mode = XFER_PIO_0; + dev->xfer_shift = ATA_SHIFT_PIO; + dev->flags |= ATA_DFLAG_PIO; } } return 0; } static struct scsi_host_template generic_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct ata_port_operations generic_port_ops = { - .set_mode = generic_set_mode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .data_xfer = ata_data_xfer, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, + .inherits = &ata_bmdma_port_ops, .cable_detect = ata_cable_unknown, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .set_mode = generic_set_mode, }; static int all_generic_ide; /* Set to claim all devices */ @@ -140,7 +120,6 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id { u16 command; static const struct ata_port_info info = { - .sht = &generic_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -171,9 +150,15 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id return -ENODEV; if (dev->vendor == PCI_VENDOR_ID_AL) - ata_pci_clear_simplex(dev); + ata_pci_bmdma_clear_simplex(dev); - return ata_pci_init_one(dev, ppi); + if (dev->vendor == PCI_VENDOR_ID_ATI) { + int rc = pcim_enable_device(dev); + if (rc < 0) + return rc; + pcim_pin_device(dev); + } + return ata_pci_sff_init_one(dev, ppi, &generic_sht, NULL); } static struct pci_device_id ata_generic[] = { @@ -185,6 +170,7 @@ static struct pci_device_id ata_generic[] = { { PCI_DEVICE(PCI_VENDOR_ID_HINT, PCI_DEVICE_ID_HINT_VXPROII_IDE), }, { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C561), }, { PCI_DEVICE(PCI_VENDOR_ID_OPTI, PCI_DEVICE_ID_OPTI_82C558), }, + { PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE), }, { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO), }, { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), }, { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2), }, diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index 469ecd3..625aeab 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c @@ -100,39 +100,20 @@ enum { PIIX_IOCFG = 0x54, /* IDE I/O configuration register */ ICH5_PMR = 0x90, /* port mapping register */ ICH5_PCS = 0x92, /* port control and status */ - PIIX_SCC = 0x0A, /* sub-class code register */ + PIIX_SIDPR_BAR = 5, + PIIX_SIDPR_LEN = 16, + PIIX_SIDPR_IDX = 0, + PIIX_SIDPR_DATA = 4, - PIIX_FLAG_SCR = (1 << 26), /* SCR available */ - PIIX_FLAG_AHCI = (1 << 27), /* AHCI possible */ PIIX_FLAG_CHECKINTR = (1 << 28), /* make sure PCI INTx enabled */ + PIIX_FLAG_SIDPR = (1 << 29), /* SATA idx/data pair regs */ PIIX_PATA_FLAGS = ATA_FLAG_SLAVE_POSS, PIIX_SATA_FLAGS = ATA_FLAG_SATA | PIIX_FLAG_CHECKINTR, - /* combined mode. if set, PATA is channel 0. - * if clear, PATA is channel 1. - */ - PIIX_PORT_ENABLED = (1 << 0), - PIIX_PORT_PRESENT = (1 << 4), - PIIX_80C_PRI = (1 << 5) | (1 << 4), PIIX_80C_SEC = (1 << 7) | (1 << 6), - /* controller IDs */ - piix_pata_mwdma = 0, /* PIIX3 MWDMA only */ - piix_pata_33, /* PIIX4 at 33Mhz */ - ich_pata_33, /* ICH up to UDMA 33 only */ - ich_pata_66, /* ICH up to 66 Mhz */ - ich_pata_100, /* ICH up to UDMA 100 */ - ich5_sata, - ich6_sata, - ich6_sata_ahci, - ich6m_sata_ahci, - ich8_sata_ahci, - ich8_2port_sata, - ich8m_apple_sata_ahci, /* locks up on second port enable */ - tolapai_sata_ahci, - /* constants for mapping table */ P0 = 0, /* port 0 */ P1 = 1, /* port 1 */ @@ -148,6 +129,23 @@ enum { PIIX_HOST_BROKEN_SUSPEND = (1 << 24), }; +enum piix_controller_ids { + /* controller IDs */ + piix_pata_mwdma, /* PIIX3 MWDMA only */ + piix_pata_33, /* PIIX4 at 33Mhz */ + ich_pata_33, /* ICH up to UDMA 33 only */ + ich_pata_66, /* ICH up to 66 Mhz */ + ich_pata_100, /* ICH up to UDMA 100 */ + ich5_sata, + ich6_sata, + ich6m_sata, + ich8_sata, + ich8_2port_sata, + ich8m_apple_sata, /* locks up on second port enable */ + tolapai_sata, + piix_pata_vmw, /* PIIX4 for VMware, spurious DMA_ERR */ +}; + struct piix_map_db { const u32 mask; const u16 port_enable; @@ -156,15 +154,19 @@ struct piix_map_db { struct piix_host_priv { const int *map; + void __iomem *sidpr; }; static int piix_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); -static void piix_pata_error_handler(struct ata_port *ap); +static int piix_pata_prereset(struct ata_link *link, unsigned long deadline); static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev); static void piix_set_dmamode(struct ata_port *ap, struct ata_device *adev); static void ich_set_dmamode(struct ata_port *ap, struct ata_device *adev); static int ich_pata_cable_detect(struct ata_port *ap); +static u8 piix_vmw_bmdma_status(struct ata_port *ap); +static int piix_sidpr_scr_read(struct ata_port *ap, unsigned int reg, u32 *val); +static int piix_sidpr_scr_write(struct ata_port *ap, unsigned int reg, u32 val); #ifdef CONFIG_PM static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); static int piix_pci_device_resume(struct pci_dev *pdev); @@ -175,6 +177,8 @@ static unsigned int in_module_init = 1; static const struct pci_device_id piix_pci_tbl[] = { /* Intel PIIX3 for the 430HX etc */ { 0x8086, 0x7010, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_mwdma }, + /* VMware ICH4 */ + { 0x8086, 0x7111, 0x15ad, 0x1976, 0, 0, piix_pata_vmw }, /* Intel PIIX4 for the 430TX/440BX/MX chipset: UDMA 33 */ /* Also PIIX4E (fn3 rev 2) and PIIX4M (fn3 rev 3) */ { 0x8086, 0x7111, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 }, @@ -210,7 +214,6 @@ static const struct pci_device_id piix_pci_tbl[] = { /* ICH7/7-R (i945, i975) UDMA 100*/ { 0x8086, 0x27DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, { 0x8086, 0x269E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, - { 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, /* ICH8 Mobile PATA Controller */ { 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, @@ -229,25 +232,28 @@ static const struct pci_device_id piix_pci_tbl[] = { /* 82801FB/FW (ICH6/ICH6W) */ { 0x8086, 0x2651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata }, /* 82801FR/FRW (ICH6R/ICH6RW) */ - { 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, - /* 82801FBM ICH6M (ICH6R with only port 0 and 2 implemented) */ - { 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci }, + { 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata }, + /* 82801FBM ICH6M (ICH6R with only port 0 and 2 implemented). + * Attach iff the controller is in IDE mode. */ + { 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID, + PCI_CLASS_STORAGE_IDE << 8, 0xffff00, ich6m_sata }, /* 82801GB/GR/GH (ICH7, identical to ICH6) */ - { 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, + { 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata }, /* 2801GBM/GHM (ICH7M, identical to ICH6M) */ - { 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci }, + { 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata }, /* Enterprise Southbridge 2 (631xESB/632xESB) */ - { 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci }, + { 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata }, /* SATA Controller 1 IDE (ICH8) */ - { 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, + { 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, /* SATA Controller 2 IDE (ICH8) */ { 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, - /* Mobile SATA Controller IDE (ICH8M) */ - { 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, /* Mobile SATA Controller IDE (ICH8M), Apple */ - { 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata_ahci }, + { 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata }, + { 0x8086, 0x2828, 0x106b, 0x00a1, 0, 0, ich8m_apple_sata }, + /* Mobile SATA Controller IDE (ICH8M) */ + { 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, /* SATA Controller IDE (ICH9) */ - { 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, + { 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, /* SATA Controller IDE (ICH9) */ { 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, /* SATA Controller IDE (ICH9) */ @@ -257,15 +263,15 @@ static const struct pci_device_id piix_pci_tbl[] = { /* SATA Controller IDE (ICH9M) */ { 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, /* SATA Controller IDE (ICH9M) */ - { 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, + { 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, /* SATA Controller IDE (Tolapai) */ - { 0x8086, 0x5028, PCI_ANY_ID, PCI_ANY_ID, 0, 0, tolapai_sata_ahci }, + { 0x8086, 0x5028, PCI_ANY_ID, PCI_ANY_ID, 0, 0, tolapai_sata }, /* SATA Controller IDE (ICH10) */ - { 0x8086, 0x3a00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, + { 0x8086, 0x3a00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, /* SATA Controller IDE (ICH10) */ { 0x8086, 0x3a06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, /* SATA Controller IDE (ICH10) */ - { 0x8086, 0x3a20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci }, + { 0x8086, 0x3a20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata }, /* SATA Controller IDE (ICH10) */ { 0x8086, 0x3a26, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata }, @@ -284,112 +290,37 @@ static struct pci_driver piix_pci_driver = { }; static struct scsi_host_template piix_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations piix_pata_ops = { +static struct ata_port_operations piix_pata_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = ata_cable_40wire, .set_piomode = piix_set_piomode, .set_dmamode = piix_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = piix_pata_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, + .prereset = piix_pata_prereset, +}; - .port_start = ata_port_start, +static struct ata_port_operations piix_vmw_ops = { + .inherits = &piix_pata_ops, + .bmdma_status = piix_vmw_bmdma_status, }; -static const struct ata_port_operations ich_pata_ops = { - .set_piomode = piix_set_piomode, - .set_dmamode = ich_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = piix_pata_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, +static struct ata_port_operations ich_pata_ops = { + .inherits = &piix_pata_ops, .cable_detect = ich_pata_cable_detect, + .set_dmamode = ich_set_dmamode, +}; - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_port_start, +static struct ata_port_operations piix_sata_ops = { + .inherits = &ata_bmdma_port_ops, }; -static const struct ata_port_operations piix_sata_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_port_start, +static struct ata_port_operations piix_sidpr_sata_ops = { + .inherits = &piix_sata_ops, + .hardreset = sata_std_hardreset, + .scr_read = piix_sidpr_scr_read, + .scr_write = piix_sidpr_scr_write, }; static const struct piix_map_db ich5_map_db = { @@ -488,18 +419,16 @@ static const struct piix_map_db tolapai_map_db = { static const struct piix_map_db *piix_map_db_table[] = { [ich5_sata] = &ich5_map_db, [ich6_sata] = &ich6_map_db, - [ich6_sata_ahci] = &ich6_map_db, - [ich6m_sata_ahci] = &ich6m_map_db, - [ich8_sata_ahci] = &ich8_map_db, + [ich6m_sata] = &ich6m_map_db, + [ich8_sata] = &ich8_map_db, [ich8_2port_sata] = &ich8_2port_map_db, - [ich8m_apple_sata_ahci] = &ich8m_apple_map_db, - [tolapai_sata_ahci] = &tolapai_map_db, + [ich8m_apple_sata] = &ich8m_apple_map_db, + [tolapai_sata] = &tolapai_map_db, }; static struct ata_port_info piix_port_info[] = { [piix_pata_mwdma] = /* PIIX3 MWDMA only */ { - .sht = &piix_sht, .flags = PIIX_PATA_FLAGS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x06, /* mwdma1-2 ?? CHECK 0 should be ok but slow */ @@ -508,7 +437,6 @@ static struct ata_port_info piix_port_info[] = { [piix_pata_33] = /* PIIX4 at 33MHz */ { - .sht = &piix_sht, .flags = PIIX_PATA_FLAGS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x06, /* mwdma1-2 ?? CHECK 0 should be ok but slow */ @@ -518,7 +446,6 @@ static struct ata_port_info piix_port_info[] = { [ich_pata_33] = /* ICH0 - ICH at 33Mhz*/ { - .sht = &piix_sht, .flags = PIIX_PATA_FLAGS, .pio_mask = 0x1f, /* pio 0-4 */ .mwdma_mask = 0x06, /* Check: maybe 0x07 */ @@ -528,7 +455,6 @@ static struct ata_port_info piix_port_info[] = { [ich_pata_66] = /* ICH controllers up to 66MHz */ { - .sht = &piix_sht, .flags = PIIX_PATA_FLAGS, .pio_mask = 0x1f, /* pio 0-4 */ .mwdma_mask = 0x06, /* MWDMA0 is broken on chip */ @@ -538,7 +464,6 @@ static struct ata_port_info piix_port_info[] = { [ich_pata_100] = { - .sht = &piix_sht, .flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x06, /* mwdma1-2 */ @@ -548,7 +473,6 @@ static struct ata_port_info piix_port_info[] = { [ich5_sata] = { - .sht = &piix_sht, .flags = PIIX_SATA_FLAGS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ @@ -558,78 +482,65 @@ static struct ata_port_info piix_port_info[] = { [ich6_sata] = { - .sht = &piix_sht, - .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SCR, + .flags = PIIX_SATA_FLAGS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA6, .port_ops = &piix_sata_ops, }, - [ich6_sata_ahci] = + [ich6m_sata] = { - .sht = &piix_sht, - .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SCR | - PIIX_FLAG_AHCI, + .flags = PIIX_SATA_FLAGS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA6, .port_ops = &piix_sata_ops, }, - [ich6m_sata_ahci] = + [ich8_sata] = { - .sht = &piix_sht, - .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SCR | - PIIX_FLAG_AHCI, + .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA6, .port_ops = &piix_sata_ops, }, - [ich8_sata_ahci] = + [ich8_2port_sata] = { - .sht = &piix_sht, - .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SCR | - PIIX_FLAG_AHCI, + .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA6, .port_ops = &piix_sata_ops, }, - [ich8_2port_sata] = + [tolapai_sata] = { - .sht = &piix_sht, - .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SCR | - PIIX_FLAG_AHCI, + .flags = PIIX_SATA_FLAGS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA6, .port_ops = &piix_sata_ops, }, - [tolapai_sata_ahci] = + [ich8m_apple_sata] = { - .sht = &piix_sht, - .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SCR | - PIIX_FLAG_AHCI, + .flags = PIIX_SATA_FLAGS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA6, .port_ops = &piix_sata_ops, }, - [ich8m_apple_sata_ahci] = + [piix_pata_vmw] = { - .sht = &piix_sht, - .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SCR | - PIIX_FLAG_AHCI, + .flags = PIIX_PATA_FLAGS, .pio_mask = 0x1f, /* pio0-4 */ - .mwdma_mask = 0x07, /* mwdma0-2 */ - .udma_mask = ATA_UDMA6, - .port_ops = &piix_sata_ops, + .mwdma_mask = 0x06, /* mwdma1-2 ?? CHECK 0 should be ok but slow */ + .udma_mask = ATA_UDMA_MASK_40C, + .port_ops = &piix_vmw_ops, }, }; @@ -663,6 +574,9 @@ static const struct ich_laptop ich_laptop[] = { { 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */ { 0x27DF, 0x103C, 0x30A1 }, /* ICH7 on HP Compaq nc2400 */ { 0x24CA, 0x1025, 0x0061 }, /* ICH4 on ACER Aspire 2023WLMi */ + { 0x24CA, 0x1025, 0x003d }, /* ICH4 on ACER TM290 */ + { 0x266F, 0x1025, 0x0066 }, /* ICH6 on ACER Aspire 1694WLMi */ + { 0x2653, 0x1043, 0x82D8 }, /* ICH6M on Asus Eee 701 */ /* end marker */ { 0, } }; @@ -717,13 +631,7 @@ static int piix_pata_prereset(struct ata_link *link, unsigned long deadline) if (!pci_test_config_bits(pdev, &piix_enable_bits[ap->port_no])) return -ENOENT; - return ata_std_prereset(link, deadline); -} - -static void piix_pata_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, piix_pata_prereset, ata_std_softreset, NULL, - ata_std_postreset); + return ata_sff_prereset(link, deadline); } /** @@ -778,7 +686,7 @@ static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev) if (is_slave) { /* clear TIME1|IE1|PPE1|DTE1 */ master_data &= 0xff0f; - /* Enable SITRE (seperate slave timing register) */ + /* Enable SITRE (separate slave timing register) */ master_data |= 0x4000; /* enable PPE1, IE1 and TIME1 as needed */ master_data |= (control << 4); @@ -964,6 +872,151 @@ static void ich_set_dmamode(struct ata_port *ap, struct ata_device *adev) do_pata_set_dmamode(ap, adev, 1); } +/* + * Serial ATA Index/Data Pair Superset Registers access + * + * Beginning from ICH8, there's a sane way to access SCRs using index + * and data register pair located at BAR5. This creates an + * interesting problem of mapping two SCRs to one port. + * + * Although they have separate SCRs, the master and slave aren't + * independent enough to be treated as separate links - e.g. softreset + * resets both. Also, there's no protocol defined for hard resetting + * singled device sharing the virtual port (no defined way to acquire + * device signature). This is worked around by merging the SCR values + * into one sensible value and requesting follow-up SRST after + * hardreset. + * + * SCR merging is perfomed in nibbles which is the unit contents in + * SCRs are organized. If two values are equal, the value is used. + * When they differ, merge table which lists precedence of possible + * values is consulted and the first match or the last entry when + * nothing matches is used. When there's no merge table for the + * specific nibble, value from the first port is used. + */ +static const int piix_sidx_map[] = { + [SCR_STATUS] = 0, + [SCR_ERROR] = 2, + [SCR_CONTROL] = 1, +}; + +static void piix_sidpr_sel(struct ata_device *dev, unsigned int reg) +{ + struct ata_port *ap = dev->link->ap; + struct piix_host_priv *hpriv = ap->host->private_data; + + iowrite32(((ap->port_no * 2 + dev->devno) << 8) | piix_sidx_map[reg], + hpriv->sidpr + PIIX_SIDPR_IDX); +} + +static int piix_sidpr_read(struct ata_device *dev, unsigned int reg) +{ + struct piix_host_priv *hpriv = dev->link->ap->host->private_data; + + piix_sidpr_sel(dev, reg); + return ioread32(hpriv->sidpr + PIIX_SIDPR_DATA); +} + +static void piix_sidpr_write(struct ata_device *dev, unsigned int reg, u32 val) +{ + struct piix_host_priv *hpriv = dev->link->ap->host->private_data; + + piix_sidpr_sel(dev, reg); + iowrite32(val, hpriv->sidpr + PIIX_SIDPR_DATA); +} + +static u32 piix_merge_scr(u32 val0, u32 val1, const int * const *merge_tbl) +{ + u32 val = 0; + int i, mi; + + for (i = 0, mi = 0; i < 32 / 4; i++) { + u8 c0 = (val0 >> (i * 4)) & 0xf; + u8 c1 = (val1 >> (i * 4)) & 0xf; + u8 merged = c0; + const int *cur; + + /* if no merge preference, assume the first value */ + cur = merge_tbl[mi]; + if (!cur) + goto done; + mi++; + + /* if two values equal, use it */ + if (c0 == c1) + goto done; + + /* choose the first match or the last from the merge table */ + while (*cur != -1) { + if (c0 == *cur || c1 == *cur) + break; + cur++; + } + if (*cur == -1) + cur--; + merged = *cur; + done: + val |= merged << (i * 4); + } + + return val; +} + +static int piix_sidpr_scr_read(struct ata_port *ap, unsigned int reg, u32 *val) +{ + const int * const sstatus_merge_tbl[] = { + /* DET */ (const int []){ 1, 3, 0, 4, 3, -1 }, + /* SPD */ (const int []){ 2, 1, 0, -1 }, + /* IPM */ (const int []){ 6, 2, 1, 0, -1 }, + NULL, + }; + const int * const scontrol_merge_tbl[] = { + /* DET */ (const int []){ 1, 0, 4, 0, -1 }, + /* SPD */ (const int []){ 0, 2, 1, 0, -1 }, + /* IPM */ (const int []){ 0, 1, 2, 3, 0, -1 }, + NULL, + }; + u32 v0, v1; + + if (reg >= ARRAY_SIZE(piix_sidx_map)) + return -EINVAL; + + if (!(ap->flags & ATA_FLAG_SLAVE_POSS)) { + *val = piix_sidpr_read(&ap->link.device[0], reg); + return 0; + } + + v0 = piix_sidpr_read(&ap->link.device[0], reg); + v1 = piix_sidpr_read(&ap->link.device[1], reg); + + switch (reg) { + case SCR_STATUS: + *val = piix_merge_scr(v0, v1, sstatus_merge_tbl); + break; + case SCR_ERROR: + *val = v0 | v1; + break; + case SCR_CONTROL: + *val = piix_merge_scr(v0, v1, scontrol_merge_tbl); + break; + } + + return 0; +} + +static int piix_sidpr_scr_write(struct ata_port *ap, unsigned int reg, u32 val) +{ + if (reg >= ARRAY_SIZE(piix_sidx_map)) + return -EINVAL; + + piix_sidpr_write(&ap->link.device[0], reg, val); + + if (ap->flags & ATA_FLAG_SLAVE_POSS) + piix_sidpr_write(&ap->link.device[1], reg, val); + + return 0; +} + #ifdef CONFIG_PM static int piix_broken_suspend(void) { @@ -997,6 +1050,13 @@ static int piix_broken_suspend(void) }, }, { + .ident = "TECRA M6", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), + DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M6"), + }, + }, + { .ident = "TECRA M7", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), @@ -1011,6 +1071,13 @@ static int piix_broken_suspend(void) }, }, { + .ident = "Satellite R20", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), + DMI_MATCH(DMI_PRODUCT_NAME, "Satellite R20"), + }, + }, + { .ident = "Satellite R25", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), @@ -1092,7 +1159,7 @@ static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) * cycles and power trying to do something to the sleeping * beauty. */ - if (piix_broken_suspend() && mesg.event == PM_EVENT_SUSPEND) { + if (piix_broken_suspend() && (mesg.event & PM_EVENT_SUSPEND)) { pci_save_state(pdev); /* mark its power state as "unknown", since we don't @@ -1144,6 +1211,11 @@ static int piix_pci_device_resume(struct pci_dev *pdev) } #endif +static u8 piix_vmw_bmdma_status(struct ata_port *ap) +{ + return ata_bmdma_status(ap) & ~ATA_DMA_ERR; +} + #define AHCI_PCI_BAR 5 #define AHCI_GLOBAL_CTL 0x04 #define AHCI_ENABLE (1 << 31) @@ -1192,18 +1264,16 @@ static int __devinit piix_check_450nx_errata(struct pci_dev *ata_dev) struct pci_dev *pdev = NULL; u16 cfg; int no_piix_dma = 0; - u8 pdev_revision; while ((pdev = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, pdev)) != NULL) { /* Look for 450NX PXB. Check for problem configurations A PCI quirk checks bit 6 already */ pci_read_config_word(pdev, 0x41, &cfg); - pci_read_config_byte(pdev, PCI_REVISION_ID, &pdev_revision); /* Only on the original revision: IDE DMA can hang */ - if (pdev_revision == 0x00) + if (pdev->revision == 0x00) no_piix_dma = 1; /* On all revisions below 5 PXB bus lock must be disabled for IDE */ - else if (cfg & (1<<14) && pdev_revision < 5) + else if (cfg & (1<<14) && pdev->revision < 5) no_piix_dma = 2; } if (no_piix_dma) @@ -1213,10 +1283,10 @@ static int __devinit piix_check_450nx_errata(struct pci_dev *ata_dev) return no_piix_dma; } -static void __devinit piix_init_pcs(struct pci_dev *pdev, - struct ata_port_info *pinfo, +static void __devinit piix_init_pcs(struct ata_host *host, const struct piix_map_db *map_db) { + struct pci_dev *pdev = to_pci_dev(host->dev); u16 pcs, new_pcs; pci_read_config_word(pdev, ICH5_PCS, &pcs); @@ -1230,11 +1300,10 @@ static void __devinit piix_init_pcs(struct pci_dev *pdev, } } -static void __devinit piix_init_sata_map(struct pci_dev *pdev, - struct ata_port_info *pinfo, - const struct piix_map_db *map_db) +static const int *__devinit piix_init_sata_map(struct pci_dev *pdev, + struct ata_port_info *pinfo, + const struct piix_map_db *map_db) { - struct piix_host_priv *hpriv = pinfo[0].private_data; const int *map; int i, invalid_map = 0; u8 map_value; @@ -1258,7 +1327,6 @@ static void __devinit piix_init_sata_map(struct pci_dev *pdev, case IDE: WARN_ON((i & 1) || map[i + 1] != IDE); pinfo[i / 2] = piix_port_info[ich_pata_100]; - pinfo[i / 2].private_data = hpriv; i++; printk(" IDE IDE"); break; @@ -1276,7 +1344,58 @@ static void __devinit piix_init_sata_map(struct pci_dev *pdev, dev_printk(KERN_ERR, &pdev->dev, "invalid MAP value %u\n", map_value); - hpriv->map = map; + return map; +} + +static void __devinit piix_init_sidpr(struct ata_host *host) +{ + struct pci_dev *pdev = to_pci_dev(host->dev); + struct piix_host_priv *hpriv = host->private_data; + struct ata_device *dev0 = &host->ports[0]->link.device[0]; + u32 scontrol; + int i; + + /* check for availability */ + for (i = 0; i < 4; i++) + if (hpriv->map[i] == IDE) + return; + + if (!(host->ports[0]->flags & PIIX_FLAG_SIDPR)) + return; + + if (pci_resource_start(pdev, PIIX_SIDPR_BAR) == 0 || + pci_resource_len(pdev, PIIX_SIDPR_BAR) != PIIX_SIDPR_LEN) + return; + + if (pcim_iomap_regions(pdev, 1 << PIIX_SIDPR_BAR, DRV_NAME)) + return; + + hpriv->sidpr = pcim_iomap_table(pdev)[PIIX_SIDPR_BAR]; + + /* SCR access via SIDPR doesn't work on some configurations. + * Give it a test drive by inhibiting power save modes which + * we'll do anyway. + */ + scontrol = piix_sidpr_read(dev0, SCR_CONTROL); + + /* if IPM is already 3, SCR access is probably working. Don't + * un-inhibit power save modes as BIOS might have inhibited + * them for a reason. + */ + if ((scontrol & 0xf00) != 0x300) { + scontrol |= 0x300; + piix_sidpr_write(dev0, SCR_CONTROL, scontrol); + scontrol = piix_sidpr_read(dev0, SCR_CONTROL); + + if ((scontrol & 0xf00) != 0x300) { + dev_printk(KERN_INFO, host->dev, "SCR access via " + "SIDPR is available but doesn't work\n"); + return; + } + } + + host->ports[0]->ops = &piix_sidpr_sata_ops; + host->ports[1]->ops = &piix_sidpr_sata_ops; } static void piix_iocfg_bit18_quirk(struct pci_dev *pdev) @@ -1329,14 +1448,17 @@ static void piix_iocfg_bit18_quirk(struct pci_dev *pdev) * Zero on success, or -ERRNO value. */ -static int piix_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) +static int __devinit piix_init_one(struct pci_dev *pdev, + const struct pci_device_id *ent) { static int printed_version; struct device *dev = &pdev->dev; struct ata_port_info port_info[2]; const struct ata_port_info *ppi[] = { &port_info[0], &port_info[1] }; - struct piix_host_priv *hpriv; unsigned long port_flags; + struct ata_host *host; + struct piix_host_priv *hpriv; + int rc; if (!printed_version++) dev_printk(KERN_DEBUG, &pdev->dev, @@ -1346,33 +1468,44 @@ static int piix_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) if (!in_module_init) return -ENODEV; - hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL); - if (!hpriv) - return -ENOMEM; - port_info[0] = piix_port_info[ent->driver_data]; port_info[1] = piix_port_info[ent->driver_data]; - port_info[0].private_data = hpriv; - port_info[1].private_data = hpriv; port_flags = port_info[0].flags; - if (port_flags & PIIX_FLAG_AHCI) { - u8 tmp; - pci_read_config_byte(pdev, PIIX_SCC, &tmp); - if (tmp == PIIX_AHCI_DEVICE) { - int rc = piix_disable_ahci(pdev); - if (rc) - return rc; - } + /* enable device and prepare host */ + rc = pcim_enable_device(pdev); + if (rc) + return rc; + + /* ICH6R may be driven by either ata_piix or ahci driver + * regardless of BIOS configuration. Make sure AHCI mode is + * off. + */ + if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2652) { + int rc = piix_disable_ahci(pdev); + if (rc) + return rc; } - /* Initialize SATA map */ + /* SATA map init can change port_info, do it before prepping host */ + hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL); + if (!hpriv) + return -ENOMEM; + + if (port_flags & ATA_FLAG_SATA) + hpriv->map = piix_init_sata_map(pdev, port_info, + piix_map_db_table[ent->driver_data]); + + rc = ata_pci_sff_prepare_host(pdev, ppi, &host); + if (rc) + return rc; + host->private_data = hpriv; + + /* initialize controller */ if (port_flags & ATA_FLAG_SATA) { - piix_init_sata_map(pdev, port_info, - piix_map_db_table[ent->driver_data]); - piix_init_pcs(pdev, port_info, - piix_map_db_table[ent->driver_data]); + piix_init_pcs(host, piix_map_db_table[ent->driver_data]); + piix_init_sidpr(host); } /* apply IOCFG bit18 quirk */ @@ -1391,12 +1524,14 @@ static int piix_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) /* This writes into the master table but it does not really matter for this errata as we will apply it to all the PIIX devices on the board */ - port_info[0].mwdma_mask = 0; - port_info[0].udma_mask = 0; - port_info[1].mwdma_mask = 0; - port_info[1].udma_mask = 0; + host->ports[0]->mwdma_mask = 0; + host->ports[0]->udma_mask = 0; + host->ports[1]->mwdma_mask = 0; + host->ports[1]->udma_mask = 0; } - return ata_pci_init_one(pdev, ppi); + + pci_set_master(pdev); + return ata_pci_sff_activate_host(host, ata_sff_interrupt, &piix_sht); } static int __init piix_init(void) diff --git a/drivers/ata/libata-acpi.c b/drivers/ata/libata-acpi.c index 7bf4bef..3ff8b14 100644 --- a/drivers/ata/libata-acpi.c +++ b/drivers/ata/libata-acpi.c @@ -77,7 +77,7 @@ void ata_acpi_associate_sata_port(struct ata_port *ap) { WARN_ON(!(ap->flags & ATA_FLAG_ACPI_SATA)); - if (!ap->nr_pmp_links) { + if (!sata_pmp_attached(ap)) { acpi_integer adr = SATA_ADR(ap->port_no, NO_PORT_MULT); ap->link.device->acpi_handle = @@ -118,45 +118,163 @@ static void ata_acpi_associate_ide_port(struct ata_port *ap) ap->pflags |= ATA_PFLAG_INIT_GTM_VALID; } -static void ata_acpi_handle_hotplug(struct ata_port *ap, struct kobject *kobj, - u32 event) +static void ata_acpi_eject_device(acpi_handle handle) +{ + struct acpi_object_list arg_list; + union acpi_object arg; + + arg_list.count = 1; + arg_list.pointer = &arg; + arg.type = ACPI_TYPE_INTEGER; + arg.integer.value = 1; + + if (ACPI_FAILURE(acpi_evaluate_object(handle, "_EJ0", + &arg_list, NULL))) + printk(KERN_ERR "Failed to evaluate _EJ0!\n"); +} + +/* @ap and @dev are the same as ata_acpi_handle_hotplug() */ +static void ata_acpi_detach_device(struct ata_port *ap, struct ata_device *dev) +{ + if (dev) + dev->flags |= ATA_DFLAG_DETACH; + else { + struct ata_link *tlink; + struct ata_device *tdev; + + ata_port_for_each_link(tlink, ap) + ata_link_for_each_dev(tdev, tlink) + tdev->flags |= ATA_DFLAG_DETACH; + } + + ata_port_schedule_eh(ap); +} + +/** + * ata_acpi_handle_hotplug - ACPI event handler backend + * @ap: ATA port ACPI event occurred + * @dev: ATA device ACPI event occurred (can be NULL) + * @event: ACPI event which occurred + * @is_dock_event: boolean indicating whether the event was a dock one + * + * All ACPI bay / device realted events end up in this function. If + * the event is port-wide @dev is NULL. If the event is specific to a + * device, @dev points to it. + * + * Hotplug (as opposed to unplug) notification is always handled as + * port-wide while unplug only kills the target device on device-wide + * event. + * + * LOCKING: + * ACPI notify handler context. May sleep. + */ +static void ata_acpi_handle_hotplug(struct ata_port *ap, struct ata_device *dev, + u32 event, int is_dock_event) { char event_string[12]; char *envp[] = { event_string, NULL }; struct ata_eh_info *ehi = &ap->link.eh_info; + struct kobject *kobj = NULL; + int wait = 0; + unsigned long flags; + acpi_handle handle, tmphandle; + unsigned long sta; + acpi_status status; + + if (dev) { + if (dev->sdev) + kobj = &dev->sdev->sdev_gendev.kobj; + handle = dev->acpi_handle; + } else { + kobj = &ap->dev->kobj; + handle = ap->acpi_handle; + } + + status = acpi_get_handle(handle, "_EJ0", &tmphandle); + if (ACPI_FAILURE(status)) + /* This device does not support hotplug */ + return; + + spin_lock_irqsave(ap->lock, flags); + + switch (event) { + case ACPI_NOTIFY_BUS_CHECK: + case ACPI_NOTIFY_DEVICE_CHECK: + ata_ehi_push_desc(ehi, "ACPI event"); + + status = acpi_evaluate_integer(handle, "_STA", NULL, &sta); + if (ACPI_FAILURE(status)) { + ata_port_printk(ap, KERN_ERR, + "acpi: failed to determine bay status (0x%x)\n", + status); + break; + } + + if (sta) { + ata_ehi_hotplugged(ehi); + ata_port_freeze(ap); + } else { + /* The device has gone - unplug it */ + ata_acpi_detach_device(ap, dev); + wait = 1; + } + break; + case ACPI_NOTIFY_EJECT_REQUEST: + ata_ehi_push_desc(ehi, "ACPI event"); + + if (!is_dock_event) + break; - if (event == 0 || event == 1) { - unsigned long flags; - spin_lock_irqsave(ap->lock, flags); - ata_ehi_clear_desc(ehi); - ata_ehi_push_desc(ehi, "ACPI event"); - ata_ehi_hotplugged(ehi); - ata_port_freeze(ap); - spin_unlock_irqrestore(ap->lock, flags); + /* undock event - immediate unplug */ + ata_acpi_detach_device(ap, dev); + wait = 1; + break; } - if (kobj) { + /* make sure kobj doesn't go away while ap->lock is released */ + kobject_get(kobj); + + spin_unlock_irqrestore(ap->lock, flags); + + if (wait) { + ata_port_wait_eh(ap); + ata_acpi_eject_device(handle); + } + + if (kobj && !is_dock_event) { sprintf(event_string, "BAY_EVENT=%d", event); kobject_uevent_env(kobj, KOBJ_CHANGE, envp); } + + kobject_put(kobj); } -static void ata_acpi_dev_notify(acpi_handle handle, u32 event, void *data) +static void ata_acpi_dev_notify_dock(acpi_handle handle, u32 event, void *data) { struct ata_device *dev = data; - struct kobject *kobj = NULL; - if (dev->sdev) - kobj = &dev->sdev->sdev_gendev.kobj; + ata_acpi_handle_hotplug(dev->link->ap, dev, event, 1); +} + +static void ata_acpi_ap_notify_dock(acpi_handle handle, u32 event, void *data) +{ + struct ata_port *ap = data; + + ata_acpi_handle_hotplug(ap, NULL, event, 1); +} + +static void ata_acpi_dev_notify(acpi_handle handle, u32 event, void *data) +{ + struct ata_device *dev = data; - ata_acpi_handle_hotplug(dev->link->ap, kobj, event); + ata_acpi_handle_hotplug(dev->link->ap, dev, event, 0); } static void ata_acpi_ap_notify(acpi_handle handle, u32 event, void *data) { struct ata_port *ap = data; - ata_acpi_handle_hotplug(ap, &ap->dev->kobj, event); + ata_acpi_handle_hotplug(ap, NULL, event, 0); } /** @@ -191,20 +309,26 @@ void ata_acpi_associate(struct ata_host *host) else ata_acpi_associate_ide_port(ap); - if (ap->acpi_handle) - acpi_install_notify_handler (ap->acpi_handle, - ACPI_SYSTEM_NOTIFY, - ata_acpi_ap_notify, - ap); + if (ap->acpi_handle) { + acpi_install_notify_handler(ap->acpi_handle, + ACPI_SYSTEM_NOTIFY, + ata_acpi_ap_notify, ap); + /* we might be on a docking station */ + register_hotplug_dock_device(ap->acpi_handle, + ata_acpi_ap_notify_dock, ap); + } for (j = 0; j < ata_link_max_devices(&ap->link); j++) { struct ata_device *dev = &ap->link.device[j]; - if (dev->acpi_handle) - acpi_install_notify_handler (dev->acpi_handle, - ACPI_SYSTEM_NOTIFY, - ata_acpi_dev_notify, - dev); + if (dev->acpi_handle) { + acpi_install_notify_handler(dev->acpi_handle, + ACPI_SYSTEM_NOTIFY, + ata_acpi_dev_notify, dev); + /* we might be on a docking station */ + register_hotplug_dock_device(dev->acpi_handle, + ata_acpi_dev_notify_dock, dev); + } } } } @@ -382,7 +506,7 @@ static int ata_dev_get_GTF(struct ata_device *dev, struct ata_acpi_gtf **gtf) if (ata_msg_probe(ap)) ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER: port#: %d\n", - __FUNCTION__, ap->port_no); + __func__, ap->port_no); /* _GTF has no input parameters */ status = acpi_evaluate_object(dev->acpi_handle, "_GTF", NULL, &output); @@ -402,7 +526,7 @@ static int ata_dev_get_GTF(struct ata_device *dev, struct ata_acpi_gtf **gtf) if (ata_msg_probe(ap)) ata_dev_printk(dev, KERN_DEBUG, "%s: Run _GTF: " "length or ptr is NULL (0x%llx, 0x%p)\n", - __FUNCTION__, + __func__, (unsigned long long)output.length, output.pointer); rc = -EINVAL; @@ -432,7 +556,7 @@ static int ata_dev_get_GTF(struct ata_device *dev, struct ata_acpi_gtf **gtf) if (ata_msg_probe(ap)) ata_dev_printk(dev, KERN_DEBUG, "%s: returning gtf=%p, gtf_count=%d\n", - __FUNCTION__, *gtf, rc); + __func__, *gtf, rc); } return rc; @@ -442,40 +566,77 @@ static int ata_dev_get_GTF(struct ata_device *dev, struct ata_acpi_gtf **gtf) } /** + * ata_acpi_gtm_xfermode - determine xfermode from GTM parameter + * @dev: target device + * @gtm: GTM parameter to use + * + * Determine xfermask for @dev from @gtm. + * + * LOCKING: + * None. + * + * RETURNS: + * Determined xfermask. + */ +unsigned long ata_acpi_gtm_xfermask(struct ata_device *dev, + const struct ata_acpi_gtm *gtm) +{ + unsigned long xfer_mask = 0; + unsigned int type; + int unit; + u8 mode; + + /* we always use the 0 slot for crap hardware */ + unit = dev->devno; + if (!(gtm->flags & 0x10)) + unit = 0; + + /* PIO */ + mode = ata_timing_cycle2mode(ATA_SHIFT_PIO, gtm->drive[unit].pio); + xfer_mask |= ata_xfer_mode2mask(mode); + + /* See if we have MWDMA or UDMA data. We don't bother with + * MWDMA if UDMA is available as this means the BIOS set UDMA + * and our error changedown if it works is UDMA to PIO anyway. + */ + if (!(gtm->flags & (1 << (2 * unit)))) + type = ATA_SHIFT_MWDMA; + else + type = ATA_SHIFT_UDMA; + + mode = ata_timing_cycle2mode(type, gtm->drive[unit].dma); + xfer_mask |= ata_xfer_mode2mask(mode); + + return xfer_mask; +} +EXPORT_SYMBOL_GPL(ata_acpi_gtm_xfermask); + +/** * ata_acpi_cbl_80wire - Check for 80 wire cable * @ap: Port to check + * @gtm: GTM data to use * - * Return 1 if the ACPI mode data for this port indicates the BIOS selected - * an 80wire mode. + * Return 1 if the @gtm indicates the BIOS selected an 80wire mode. */ - -int ata_acpi_cbl_80wire(struct ata_port *ap) +int ata_acpi_cbl_80wire(struct ata_port *ap, const struct ata_acpi_gtm *gtm) { - const struct ata_acpi_gtm *gtm = ata_acpi_init_gtm(ap); - int valid = 0; + struct ata_device *dev; - if (!gtm) - return 0; + ata_link_for_each_dev(dev, &ap->link) { + unsigned long xfer_mask, udma_mask; + + if (!ata_dev_enabled(dev)) + continue; + + xfer_mask = ata_acpi_gtm_xfermask(dev, gtm); + ata_unpack_xfermask(xfer_mask, NULL, NULL, &udma_mask); + + if (udma_mask & ~ATA_UDMA_MASK_40C) + return 1; + } - /* Split timing, DMA enabled */ - if ((gtm->flags & 0x11) == 0x11 && gtm->drive[0].dma < 55) - valid |= 1; - if ((gtm->flags & 0x14) == 0x14 && gtm->drive[1].dma < 55) - valid |= 2; - /* Shared timing, DMA enabled */ - if ((gtm->flags & 0x11) == 0x01 && gtm->drive[0].dma < 55) - valid |= 1; - if ((gtm->flags & 0x14) == 0x04 && gtm->drive[0].dma < 55) - valid |= 2; - - /* Drive check */ - if ((valid & 1) && ata_dev_enabled(&ap->link.device[0])) - return 1; - if ((valid & 2) && ata_dev_enabled(&ap->link.device[1])) - return 1; return 0; } - EXPORT_SYMBOL_GPL(ata_acpi_cbl_80wire); static void ata_acpi_gtf_to_tf(struct ata_device *dev, @@ -688,7 +849,7 @@ static int ata_acpi_push_id(struct ata_device *dev) if (ata_msg_probe(ap)) ata_dev_printk(dev, KERN_DEBUG, "%s: ix = %d, port#: %d\n", - __FUNCTION__, dev->devno, ap->port_no); + __func__, dev->devno, ap->port_no); /* Give the drive Identify data to the drive via the _SDD method */ /* _SDD: set up input parameters */ @@ -760,7 +921,8 @@ void ata_acpi_on_resume(struct ata_port *ap) */ ata_link_for_each_dev(dev, &ap->link) { ata_acpi_clear_gtf(dev); - if (ata_dev_get_GTF(dev, NULL) >= 0) + if (ata_dev_enabled(dev) && + ata_dev_get_GTF(dev, NULL) >= 0) dev->flags |= ATA_DFLAG_ACPI_PENDING; } } else { @@ -770,12 +932,43 @@ void ata_acpi_on_resume(struct ata_port *ap) */ ata_link_for_each_dev(dev, &ap->link) { ata_acpi_clear_gtf(dev); - dev->flags |= ATA_DFLAG_ACPI_PENDING; + if (ata_dev_enabled(dev)) + dev->flags |= ATA_DFLAG_ACPI_PENDING; } } } /** + * ata_acpi_set_state - set the port power state + * @ap: target ATA port + * @state: state, on/off + * + * This function executes the _PS0/_PS3 ACPI method to set the power state. + * ACPI spec requires _PS0 when IDE power on and _PS3 when power off + */ +void ata_acpi_set_state(struct ata_port *ap, pm_message_t state) +{ + struct ata_device *dev; + + if (!ap->acpi_handle || (ap->flags & ATA_FLAG_ACPI_SATA)) + return; + + /* channel first and then drives for power on and vica versa + for power off */ + if (state.event == PM_EVENT_ON) + acpi_bus_set_power(ap->acpi_handle, ACPI_STATE_D0); + + ata_link_for_each_dev(dev, &ap->link) { + if (dev->acpi_handle && ata_dev_enabled(dev)) + acpi_bus_set_power(dev->acpi_handle, + state.event == PM_EVENT_ON ? + ACPI_STATE_D0 : ACPI_STATE_D3); + } + if (state.event != PM_EVENT_ON) + acpi_bus_set_power(ap->acpi_handle, ACPI_STATE_D3); +} + +/** * ata_acpi_on_devcfg - ATA ACPI hook called on device donfiguration * @dev: target ATA device * diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index 8a6d90e..c2d1cca 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c @@ -46,7 +46,6 @@ #include <linux/init.h> #include <linux/list.h> #include <linux/mm.h> -#include <linux/highmem.h> #include <linux/spinlock.h> #include <linux/blkdev.h> #include <linux/delay.h> @@ -62,7 +61,6 @@ #include <scsi/scsi_cmnd.h> #include <scsi/scsi_host.h> #include <linux/libata.h> -#include <asm/semaphore.h> #include <asm/byteorder.h> #include <linux/cdrom.h> @@ -74,6 +72,19 @@ const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 }; const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 }; const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 }; +const struct ata_port_operations ata_base_port_ops = { + .prereset = ata_std_prereset, + .postreset = ata_std_postreset, + .error_handler = ata_std_error_handler, +}; + +const struct ata_port_operations sata_port_ops = { + .inherits = &ata_base_port_ops, + + .qc_defer = ata_std_qc_defer, + .hardreset = sata_std_hardreset, +}; + static unsigned int ata_dev_init_params(struct ata_device *dev, u16 heads, u16 sectors); static unsigned int ata_dev_set_xfermode(struct ata_device *dev); @@ -83,10 +94,33 @@ static void ata_dev_xfermask(struct ata_device *dev); static unsigned long ata_dev_blacklisted(const struct ata_device *dev); unsigned int ata_print_id = 1; -struct workqueue_struct *ata_wq = NULL; +struct workqueue_struct *ata_wq; struct workqueue_struct *ata_aux_wq; +struct ata_force_param { + const char *name; + unsigned int cbl; + int spd_limit; + unsigned long xfer_mask; + unsigned int horkage_on; + unsigned int horkage_off; +}; + +struct ata_force_ent { + int port; + int device; + struct ata_force_param param; +}; + +static struct ata_force_ent *ata_force_tbl; +static int ata_force_tbl_size; + +static char ata_force_param_buf[PAGE_SIZE] __initdata; +/* param_buf is thrown away after initialization, disallow read */ +module_param_string(force, ata_force_param_buf, sizeof(ata_force_param_buf), 0); +MODULE_PARM_DESC(force, "Force ATA configurations including cable type, link speed and transfer mode (see Documentation/kernel-parameters.txt for details)"); + int atapi_enabled = 1; module_param(atapi_enabled, int, 0444); MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); @@ -115,10 +149,14 @@ static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; module_param(ata_probe_timeout, int, 0444); MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); -int libata_noacpi = 1; +int libata_noacpi = 0; module_param_named(noacpi, libata_noacpi, int, 0444); MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in probe/suspend/resume when set"); +int libata_allow_tpm = 0; +module_param_named(allow_tpm, libata_allow_tpm, int, 0444); +MODULE_PARM_DESC(allow_tpm, "Permit the use of TPM commands"); + MODULE_AUTHOR("Jeff Garzik"); MODULE_DESCRIPTION("Library module for ATA devices"); MODULE_LICENSE("GPL"); @@ -126,6 +164,217 @@ MODULE_VERSION(DRV_VERSION); /** + * ata_force_cbl - force cable type according to libata.force + * @ap: ATA port of interest + * + * Force cable type according to libata.force and whine about it. + * The last entry which has matching port number is used, so it + * can be specified as part of device force parameters. For + * example, both "a:40c,1.00:udma4" and "1.00:40c,udma4" have the + * same effect. + * + * LOCKING: + * EH context. + */ +void ata_force_cbl(struct ata_port *ap) +{ + int i; + + for (i = ata_force_tbl_size - 1; i >= 0; i--) { + const struct ata_force_ent *fe = &ata_force_tbl[i]; + + if (fe->port != -1 && fe->port != ap->print_id) + continue; + + if (fe->param.cbl == ATA_CBL_NONE) + continue; + + ap->cbl = fe->param.cbl; + ata_port_printk(ap, KERN_NOTICE, + "FORCE: cable set to %s\n", fe->param.name); + return; + } +} + +/** + * ata_force_spd_limit - force SATA spd limit according to libata.force + * @link: ATA link of interest + * + * Force SATA spd limit according to libata.force and whine about + * it. When only the port part is specified (e.g. 1:), the limit + * applies to all links connected to both the host link and all + * fan-out ports connected via PMP. If the device part is + * specified as 0 (e.g. 1.00:), it specifies the first fan-out + * link not the host link. Device number 15 always points to the + * host link whether PMP is attached or not. + * + * LOCKING: + * EH context. + */ +static void ata_force_spd_limit(struct ata_link *link) +{ + int linkno, i; + + if (ata_is_host_link(link)) + linkno = 15; + else + linkno = link->pmp; + + for (i = ata_force_tbl_size - 1; i >= 0; i--) { + const struct ata_force_ent *fe = &ata_force_tbl[i]; + + if (fe->port != -1 && fe->port != link->ap->print_id) + continue; + + if (fe->device != -1 && fe->device != linkno) + continue; + + if (!fe->param.spd_limit) + continue; + + link->hw_sata_spd_limit = (1 << fe->param.spd_limit) - 1; + ata_link_printk(link, KERN_NOTICE, + "FORCE: PHY spd limit set to %s\n", fe->param.name); + return; + } +} + +/** + * ata_force_xfermask - force xfermask according to libata.force + * @dev: ATA device of interest + * + * Force xfer_mask according to libata.force and whine about it. + * For consistency with link selection, device number 15 selects + * the first device connected to the host link. + * + * LOCKING: + * EH context. + */ +static void ata_force_xfermask(struct ata_device *dev) +{ + int devno = dev->link->pmp + dev->devno; + int alt_devno = devno; + int i; + + /* allow n.15 for the first device attached to host port */ + if (ata_is_host_link(dev->link) && devno == 0) + alt_devno = 15; + + for (i = ata_force_tbl_size - 1; i >= 0; i--) { + const struct ata_force_ent *fe = &ata_force_tbl[i]; + unsigned long pio_mask, mwdma_mask, udma_mask; + + if (fe->port != -1 && fe->port != dev->link->ap->print_id) + continue; + + if (fe->device != -1 && fe->device != devno && + fe->device != alt_devno) + continue; + + if (!fe->param.xfer_mask) + continue; + + ata_unpack_xfermask(fe->param.xfer_mask, + &pio_mask, &mwdma_mask, &udma_mask); + if (udma_mask) + dev->udma_mask = udma_mask; + else if (mwdma_mask) { + dev->udma_mask = 0; + dev->mwdma_mask = mwdma_mask; + } else { + dev->udma_mask = 0; + dev->mwdma_mask = 0; + dev->pio_mask = pio_mask; + } + + ata_dev_printk(dev, KERN_NOTICE, + "FORCE: xfer_mask set to %s\n", fe->param.name); + return; + } +} + +/** + * ata_force_horkage - force horkage according to libata.force + * @dev: ATA device of interest + * + * Force horkage according to libata.force and whine about it. + * For consistency with link selection, device number 15 selects + * the first device connected to the host link. + * + * LOCKING: + * EH context. + */ +static void ata_force_horkage(struct ata_device *dev) +{ + int devno = dev->link->pmp + dev->devno; + int alt_devno = devno; + int i; + + /* allow n.15 for the first device attached to host port */ + if (ata_is_host_link(dev->link) && devno == 0) + alt_devno = 15; + + for (i = 0; i < ata_force_tbl_size; i++) { + const struct ata_force_ent *fe = &ata_force_tbl[i]; + + if (fe->port != -1 && fe->port != dev->link->ap->print_id) + continue; + + if (fe->device != -1 && fe->device != devno && + fe->device != alt_devno) + continue; + + if (!(~dev->horkage & fe->param.horkage_on) && + !(dev->horkage & fe->param.horkage_off)) + continue; + + dev->horkage |= fe->param.horkage_on; + dev->horkage &= ~fe->param.horkage_off; + + ata_dev_printk(dev, KERN_NOTICE, + "FORCE: horkage modified (%s)\n", fe->param.name); + } +} + +/** + * atapi_cmd_type - Determine ATAPI command type from SCSI opcode + * @opcode: SCSI opcode + * + * Determine ATAPI command type from @opcode. + * + * LOCKING: + * None. + * + * RETURNS: + * ATAPI_{READ|WRITE|READ_CD|PASS_THRU|MISC} + */ +int atapi_cmd_type(u8 opcode) +{ + switch (opcode) { + case GPCMD_READ_10: + case GPCMD_READ_12: + return ATAPI_READ; + + case GPCMD_WRITE_10: + case GPCMD_WRITE_12: + case GPCMD_WRITE_AND_VERIFY_10: + return ATAPI_WRITE; + + case GPCMD_READ_CD: + case GPCMD_READ_CD_MSF: + return ATAPI_READ_CD; + + case ATA_16: + case ATA_12: + if (atapi_passthru16) + return ATAPI_PASS_THRU; + /* fall thru */ + default: + return ATAPI_MISC; + } +} + +/** * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure * @tf: Taskfile to convert * @pmp: Port multiplier port @@ -450,9 +699,9 @@ int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev, * RETURNS: * Packed xfer_mask. */ -static unsigned int ata_pack_xfermask(unsigned int pio_mask, - unsigned int mwdma_mask, - unsigned int udma_mask) +unsigned long ata_pack_xfermask(unsigned long pio_mask, + unsigned long mwdma_mask, + unsigned long udma_mask) { return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | @@ -469,10 +718,8 @@ static unsigned int ata_pack_xfermask(unsigned int pio_mask, * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. * Any NULL distination masks will be ignored. */ -static void ata_unpack_xfermask(unsigned int xfer_mask, - unsigned int *pio_mask, - unsigned int *mwdma_mask, - unsigned int *udma_mask) +void ata_unpack_xfermask(unsigned long xfer_mask, unsigned long *pio_mask, + unsigned long *mwdma_mask, unsigned long *udma_mask) { if (pio_mask) *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; @@ -486,9 +733,9 @@ static const struct ata_xfer_ent { int shift, bits; u8 base; } ata_xfer_tbl[] = { - { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, - { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, - { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, + { ATA_SHIFT_PIO, ATA_NR_PIO_MODES, XFER_PIO_0 }, + { ATA_SHIFT_MWDMA, ATA_NR_MWDMA_MODES, XFER_MW_DMA_0 }, + { ATA_SHIFT_UDMA, ATA_NR_UDMA_MODES, XFER_UDMA_0 }, { -1, }, }; @@ -503,9 +750,9 @@ static const struct ata_xfer_ent { * None. * * RETURNS: - * Matching XFER_* value, 0 if no match found. + * Matching XFER_* value, 0xff if no match found. */ -static u8 ata_xfer_mask2mode(unsigned int xfer_mask) +u8 ata_xfer_mask2mode(unsigned long xfer_mask) { int highbit = fls(xfer_mask) - 1; const struct ata_xfer_ent *ent; @@ -513,7 +760,7 @@ static u8 ata_xfer_mask2mode(unsigned int xfer_mask) for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) if (highbit >= ent->shift && highbit < ent->shift + ent->bits) return ent->base + highbit - ent->shift; - return 0; + return 0xff; } /** @@ -528,13 +775,14 @@ static u8 ata_xfer_mask2mode(unsigned int xfer_mask) * RETURNS: * Matching xfer_mask, 0 if no match found. */ -static unsigned int ata_xfer_mode2mask(u8 xfer_mode) +unsigned long ata_xfer_mode2mask(u8 xfer_mode) { const struct ata_xfer_ent *ent; for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) - return 1 << (ent->shift + xfer_mode - ent->base); + return ((2 << (ent->shift + xfer_mode - ent->base)) - 1) + & ~((1 << ent->shift) - 1); return 0; } @@ -550,7 +798,7 @@ static unsigned int ata_xfer_mode2mask(u8 xfer_mode) * RETURNS: * Matching xfer_shift, -1 if no match found. */ -static int ata_xfer_mode2shift(unsigned int xfer_mode) +int ata_xfer_mode2shift(unsigned long xfer_mode) { const struct ata_xfer_ent *ent; @@ -574,7 +822,7 @@ static int ata_xfer_mode2shift(unsigned int xfer_mode) * Constant C string representing highest speed listed in * @mode_mask, or the constant C string "<n/a>". */ -static const char *ata_mode_string(unsigned int xfer_mask) +const char *ata_mode_string(unsigned long xfer_mask) { static const char * const xfer_mode_str[] = { "PIO0", @@ -773,7 +1021,7 @@ static void ata_dev_disable_pm(struct ata_device *dev) void ata_lpm_schedule(struct ata_port *ap, enum link_pm policy) { ap->pm_policy = policy; - ap->link.eh_info.action |= ATA_EHI_LPM; + ap->link.eh_info.action |= ATA_EH_LPM; ap->link.eh_info.flags |= ATA_EHI_NO_AUTOPSY; ata_port_schedule_eh(ap); } @@ -806,50 +1054,6 @@ static void ata_lpm_disable(struct ata_host *host) } #endif /* CONFIG_PM */ - -/** - * ata_devchk - PATA device presence detection - * @ap: ATA channel to examine - * @device: Device to examine (starting at zero) - * - * This technique was originally described in - * Hale Landis's ATADRVR (www.ata-atapi.com), and - * later found its way into the ATA/ATAPI spec. - * - * Write a pattern to the ATA shadow registers, - * and if a device is present, it will respond by - * correctly storing and echoing back the - * ATA shadow register contents. - * - * LOCKING: - * caller. - */ - -static unsigned int ata_devchk(struct ata_port *ap, unsigned int device) -{ - struct ata_ioports *ioaddr = &ap->ioaddr; - u8 nsect, lbal; - - ap->ops->dev_select(ap, device); - - iowrite8(0x55, ioaddr->nsect_addr); - iowrite8(0xaa, ioaddr->lbal_addr); - - iowrite8(0xaa, ioaddr->nsect_addr); - iowrite8(0x55, ioaddr->lbal_addr); - - iowrite8(0x55, ioaddr->nsect_addr); - iowrite8(0xaa, ioaddr->lbal_addr); - - nsect = ioread8(ioaddr->nsect_addr); - lbal = ioread8(ioaddr->lbal_addr); - - if ((nsect == 0x55) && (lbal == 0xaa)) - return 1; /* we found a device */ - - return 0; /* nothing found */ -} - /** * ata_dev_classify - determine device type based on ATA-spec signature * @tf: ATA taskfile register set for device to be identified @@ -910,75 +1114,6 @@ unsigned int ata_dev_classify(const struct ata_taskfile *tf) } /** - * ata_dev_try_classify - Parse returned ATA device signature - * @dev: ATA device to classify (starting at zero) - * @present: device seems present - * @r_err: Value of error register on completion - * - * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, - * an ATA/ATAPI-defined set of values is placed in the ATA - * shadow registers, indicating the results of device detection - * and diagnostics. - * - * Select the ATA device, and read the values from the ATA shadow - * registers. Then parse according to the Error register value, - * and the spec-defined values examined by ata_dev_classify(). - * - * LOCKING: - * caller. - * - * RETURNS: - * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. - */ -unsigned int ata_dev_try_classify(struct ata_device *dev, int present, - u8 *r_err) -{ - struct ata_port *ap = dev->link->ap; - struct ata_taskfile tf; - unsigned int class; - u8 err; - - ap->ops->dev_select(ap, dev->devno); - - memset(&tf, 0, sizeof(tf)); - - ap->ops->tf_read(ap, &tf); - err = tf.feature; - if (r_err) - *r_err = err; - - /* see if device passed diags: if master then continue and warn later */ - if (err == 0 && dev->devno == 0) - /* diagnostic fail : do nothing _YET_ */ - dev->horkage |= ATA_HORKAGE_DIAGNOSTIC; - else if (err == 1) - /* do nothing */ ; - else if ((dev->devno == 0) && (err == 0x81)) - /* do nothing */ ; - else - return ATA_DEV_NONE; - - /* determine if device is ATA or ATAPI */ - class = ata_dev_classify(&tf); - - if (class == ATA_DEV_UNKNOWN) { - /* If the device failed diagnostic, it's likely to - * have reported incorrect device signature too. - * Assume ATA device if the device seems present but - * device signature is invalid with diagnostic - * failure. - */ - if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC)) - class = ATA_DEV_ATA; - else - class = ATA_DEV_NONE; - } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) - class = ATA_DEV_NONE; - - return class; -} - -/** * ata_id_string - Convert IDENTIFY DEVICE page into string * @id: IDENTIFY DEVICE results we will examine * @s: string into which data is output @@ -1056,7 +1191,7 @@ static u64 ata_id_n_sectors(const u16 *id) } } -static u64 ata_tf_to_lba48(struct ata_taskfile *tf) +u64 ata_tf_to_lba48(const struct ata_taskfile *tf) { u64 sectors = 0; @@ -1067,10 +1202,10 @@ static u64 ata_tf_to_lba48(struct ata_taskfile *tf) sectors |= (tf->lbam & 0xff) << 8; sectors |= (tf->lbal & 0xff); - return ++sectors; + return sectors; } -static u64 ata_tf_to_lba(struct ata_taskfile *tf) +u64 ata_tf_to_lba(const struct ata_taskfile *tf) { u64 sectors = 0; @@ -1079,7 +1214,7 @@ static u64 ata_tf_to_lba(struct ata_taskfile *tf) sectors |= (tf->lbam & 0xff) << 8; sectors |= (tf->lbal & 0xff); - return ++sectors; + return sectors; } /** @@ -1124,9 +1259,9 @@ static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors) } if (lba48) - *max_sectors = ata_tf_to_lba48(&tf); + *max_sectors = ata_tf_to_lba48(&tf) + 1; else - *max_sectors = ata_tf_to_lba(&tf); + *max_sectors = ata_tf_to_lba(&tf) + 1; if (dev->horkage & ATA_HORKAGE_HPA_SIZE) (*max_sectors)--; return 0; @@ -1217,12 +1352,12 @@ static int ata_hpa_resize(struct ata_device *dev) /* read native max address */ rc = ata_read_native_max_address(dev, &native_sectors); if (rc) { - /* If HPA isn't going to be unlocked, skip HPA - * resizing from the next try. + /* If device aborted the command or HPA isn't going to + * be unlocked, skip HPA resizing. */ - if (!ata_ignore_hpa) { + if (rc == -EACCES || !ata_ignore_hpa) { ata_dev_printk(dev, KERN_WARNING, "HPA support seems " - "broken, will skip HPA handling\n"); + "broken, skipping HPA handling\n"); dev->horkage |= ATA_HORKAGE_BROKEN_HPA; /* we can continue if device aborted the command */ @@ -1286,131 +1421,6 @@ static int ata_hpa_resize(struct ata_device *dev) } /** - * ata_id_to_dma_mode - Identify DMA mode from id block - * @dev: device to identify - * @unknown: mode to assume if we cannot tell - * - * Set up the timing values for the device based upon the identify - * reported values for the DMA mode. This function is used by drivers - * which rely upon firmware configured modes, but wish to report the - * mode correctly when possible. - * - * In addition we emit similarly formatted messages to the default - * ata_dev_set_mode handler, in order to provide consistency of - * presentation. - */ - -void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown) -{ - unsigned int mask; - u8 mode; - - /* Pack the DMA modes */ - mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA; - if (dev->id[53] & 0x04) - mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA; - - /* Select the mode in use */ - mode = ata_xfer_mask2mode(mask); - - if (mode != 0) { - ata_dev_printk(dev, KERN_INFO, "configured for %s\n", - ata_mode_string(mask)); - } else { - /* SWDMA perhaps ? */ - mode = unknown; - ata_dev_printk(dev, KERN_INFO, "configured for DMA\n"); - } - - /* Configure the device reporting */ - dev->xfer_mode = mode; - dev->xfer_shift = ata_xfer_mode2shift(mode); -} - -/** - * ata_noop_dev_select - Select device 0/1 on ATA bus - * @ap: ATA channel to manipulate - * @device: ATA device (numbered from zero) to select - * - * This function performs no actual function. - * - * May be used as the dev_select() entry in ata_port_operations. - * - * LOCKING: - * caller. - */ -void ata_noop_dev_select(struct ata_port *ap, unsigned int device) -{ -} - - -/** - * ata_std_dev_select - Select device 0/1 on ATA bus - * @ap: ATA channel to manipulate - * @device: ATA device (numbered from zero) to select - * - * Use the method defined in the ATA specification to - * make either device 0, or device 1, active on the - * ATA channel. Works with both PIO and MMIO. - * - * May be used as the dev_select() entry in ata_port_operations. - * - * LOCKING: - * caller. - */ - -void ata_std_dev_select(struct ata_port *ap, unsigned int device) -{ - u8 tmp; - - if (device == 0) - tmp = ATA_DEVICE_OBS; - else - tmp = ATA_DEVICE_OBS | ATA_DEV1; - - iowrite8(tmp, ap->ioaddr.device_addr); - ata_pause(ap); /* needed; also flushes, for mmio */ -} - -/** - * ata_dev_select - Select device 0/1 on ATA bus - * @ap: ATA channel to manipulate - * @device: ATA device (numbered from zero) to select - * @wait: non-zero to wait for Status register BSY bit to clear - * @can_sleep: non-zero if context allows sleeping - * - * Use the method defined in the ATA specification to - * make either device 0, or device 1, active on the - * ATA channel. - * - * This is a high-level version of ata_std_dev_select(), - * which additionally provides the services of inserting - * the proper pauses and status polling, where needed. - * - * LOCKING: - * caller. - */ - -void ata_dev_select(struct ata_port *ap, unsigned int device, - unsigned int wait, unsigned int can_sleep) -{ - if (ata_msg_probe(ap)) - ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, " - "device %u, wait %u\n", device, wait); - - if (wait) - ata_wait_idle(ap); - - ap->ops->dev_select(ap, device); - - if (wait) { - if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI) - msleep(150); - ata_wait_idle(ap); - } -} - -/** * ata_dump_id - IDENTIFY DEVICE info debugging output * @id: IDENTIFY DEVICE page to dump * @@ -1464,9 +1474,9 @@ static inline void ata_dump_id(const u16 *id) * RETURNS: * Computed xfermask */ -static unsigned int ata_id_xfermask(const u16 *id) +unsigned long ata_id_xfermask(const u16 *id) { - unsigned int pio_mask, mwdma_mask, udma_mask; + unsigned long pio_mask, mwdma_mask, udma_mask; /* Usual case. Word 53 indicates word 64 is valid */ if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { @@ -1519,7 +1529,7 @@ static unsigned int ata_id_xfermask(const u16 *id) } /** - * ata_port_queue_task - Queue port_task + * ata_pio_queue_task - Queue port_task * @ap: The ata_port to queue port_task for * @fn: workqueue function to be scheduled * @data: data for @fn to use @@ -1531,17 +1541,14 @@ static unsigned int ata_id_xfermask(const u16 *id) * one task is active at any given time. * * libata core layer takes care of synchronization between - * port_task and EH. ata_port_queue_task() may be ignored for EH + * port_task and EH. ata_pio_queue_task() may be ignored for EH * synchronization. * * LOCKING: * Inherited from caller. */ -void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data, - unsigned long delay) +void ata_pio_queue_task(struct ata_port *ap, void *data, unsigned long delay) { - DPRINTK("ENTER (ap %p, data %p, delay %lu)\n", ap, data, delay); - ap->port_task_data = data; /* may fail if ata_port_flush_task() in progress */ @@ -1563,14 +1570,14 @@ void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data, */ void ata_port_flush_task(struct ata_port *ap) { - DPRINTK("ENTER (ap %p)\n", ap); + DPRINTK("ENTER\n"); flush_workqueue(ata_wq); if (!cancel_delayed_work(&ap->port_task)) flush_workqueue(ata_wq); if (ata_msg_ctl(ap)) - ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__); + ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __func__); } static void ata_qc_complete_internal(struct ata_queued_cmd *qc) @@ -1907,9 +1914,8 @@ int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, int rc; if (ata_msg_ctl(ap)) - ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); + ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __func__); - ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ retry: ata_tf_init(dev, &tf); @@ -1942,24 +1948,34 @@ int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, id, sizeof(id[0]) * ATA_ID_WORDS, 0); if (err_mask) { if (err_mask & AC_ERR_NODEV_HINT) { - DPRINTK("ata%u.%d: NODEV after polling detection\n", - ap->print_id, dev->devno); + ata_dev_printk(dev, KERN_DEBUG, + "NODEV after polling detection\n"); return -ENOENT; } - /* Device or controller might have reported the wrong - * device class. Give a shot at the other IDENTIFY if - * the current one is aborted by the device. - */ - if (may_fallback && - (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) { - may_fallback = 0; + if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) { + /* Device or controller might have reported + * the wrong device class. Give a shot at the + * other IDENTIFY if the current one is + * aborted by the device. + */ + if (may_fallback) { + may_fallback = 0; - if (class == ATA_DEV_ATA) - class = ATA_DEV_ATAPI; - else - class = ATA_DEV_ATA; - goto retry; + if (class == ATA_DEV_ATA) + class = ATA_DEV_ATAPI; + else + class = ATA_DEV_ATA; + goto retry; + } + + /* Control reaches here iff the device aborted + * both flavors of IDENTIFYs which happens + * sometimes with phantom devices. + */ + ata_dev_printk(dev, KERN_DEBUG, + "both IDENTIFYs aborted, assuming NODEV\n"); + return -ENOENT; } rc = -EIO; @@ -2096,7 +2112,7 @@ int ata_dev_configure(struct ata_device *dev) struct ata_eh_context *ehc = &dev->link->eh_context; int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; const u16 *id = dev->id; - unsigned int xfer_mask; + unsigned long xfer_mask; char revbuf[7]; /* XYZ-99\0 */ char fwrevbuf[ATA_ID_FW_REV_LEN+1]; char modelbuf[ATA_ID_PROD_LEN+1]; @@ -2104,15 +2120,23 @@ int ata_dev_configure(struct ata_device *dev) if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n", - __FUNCTION__); + __func__); return 0; } if (ata_msg_probe(ap)) - ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); + ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __func__); /* set horkage */ dev->horkage |= ata_dev_blacklisted(dev); + ata_force_horkage(dev); + + if (dev->horkage & ATA_HORKAGE_DISABLE) { + ata_dev_printk(dev, KERN_INFO, + "unsupported device, disabling\n"); + ata_dev_disable(dev); + return 0; + } /* let ACPI work its magic */ rc = ata_acpi_on_devcfg(dev); @@ -2129,7 +2153,7 @@ int ata_dev_configure(struct ata_device *dev) ata_dev_printk(dev, KERN_DEBUG, "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " "85:%04x 86:%04x 87:%04x 88:%04x\n", - __FUNCTION__, + __func__, id[49], id[82], id[83], id[84], id[85], id[86], id[87], id[88]); @@ -2167,8 +2191,14 @@ int ata_dev_configure(struct ata_device *dev) "supports DRM functions and may " "not be fully accessable.\n"); snprintf(revbuf, 7, "CFA"); - } else + } else { snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); + /* Warn the user if the device has TPM extensions */ + if (ata_id_has_tpm(id)) + ata_dev_printk(dev, KERN_WARNING, + "supports DRM functions and may " + "not be fully accessable.\n"); + } dev->n_sectors = ata_id_n_sectors(id); @@ -2240,6 +2270,7 @@ int ata_dev_configure(struct ata_device *dev) else if (dev->class == ATA_DEV_ATAPI) { const char *cdb_intr_string = ""; const char *atapi_an_string = ""; + const char *dma_dir_string = ""; u32 sntf; rc = atapi_cdb_len(id); @@ -2258,7 +2289,7 @@ int ata_dev_configure(struct ata_device *dev) * changed notifications and ATAPI ANs. */ if ((ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) && - (!ap->nr_pmp_links || + (!sata_pmp_attached(ap) || sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) { unsigned int err_mask; @@ -2280,13 +2311,19 @@ int ata_dev_configure(struct ata_device *dev) cdb_intr_string = ", CDB intr"; } + if (atapi_dmadir || atapi_id_dmadir(dev->id)) { + dev->flags |= ATA_DFLAG_DMADIR; + dma_dir_string = ", DMADIR"; + } + /* print device info to dmesg */ if (ata_msg_drv(ap) && print_info) ata_dev_printk(dev, KERN_INFO, - "ATAPI: %s, %s, max %s%s%s\n", + "ATAPI: %s, %s, max %s%s%s%s\n", modelbuf, fwrevbuf, ata_mode_string(xfer_mask), - cdb_intr_string, atapi_an_string); + cdb_intr_string, atapi_an_string, + dma_dir_string); } /* determine max_sectors */ @@ -2301,19 +2338,8 @@ int ata_dev_configure(struct ata_device *dev) dev->flags |= ATA_DFLAG_DIPM; } - if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { - /* Let the user know. We don't want to disallow opens for - rescue purposes, or in case the vendor is just a blithering - idiot */ - if (print_info) { - ata_dev_printk(dev, KERN_WARNING, -"Drive reports diagnostics failure. This may indicate a drive\n"); - ata_dev_printk(dev, KERN_WARNING, -"fault or invalid emulation. Contact drive vendor for information.\n"); - } - } - - /* limit bridge transfers to udma5, 200 sectors */ + /* Limit PATA drive on SATA cable bridge transfers to udma5, + 200 sectors */ if (ata_dev_knobble(dev)) { if (ata_msg_drv(ap) && print_info) ata_dev_printk(dev, KERN_INFO, @@ -2342,15 +2368,27 @@ int ata_dev_configure(struct ata_device *dev) if (ap->ops->dev_config) ap->ops->dev_config(dev); - if (ata_msg_probe(ap)) - ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", - __FUNCTION__, ata_chk_status(ap)); + if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { + /* Let the user know. We don't want to disallow opens for + rescue purposes, or in case the vendor is just a blithering + idiot. Do this after the dev_config call as some controllers + with buggy firmware may want to avoid reporting false device + bugs */ + + if (print_info) { + ata_dev_printk(dev, KERN_WARNING, +"Drive reports diagnostics failure. This may indicate a drive\n"); + ata_dev_printk(dev, KERN_WARNING, +"fault or invalid emulation. Contact drive vendor for information.\n"); + } + } + return 0; err_out_nosup: if (ata_msg_probe(ap)) ata_dev_printk(dev, KERN_DEBUG, - "%s: EXIT, err\n", __FUNCTION__); + "%s: EXIT, err\n", __func__); return rc; } @@ -2393,6 +2431,18 @@ int ata_cable_unknown(struct ata_port *ap) } /** + * ata_cable_ignore - return ignored PATA cable. + * @ap: port + * + * Helper method for drivers which don't use cable type to limit + * transfer mode. + */ +int ata_cable_ignore(struct ata_port *ap) +{ + return ATA_CBL_PATA_IGN; +} + +/** * ata_cable_sata - return SATA cable type * @ap: port * @@ -2470,7 +2520,7 @@ int ata_bus_probe(struct ata_port *ap) specific sequence bass-ackwards so that PDIAG- is released by the slave device */ - ata_link_for_each_dev(dev, &ap->link) { + ata_link_for_each_dev_reverse(dev, &ap->link) { if (tries[dev->devno]) dev->class = classes[dev->devno]; @@ -2578,7 +2628,7 @@ void ata_port_probe(struct ata_port *ap) * LOCKING: * None. */ -void sata_print_link_status(struct ata_link *link) +static void sata_print_link_status(struct ata_link *link) { u32 sstatus, scontrol, tmp; @@ -2787,38 +2837,33 @@ int sata_set_spd(struct ata_link *link) */ static const struct ata_timing ata_timing[] = { +/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ + { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, + { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, + { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, + { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, + { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, + { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 }, + { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 }, - { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, - { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, - { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, - { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, + { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, + { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, + { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, - { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 }, + { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, + { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, + { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 }, - { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, - { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, - { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, + { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 }, /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ - - { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, - { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, - { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, - - { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, - { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, - { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, - - { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 }, - { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 }, - { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, - { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, - - { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, - { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, - { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, - -/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ + { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, + { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, + { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, + { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, + { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, + { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, + { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, { 0xFF } }; @@ -2851,14 +2896,16 @@ void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); } -static const struct ata_timing *ata_timing_find_mode(unsigned short speed) +const struct ata_timing *ata_timing_find_mode(u8 xfer_mode) { - const struct ata_timing *t; + const struct ata_timing *t = ata_timing; + + while (xfer_mode > t->mode) + t++; - for (t = ata_timing; t->mode != speed; t++) - if (t->mode == 0xFF) - return NULL; - return t; + if (xfer_mode == t->mode) + return t; + return NULL; } int ata_timing_compute(struct ata_device *adev, unsigned short speed, @@ -2933,6 +2980,57 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed, } /** + * ata_timing_cycle2mode - find xfer mode for the specified cycle duration + * @xfer_shift: ATA_SHIFT_* value for transfer type to examine. + * @cycle: cycle duration in ns + * + * Return matching xfer mode for @cycle. The returned mode is of + * the transfer type specified by @xfer_shift. If @cycle is too + * slow for @xfer_shift, 0xff is returned. If @cycle is faster + * than the fastest known mode, the fasted mode is returned. + * + * LOCKING: + * None. + * + * RETURNS: + * Matching xfer_mode, 0xff if no match found. + */ +u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle) +{ + u8 base_mode = 0xff, last_mode = 0xff; + const struct ata_xfer_ent *ent; + const struct ata_timing *t; + + for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) + if (ent->shift == xfer_shift) + base_mode = ent->base; + + for (t = ata_timing_find_mode(base_mode); + t && ata_xfer_mode2shift(t->mode) == xfer_shift; t++) { + unsigned short this_cycle; + + switch (xfer_shift) { + case ATA_SHIFT_PIO: + case ATA_SHIFT_MWDMA: + this_cycle = t->cycle; + break; + case ATA_SHIFT_UDMA: + this_cycle = t->udma; + break; + default: + return 0xff; + } + + if (cycle > this_cycle) + break; + + last_mode = t->mode; + } + + return last_mode; +} + +/** * ata_down_xfermask_limit - adjust dev xfer masks downward * @dev: Device to adjust xfer masks * @sel: ATA_DNXFER_* selector @@ -2950,8 +3048,8 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed, int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel) { char buf[32]; - unsigned int orig_mask, xfer_mask; - unsigned int pio_mask, mwdma_mask, udma_mask; + unsigned long orig_mask, xfer_mask; + unsigned long pio_mask, mwdma_mask, udma_mask; int quiet, highbit; quiet = !!(sel & ATA_DNXFER_QUIET); @@ -3024,6 +3122,8 @@ int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel) static int ata_dev_set_mode(struct ata_device *dev) { struct ata_eh_context *ehc = &dev->link->eh_context; + const char *dev_err_whine = ""; + int ign_dev_err = 0; unsigned int err_mask; int rc; @@ -3033,47 +3133,68 @@ static int ata_dev_set_mode(struct ata_device *dev) err_mask = ata_dev_set_xfermode(dev); - /* Old CFA may refuse this command, which is just fine */ - if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id)) - err_mask &= ~AC_ERR_DEV; + if (err_mask & ~AC_ERR_DEV) + goto fail; - /* Some very old devices and some bad newer ones fail any kind of - SET_XFERMODE request but support PIO0-2 timings and no IORDY */ - if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) && - dev->pio_mode <= XFER_PIO_2) - err_mask &= ~AC_ERR_DEV; + /* revalidate */ + ehc->i.flags |= ATA_EHI_POST_SETMODE; + rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0); + ehc->i.flags &= ~ATA_EHI_POST_SETMODE; + if (rc) + return rc; + if (dev->xfer_shift == ATA_SHIFT_PIO) { + /* Old CFA may refuse this command, which is just fine */ + if (ata_id_is_cfa(dev->id)) + ign_dev_err = 1; + /* Catch several broken garbage emulations plus some pre + ATA devices */ + if (ata_id_major_version(dev->id) == 0 && + dev->pio_mode <= XFER_PIO_2) + ign_dev_err = 1; + /* Some very old devices and some bad newer ones fail + any kind of SET_XFERMODE request but support PIO0-2 + timings and no IORDY */ + if (!ata_id_has_iordy(dev->id) && dev->pio_mode <= XFER_PIO_2) + ign_dev_err = 1; + } /* Early MWDMA devices do DMA but don't allow DMA mode setting. Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */ - if (dev->xfer_shift == ATA_SHIFT_MWDMA && + if (dev->xfer_shift == ATA_SHIFT_MWDMA && dev->dma_mode == XFER_MW_DMA_0 && (dev->id[63] >> 8) & 1) - err_mask &= ~AC_ERR_DEV; + ign_dev_err = 1; - if (err_mask) { - ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " - "(err_mask=0x%x)\n", err_mask); - return -EIO; - } + /* if the device is actually configured correctly, ignore dev err */ + if (dev->xfer_mode == ata_xfer_mask2mode(ata_id_xfermask(dev->id))) + ign_dev_err = 1; - ehc->i.flags |= ATA_EHI_POST_SETMODE; - rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0); - ehc->i.flags &= ~ATA_EHI_POST_SETMODE; - if (rc) - return rc; + if (err_mask & AC_ERR_DEV) { + if (!ign_dev_err) + goto fail; + else + dev_err_whine = " (device error ignored)"; + } DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", dev->xfer_shift, (int)dev->xfer_mode); - ata_dev_printk(dev, KERN_INFO, "configured for %s\n", - ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); + ata_dev_printk(dev, KERN_INFO, "configured for %s%s\n", + ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)), + dev_err_whine); + return 0; + + fail: + ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " + "(err_mask=0x%x)\n", err_mask); + return -EIO; } /** * ata_do_set_mode - Program timings and issue SET FEATURES - XFER * @link: link on which timings will be programmed - * @r_failed_dev: out paramter for failed device + * @r_failed_dev: out parameter for failed device * * Standard implementation of the function used to tune and set * ATA device disk transfer mode (PIO3, UDMA6, etc.). If @@ -3095,7 +3216,7 @@ int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) /* step 1: calculate xfer_mask */ ata_link_for_each_dev(dev, link) { - unsigned int pio_mask, dma_mask; + unsigned long pio_mask, dma_mask; unsigned int mode_mask; if (!ata_dev_enabled(dev)) @@ -3108,6 +3229,7 @@ int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) mode_mask = ATA_DMA_MASK_CFA; ata_dev_xfermask(dev); + ata_force_xfermask(dev); pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); @@ -3121,7 +3243,7 @@ int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) dev->dma_mode = ata_xfer_mask2mode(dma_mask); found = 1; - if (dev->dma_mode) + if (dev->dma_mode != 0xff) used_dma = 1; } if (!found) @@ -3132,7 +3254,7 @@ int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) if (!ata_dev_enabled(dev)) continue; - if (!dev->pio_mode) { + if (dev->pio_mode == 0xff) { ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); rc = -EINVAL; goto out; @@ -3146,7 +3268,7 @@ int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) /* step 3: set host DMA timings */ ata_link_for_each_dev(dev, link) { - if (!ata_dev_enabled(dev) || !dev->dma_mode) + if (!ata_dev_enabled(dev) || dev->dma_mode == 0xff) continue; dev->xfer_mode = dev->dma_mode; @@ -3179,195 +3301,73 @@ int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) } /** - * ata_set_mode - Program timings and issue SET FEATURES - XFER - * @link: link on which timings will be programmed - * @r_failed_dev: out paramter for failed device - * - * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If - * ata_set_mode() fails, pointer to the failing device is - * returned in @r_failed_dev. - * - * LOCKING: - * PCI/etc. bus probe sem. - * - * RETURNS: - * 0 on success, negative errno otherwise - */ -int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) -{ - struct ata_port *ap = link->ap; - - /* has private set_mode? */ - if (ap->ops->set_mode) - return ap->ops->set_mode(link, r_failed_dev); - return ata_do_set_mode(link, r_failed_dev); -} - -/** - * ata_tf_to_host - issue ATA taskfile to host controller - * @ap: port to which command is being issued - * @tf: ATA taskfile register set - * - * Issues ATA taskfile register set to ATA host controller, - * with proper synchronization with interrupt handler and - * other threads. - * - * LOCKING: - * spin_lock_irqsave(host lock) - */ - -static inline void ata_tf_to_host(struct ata_port *ap, - const struct ata_taskfile *tf) -{ - ap->ops->tf_load(ap, tf); - ap->ops->exec_command(ap, tf); -} - -/** - * ata_busy_sleep - sleep until BSY clears, or timeout - * @ap: port containing status register to be polled - * @tmout_pat: impatience timeout - * @tmout: overall timeout - * - * Sleep until ATA Status register bit BSY clears, - * or a timeout occurs. - * - * LOCKING: - * Kernel thread context (may sleep). - * - * RETURNS: - * 0 on success, -errno otherwise. - */ -int ata_busy_sleep(struct ata_port *ap, - unsigned long tmout_pat, unsigned long tmout) -{ - unsigned long timer_start, timeout; - u8 status; - - status = ata_busy_wait(ap, ATA_BUSY, 300); - timer_start = jiffies; - timeout = timer_start + tmout_pat; - while (status != 0xff && (status & ATA_BUSY) && - time_before(jiffies, timeout)) { - msleep(50); - status = ata_busy_wait(ap, ATA_BUSY, 3); - } - - if (status != 0xff && (status & ATA_BUSY)) - ata_port_printk(ap, KERN_WARNING, - "port is slow to respond, please be patient " - "(Status 0x%x)\n", status); - - timeout = timer_start + tmout; - while (status != 0xff && (status & ATA_BUSY) && - time_before(jiffies, timeout)) { - msleep(50); - status = ata_chk_status(ap); - } - - if (status == 0xff) - return -ENODEV; - - if (status & ATA_BUSY) { - ata_port_printk(ap, KERN_ERR, "port failed to respond " - "(%lu secs, Status 0x%x)\n", - tmout / HZ, status); - return -EBUSY; - } - - return 0; -} - -/** - * ata_wait_after_reset - wait before checking status after reset - * @ap: port containing status register to be polled + * ata_wait_ready - wait for link to become ready + * @link: link to be waited on * @deadline: deadline jiffies for the operation + * @check_ready: callback to check link readiness * - * After reset, we need to pause a while before reading status. - * Also, certain combination of controller and device report 0xff - * for some duration (e.g. until SATA PHY is up and running) - * which is interpreted as empty port in ATA world. This - * function also waits for such devices to get out of 0xff - * status. + * Wait for @link to become ready. @check_ready should return + * positive number if @link is ready, 0 if it isn't, -ENODEV if + * link doesn't seem to be occupied, other errno for other error + * conditions. * - * LOCKING: - * Kernel thread context (may sleep). - */ -void ata_wait_after_reset(struct ata_port *ap, unsigned long deadline) -{ - unsigned long until = jiffies + ATA_TMOUT_FF_WAIT; - - if (time_before(until, deadline)) - deadline = until; - - /* Spec mandates ">= 2ms" before checking status. We wait - * 150ms, because that was the magic delay used for ATAPI - * devices in Hale Landis's ATADRVR, for the period of time - * between when the ATA command register is written, and then - * status is checked. Because waiting for "a while" before - * checking status is fine, post SRST, we perform this magic - * delay here as well. - * - * Old drivers/ide uses the 2mS rule and then waits for ready. - */ - msleep(150); - - /* Wait for 0xff to clear. Some SATA devices take a long time - * to clear 0xff after reset. For example, HHD424020F7SV00 - * iVDR needs >= 800ms while. Quantum GoVault needs even more - * than that. - * - * Note that some PATA controllers (pata_ali) explode if - * status register is read more than once when there's no - * device attached. - */ - if (ap->flags & ATA_FLAG_SATA) { - while (1) { - u8 status = ata_chk_status(ap); - - if (status != 0xff || time_after(jiffies, deadline)) - return; - - msleep(50); - } - } -} - -/** - * ata_wait_ready - sleep until BSY clears, or timeout - * @ap: port containing status register to be polled - * @deadline: deadline jiffies for the operation - * - * Sleep until ATA Status register bit BSY clears, or timeout - * occurs. + * Transient -ENODEV conditions are allowed for + * ATA_TMOUT_FF_WAIT. * * LOCKING: - * Kernel thread context (may sleep). + * EH context. * * RETURNS: - * 0 on success, -errno otherwise. + * 0 if @linke is ready before @deadline; otherwise, -errno. */ -int ata_wait_ready(struct ata_port *ap, unsigned long deadline) +int ata_wait_ready(struct ata_link *link, unsigned long deadline, + int (*check_ready)(struct ata_link *link)) { unsigned long start = jiffies; + unsigned long nodev_deadline = start + ATA_TMOUT_FF_WAIT; int warned = 0; + if (time_after(nodev_deadline, deadline)) + nodev_deadline = deadline; + while (1) { - u8 status = ata_chk_status(ap); unsigned long now = jiffies; + int ready, tmp; - if (!(status & ATA_BUSY)) + ready = tmp = check_ready(link); + if (ready > 0) return 0; - if (!ata_link_online(&ap->link) && status == 0xff) - return -ENODEV; + + /* -ENODEV could be transient. Ignore -ENODEV if link + * is online. Also, some SATA devices take a long + * time to clear 0xff after reset. For example, + * HHD424020F7SV00 iVDR needs >= 800ms while Quantum + * GoVault needs even more than that. Wait for + * ATA_TMOUT_FF_WAIT on -ENODEV if link isn't offline. + * + * Note that some PATA controllers (pata_ali) explode + * if status register is read more than once when + * there's no device attached. + */ + if (ready == -ENODEV) { + if (ata_link_online(link)) + ready = 0; + else if ((link->ap->flags & ATA_FLAG_SATA) && + !ata_link_offline(link) && + time_before(now, nodev_deadline)) + ready = 0; + } + + if (ready) + return ready; if (time_after(now, deadline)) return -EBUSY; if (!warned && time_after(now, start + 5 * HZ) && (deadline - now > 3 * HZ)) { - ata_port_printk(ap, KERN_WARNING, - "port is slow to respond, please be patient " - "(Status 0x%x)\n", status); + ata_link_printk(link, KERN_WARNING, + "link is slow to respond, please be patient " + "(ready=%d)\n", tmp); warned = 1; } @@ -3375,179 +3375,26 @@ int ata_wait_ready(struct ata_port *ap, unsigned long deadline) } } -static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask, - unsigned long deadline) -{ - struct ata_ioports *ioaddr = &ap->ioaddr; - unsigned int dev0 = devmask & (1 << 0); - unsigned int dev1 = devmask & (1 << 1); - int rc, ret = 0; - - /* if device 0 was found in ata_devchk, wait for its - * BSY bit to clear - */ - if (dev0) { - rc = ata_wait_ready(ap, deadline); - if (rc) { - if (rc != -ENODEV) - return rc; - ret = rc; - } - } - - /* if device 1 was found in ata_devchk, wait for register - * access briefly, then wait for BSY to clear. - */ - if (dev1) { - int i; - - ap->ops->dev_select(ap, 1); - - /* Wait for register access. Some ATAPI devices fail - * to set nsect/lbal after reset, so don't waste too - * much time on it. We're gonna wait for !BSY anyway. - */ - for (i = 0; i < 2; i++) { - u8 nsect, lbal; - - nsect = ioread8(ioaddr->nsect_addr); - lbal = ioread8(ioaddr->lbal_addr); - if ((nsect == 1) && (lbal == 1)) - break; - msleep(50); /* give drive a breather */ - } - - rc = ata_wait_ready(ap, deadline); - if (rc) { - if (rc != -ENODEV) - return rc; - ret = rc; - } - } - - /* is all this really necessary? */ - ap->ops->dev_select(ap, 0); - if (dev1) - ap->ops->dev_select(ap, 1); - if (dev0) - ap->ops->dev_select(ap, 0); - - return ret; -} - -static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask, - unsigned long deadline) -{ - struct ata_ioports *ioaddr = &ap->ioaddr; - - DPRINTK("ata%u: bus reset via SRST\n", ap->print_id); - - /* software reset. causes dev0 to be selected */ - iowrite8(ap->ctl, ioaddr->ctl_addr); - udelay(20); /* FIXME: flush */ - iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr); - udelay(20); /* FIXME: flush */ - iowrite8(ap->ctl, ioaddr->ctl_addr); - - /* wait a while before checking status */ - ata_wait_after_reset(ap, deadline); - - /* Before we perform post reset processing we want to see if - * the bus shows 0xFF because the odd clown forgets the D7 - * pulldown resistor. - */ - if (ata_chk_status(ap) == 0xFF) - return -ENODEV; - - return ata_bus_post_reset(ap, devmask, deadline); -} - /** - * ata_bus_reset - reset host port and associated ATA channel - * @ap: port to reset + * ata_wait_after_reset - wait for link to become ready after reset + * @link: link to be waited on + * @deadline: deadline jiffies for the operation + * @check_ready: callback to check link readiness * - * This is typically the first time we actually start issuing - * commands to the ATA channel. We wait for BSY to clear, then - * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its - * result. Determine what devices, if any, are on the channel - * by looking at the device 0/1 error register. Look at the signature - * stored in each device's taskfile registers, to determine if - * the device is ATA or ATAPI. + * Wait for @link to become ready after reset. * * LOCKING: - * PCI/etc. bus probe sem. - * Obtains host lock. + * EH context. * - * SIDE EFFECTS: - * Sets ATA_FLAG_DISABLED if bus reset fails. + * RETURNS: + * 0 if @linke is ready before @deadline; otherwise, -errno. */ - -void ata_bus_reset(struct ata_port *ap) +int ata_wait_after_reset(struct ata_link *link, unsigned long deadline, + int (*check_ready)(struct ata_link *link)) { - struct ata_device *device = ap->link.device; - struct ata_ioports *ioaddr = &ap->ioaddr; - unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; - u8 err; - unsigned int dev0, dev1 = 0, devmask = 0; - int rc; - - DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no); - - /* determine if device 0/1 are present */ - if (ap->flags & ATA_FLAG_SATA_RESET) - dev0 = 1; - else { - dev0 = ata_devchk(ap, 0); - if (slave_possible) - dev1 = ata_devchk(ap, 1); - } - - if (dev0) - devmask |= (1 << 0); - if (dev1) - devmask |= (1 << 1); - - /* select device 0 again */ - ap->ops->dev_select(ap, 0); - - /* issue bus reset */ - if (ap->flags & ATA_FLAG_SRST) { - rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ); - if (rc && rc != -ENODEV) - goto err_out; - } + msleep(ATA_WAIT_AFTER_RESET_MSECS); - /* - * determine by signature whether we have ATA or ATAPI devices - */ - device[0].class = ata_dev_try_classify(&device[0], dev0, &err); - if ((slave_possible) && (err != 0x81)) - device[1].class = ata_dev_try_classify(&device[1], dev1, &err); - - /* is double-select really necessary? */ - if (device[1].class != ATA_DEV_NONE) - ap->ops->dev_select(ap, 1); - if (device[0].class != ATA_DEV_NONE) - ap->ops->dev_select(ap, 0); - - /* if no devices were detected, disable this port */ - if ((device[0].class == ATA_DEV_NONE) && - (device[1].class == ATA_DEV_NONE)) - goto err_out; - - if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { - /* set up device control for ATA_FLAG_SATA_RESET */ - iowrite8(ap->ctl, ioaddr->ctl_addr); - } - - DPRINTK("EXIT\n"); - return; - -err_out: - ata_port_printk(ap, KERN_ERR, "disabling port\n"); - ata_port_disable(ap); - - DPRINTK("EXIT\n"); + return ata_wait_ready(link, deadline, check_ready); } /** @@ -3636,7 +3483,7 @@ int sata_link_debounce(struct ata_link *link, const unsigned long *params, int sata_link_resume(struct ata_link *link, const unsigned long *params, unsigned long deadline) { - u32 scontrol; + u32 scontrol, serror; int rc; if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) @@ -3652,7 +3499,14 @@ int sata_link_resume(struct ata_link *link, const unsigned long *params, */ msleep(200); - return sata_link_debounce(link, params, deadline); + if ((rc = sata_link_debounce(link, params, deadline))) + return rc; + + /* clear SError, some PHYs require this even for SRST to work */ + if (!(rc = sata_scr_read(link, SCR_ERROR, &serror))) + rc = sata_scr_write(link, SCR_ERROR, serror); + + return rc != -EINVAL ? rc : 0; } /** @@ -3679,17 +3533,6 @@ int ata_std_prereset(struct ata_link *link, unsigned long deadline) const unsigned long *timing = sata_ehc_deb_timing(ehc); int rc; - /* handle link resume */ - if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && - (link->flags & ATA_LFLAG_HRST_TO_RESUME)) - ehc->i.action |= ATA_EH_HARDRESET; - - /* Some PMPs don't work with only SRST, force hardreset if PMP - * is supported. - */ - if (ap->flags & ATA_FLAG_PMP) - ehc->i.action |= ATA_EH_HARDRESET; - /* if we're about to do hardreset, nothing more to do */ if (ehc->i.action & ATA_EH_HARDRESET) return 0; @@ -3703,88 +3546,30 @@ int ata_std_prereset(struct ata_link *link, unsigned long deadline) "link for reset (errno=%d)\n", rc); } - /* Wait for !BSY if the controller can wait for the first D2H - * Reg FIS and we don't know that no device is attached. - */ - if (!(link->flags & ATA_LFLAG_SKIP_D2H_BSY) && !ata_link_offline(link)) { - rc = ata_wait_ready(ap, deadline); - if (rc && rc != -ENODEV) { - ata_link_printk(link, KERN_WARNING, "device not ready " - "(errno=%d), forcing hardreset\n", rc); - ehc->i.action |= ATA_EH_HARDRESET; - } - } + /* no point in trying softreset on offline link */ + if (ata_link_offline(link)) + ehc->i.action &= ~ATA_EH_SOFTRESET; return 0; } /** - * ata_std_softreset - reset host port via ATA SRST - * @link: ATA link to reset - * @classes: resulting classes of attached devices - * @deadline: deadline jiffies for the operation - * - * Reset host port using ATA SRST. - * - * LOCKING: - * Kernel thread context (may sleep) - * - * RETURNS: - * 0 on success, -errno otherwise. - */ -int ata_std_softreset(struct ata_link *link, unsigned int *classes, - unsigned long deadline) -{ - struct ata_port *ap = link->ap; - unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; - unsigned int devmask = 0; - int rc; - u8 err; - - DPRINTK("ENTER\n"); - - if (ata_link_offline(link)) { - classes[0] = ATA_DEV_NONE; - goto out; - } - - /* determine if device 0/1 are present */ - if (ata_devchk(ap, 0)) - devmask |= (1 << 0); - if (slave_possible && ata_devchk(ap, 1)) - devmask |= (1 << 1); - - /* select device 0 again */ - ap->ops->dev_select(ap, 0); - - /* issue bus reset */ - DPRINTK("about to softreset, devmask=%x\n", devmask); - rc = ata_bus_softreset(ap, devmask, deadline); - /* if link is occupied, -ENODEV too is an error */ - if (rc && (rc != -ENODEV || sata_scr_valid(link))) { - ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc); - return rc; - } - - /* determine by signature whether we have ATA or ATAPI devices */ - classes[0] = ata_dev_try_classify(&link->device[0], - devmask & (1 << 0), &err); - if (slave_possible && err != 0x81) - classes[1] = ata_dev_try_classify(&link->device[1], - devmask & (1 << 1), &err); - - out: - DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); - return 0; -} - -/** * sata_link_hardreset - reset link via SATA phy reset * @link: link to reset * @timing: timing parameters { interval, duratinon, timeout } in msec * @deadline: deadline jiffies for the operation + * @online: optional out parameter indicating link onlineness + * @check_ready: optional callback to check link readiness * * SATA phy-reset @link using DET bits of SControl register. + * After hardreset, link readiness is waited upon using + * ata_wait_ready() if @check_ready is specified. LLDs are + * allowed to not specify @check_ready and wait itself after this + * function returns. Device classification is LLD's + * responsibility. + * + * *@online is set to one iff reset succeeded and @link is online + * after reset. * * LOCKING: * Kernel thread context (may sleep) @@ -3793,13 +3578,17 @@ int ata_std_softreset(struct ata_link *link, unsigned int *classes, * 0 on success, -errno otherwise. */ int sata_link_hardreset(struct ata_link *link, const unsigned long *timing, - unsigned long deadline) + unsigned long deadline, + bool *online, int (*check_ready)(struct ata_link *)) { u32 scontrol; int rc; DPRINTK("ENTER\n"); + if (online) + *online = false; + if (sata_set_spd_needed(link)) { /* SATA spec says nothing about how to reconfigure * spd. To be on the safe side, turn off phy during @@ -3833,77 +3622,73 @@ int sata_link_hardreset(struct ata_link *link, const unsigned long *timing, /* bring link back */ rc = sata_link_resume(link, timing, deadline); + if (rc) + goto out; + /* if link is offline nothing more to do */ + if (ata_link_offline(link)) + goto out; + + /* Link is online. From this point, -ENODEV too is an error. */ + if (online) + *online = true; + + if (sata_pmp_supported(link->ap) && ata_is_host_link(link)) { + /* If PMP is supported, we have to do follow-up SRST. + * Some PMPs don't send D2H Reg FIS after hardreset if + * the first port is empty. Wait only for + * ATA_TMOUT_PMP_SRST_WAIT. + */ + if (check_ready) { + unsigned long pmp_deadline; + + pmp_deadline = jiffies + ATA_TMOUT_PMP_SRST_WAIT; + if (time_after(pmp_deadline, deadline)) + pmp_deadline = deadline; + ata_wait_ready(link, pmp_deadline, check_ready); + } + rc = -EAGAIN; + goto out; + } + + rc = 0; + if (check_ready) + rc = ata_wait_ready(link, deadline, check_ready); out: + if (rc && rc != -EAGAIN) { + /* online is set iff link is online && reset succeeded */ + if (online) + *online = false; + ata_link_printk(link, KERN_ERR, + "COMRESET failed (errno=%d)\n", rc); + } DPRINTK("EXIT, rc=%d\n", rc); return rc; } /** - * sata_std_hardreset - reset host port via SATA phy reset + * sata_std_hardreset - COMRESET w/o waiting or classification * @link: link to reset * @class: resulting class of attached device * @deadline: deadline jiffies for the operation * - * SATA phy-reset host port using DET bits of SControl register, - * wait for !BSY and classify the attached device. + * Standard SATA COMRESET w/o waiting or classification. * * LOCKING: * Kernel thread context (may sleep) * * RETURNS: - * 0 on success, -errno otherwise. + * 0 if link offline, -EAGAIN if link online, -errno on errors. */ int sata_std_hardreset(struct ata_link *link, unsigned int *class, unsigned long deadline) { - struct ata_port *ap = link->ap; const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context); + bool online; int rc; - DPRINTK("ENTER\n"); - /* do hardreset */ - rc = sata_link_hardreset(link, timing, deadline); - if (rc) { - ata_link_printk(link, KERN_ERR, - "COMRESET failed (errno=%d)\n", rc); - return rc; - } - - /* TODO: phy layer with polling, timeouts, etc. */ - if (ata_link_offline(link)) { - *class = ATA_DEV_NONE; - DPRINTK("EXIT, link offline\n"); - return 0; - } - - /* wait a while before checking status */ - ata_wait_after_reset(ap, deadline); - - /* If PMP is supported, we have to do follow-up SRST. Note - * that some PMPs don't send D2H Reg FIS after hardreset at - * all if the first port is empty. Wait for it just for a - * second and request follow-up SRST. - */ - if (ap->flags & ATA_FLAG_PMP) { - ata_wait_ready(ap, jiffies + HZ); - return -EAGAIN; - } - - rc = ata_wait_ready(ap, deadline); - /* link occupied, -ENODEV too is an error */ - if (rc) { - ata_link_printk(link, KERN_ERR, - "COMRESET failed (errno=%d)\n", rc); - return rc; - } - - ap->ops->dev_select(ap, 0); /* probably unnecessary */ - - *class = ata_dev_try_classify(link->device, 1, NULL); - - DPRINTK("EXIT, class=%u\n", *class); - return 0; + rc = sata_link_hardreset(link, timing, deadline, &online, NULL); + return online ? -EAGAIN : rc; } /** @@ -3920,34 +3705,16 @@ int sata_std_hardreset(struct ata_link *link, unsigned int *class, */ void ata_std_postreset(struct ata_link *link, unsigned int *classes) { - struct ata_port *ap = link->ap; u32 serror; DPRINTK("ENTER\n"); - /* print link status */ - sata_print_link_status(link); - - /* clear SError */ - if (sata_scr_read(link, SCR_ERROR, &serror) == 0) + /* reset complete, clear SError */ + if (!sata_scr_read(link, SCR_ERROR, &serror)) sata_scr_write(link, SCR_ERROR, serror); - link->eh_info.serror = 0; - /* is double-select really necessary? */ - if (classes[0] != ATA_DEV_NONE) - ap->ops->dev_select(ap, 1); - if (classes[1] != ATA_DEV_NONE) - ap->ops->dev_select(ap, 0); - - /* bail out if no device is present */ - if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { - DPRINTK("EXIT, no device\n"); - return; - } - - /* set up device control */ - if (ap->ioaddr.ctl_addr) - iowrite8(ap->ctl, ap->ioaddr.ctl_addr); + /* print link status */ + sata_print_link_status(link); DPRINTK("EXIT\n"); } @@ -4138,8 +3905,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA }, { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA }, /* Odd clown on sil3726/4726 PMPs */ - { "Config Disk", NULL, ATA_HORKAGE_NODMA | - ATA_HORKAGE_SKIP_PM }, + { "Config Disk", NULL, ATA_HORKAGE_DISABLE }, /* Weird ATAPI devices */ { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 }, @@ -4173,9 +3939,13 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { /* Devices which report 1 sector over size HPA */ { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, }, { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, }, + { "ST310211A", NULL, ATA_HORKAGE_HPA_SIZE, }, /* Devices which get the IVB wrong */ { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, }, + /* Maybe we should just blacklist TSSTcorp... */ + { "TSSTcorp CDDVDW SH-S202H", "SB00", ATA_HORKAGE_IVB, }, + { "TSSTcorp CDDVDW SH-S202H", "SB01", ATA_HORKAGE_IVB, }, { "TSSTcorp CDDVDW SH-S202J", "SB00", ATA_HORKAGE_IVB, }, { "TSSTcorp CDDVDW SH-S202J", "SB01", ATA_HORKAGE_IVB, }, { "TSSTcorp CDDVDW SH-S202N", "SB00", ATA_HORKAGE_IVB, }, @@ -4257,6 +4027,53 @@ static int ata_is_40wire(struct ata_device *dev) } /** + * cable_is_40wire - 40/80/SATA decider + * @ap: port to consider + * + * This function encapsulates the policy for speed management + * in one place. At the moment we don't cache the result but + * there is a good case for setting ap->cbl to the result when + * we are called with unknown cables (and figuring out if it + * impacts hotplug at all). + * + * Return 1 if the cable appears to be 40 wire. + */ + +static int cable_is_40wire(struct ata_port *ap) +{ + struct ata_link *link; + struct ata_device *dev; + + /* If the controller thinks we are 40 wire, we are */ + if (ap->cbl == ATA_CBL_PATA40) + return 1; + /* If the controller thinks we are 80 wire, we are */ + if (ap->cbl == ATA_CBL_PATA80 || ap->cbl == ATA_CBL_SATA) + return 0; + /* If the system is known to be 40 wire short cable (eg laptop), + then we allow 80 wire modes even if the drive isn't sure */ + if (ap->cbl == ATA_CBL_PATA40_SHORT) + return 0; + /* If the controller doesn't know we scan + + - Note: We look for all 40 wire detects at this point. + Any 80 wire detect is taken to be 80 wire cable + because + - In many setups only the one drive (slave if present) + will give a valid detect + - If you have a non detect capable drive you don't + want it to colour the choice + */ + ata_port_for_each_link(link, ap) { + ata_link_for_each_dev(dev, link) { + if (!ata_is_40wire(dev)) + return 0; + } + } + return 1; +} + +/** * ata_dev_xfermask - Compute supported xfermask of the given device * @dev: Device to compute xfermask for * @@ -4324,10 +4141,7 @@ static void ata_dev_xfermask(struct ata_device *dev) */ if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA)) /* UDMA/44 or higher would be available */ - if ((ap->cbl == ATA_CBL_PATA40) || - (ata_is_40wire(dev) && - (ap->cbl == ATA_CBL_PATA_UNK || - ap->cbl == ATA_CBL_PATA80))) { + if (cable_is_40wire(ap)) { ata_dev_printk(dev, KERN_WARNING, "limited to UDMA/33 due to 40-wire cable\n"); xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); @@ -4367,7 +4181,14 @@ static unsigned int ata_dev_set_xfermode(struct ata_device *dev) tf.feature = SETFEATURES_XFER; tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING; tf.protocol = ATA_PROT_NODATA; - tf.nsect = dev->xfer_mode; + /* If we are using IORDY we must send the mode setting command */ + if (ata_pio_need_iordy(dev)) + tf.nsect = dev->xfer_mode; + /* If the device has IORDY and the controller does not - turn it off */ + else if (ata_id_has_iordy(dev->id)) + tf.nsect = 0x01; + else /* In the ancient relic department - skip all of this */ + return 0; err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); @@ -4513,120 +4334,6 @@ void ata_sg_clean(struct ata_queued_cmd *qc) } /** - * ata_fill_sg - Fill PCI IDE PRD table - * @qc: Metadata associated with taskfile to be transferred - * - * Fill PCI IDE PRD (scatter-gather) table with segments - * associated with the current disk command. - * - * LOCKING: - * spin_lock_irqsave(host lock) - * - */ -static void ata_fill_sg(struct ata_queued_cmd *qc) -{ - struct ata_port *ap = qc->ap; - struct scatterlist *sg; - unsigned int idx; - - WARN_ON(qc->__sg == NULL); - WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); - - idx = 0; - ata_for_each_sg(sg, qc) { - u32 addr, offset; - u32 sg_len, len; - - /* determine if physical DMA addr spans 64K boundary. - * Note h/w doesn't support 64-bit, so we unconditionally - * truncate dma_addr_t to u32. - */ - addr = (u32) sg_dma_address(sg); - sg_len = sg_dma_len(sg); - - while (sg_len) { - offset = addr & 0xffff; - len = sg_len; - if ((offset + sg_len) > 0x10000) - len = 0x10000 - offset; - - ap->prd[idx].addr = cpu_to_le32(addr); - ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); - VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); - - idx++; - sg_len -= len; - addr += len; - } - } - - if (idx) - ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); -} - -/** - * ata_fill_sg_dumb - Fill PCI IDE PRD table - * @qc: Metadata associated with taskfile to be transferred - * - * Fill PCI IDE PRD (scatter-gather) table with segments - * associated with the current disk command. Perform the fill - * so that we avoid writing any length 64K records for - * controllers that don't follow the spec. - * - * LOCKING: - * spin_lock_irqsave(host lock) - * - */ -static void ata_fill_sg_dumb(struct ata_queued_cmd *qc) -{ - struct ata_port *ap = qc->ap; - struct scatterlist *sg; - unsigned int idx; - - WARN_ON(qc->__sg == NULL); - WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); - - idx = 0; - ata_for_each_sg(sg, qc) { - u32 addr, offset; - u32 sg_len, len, blen; - - /* determine if physical DMA addr spans 64K boundary. - * Note h/w doesn't support 64-bit, so we unconditionally - * truncate dma_addr_t to u32. - */ - addr = (u32) sg_dma_address(sg); - sg_len = sg_dma_len(sg); - - while (sg_len) { - offset = addr & 0xffff; - len = sg_len; - if ((offset + sg_len) > 0x10000) - len = 0x10000 - offset; - - blen = len & 0xffff; - ap->prd[idx].addr = cpu_to_le32(addr); - if (blen == 0) { - /* Some PATA chipsets like the CS5530 can't - cope with 0x0000 meaning 64K as the spec says */ - ap->prd[idx].flags_len = cpu_to_le32(0x8000); - blen = 0x8000; - ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000); - } - ap->prd[idx].flags_len = cpu_to_le32(blen); - VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); - - idx++; - sg_len -= len; - addr += len; - } - } - - if (idx) - ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); -} - -/** * ata_check_atapi_dma - Check whether ATAPI DMA can be supported * @qc: Metadata associated with taskfile to check * @@ -4657,43 +4364,6 @@ int ata_check_atapi_dma(struct ata_queued_cmd *qc) } /** - * atapi_qc_may_overflow - Check whether data transfer may overflow - * @qc: ATA command in question - * - * ATAPI commands which transfer variable length data to host - * might overflow due to application error or hardare bug. This - * function checks whether overflow should be drained and ignored - * for @qc. - * - * LOCKING: - * None. - * - * RETURNS: - * 1 if @qc may overflow; otherwise, 0. - */ -static int atapi_qc_may_overflow(struct ata_queued_cmd *qc) -{ - if (qc->tf.protocol != ATA_PROT_ATAPI && - qc->tf.protocol != ATA_PROT_ATAPI_DMA) - return 0; - - if (qc->tf.flags & ATA_TFLAG_WRITE) - return 0; - - switch (qc->cdb[0]) { - case READ_10: - case READ_12: - case WRITE_10: - case WRITE_12: - case GPCMD_READ_CD: - case GPCMD_READ_CD_MSF: - return 0; - } - - return 1; -} - -/** * ata_std_qc_defer - Check whether a qc needs to be deferred * @qc: ATA command in question * @@ -4723,40 +4393,6 @@ int ata_std_qc_defer(struct ata_queued_cmd *qc) return ATA_DEFER_LINK; } -/** - * ata_qc_prep - Prepare taskfile for submission - * @qc: Metadata associated with taskfile to be prepared - * - * Prepare ATA taskfile for submission. - * - * LOCKING: - * spin_lock_irqsave(host lock) - */ -void ata_qc_prep(struct ata_queued_cmd *qc) -{ - if (!(qc->flags & ATA_QCFLAG_DMAMAP)) - return; - - ata_fill_sg(qc); -} - -/** - * ata_dumb_qc_prep - Prepare taskfile for submission - * @qc: Metadata associated with taskfile to be prepared - * - * Prepare ATA taskfile for submission. - * - * LOCKING: - * spin_lock_irqsave(host lock) - */ -void ata_dumb_qc_prep(struct ata_queued_cmd *qc) -{ - if (!(qc->flags & ATA_QCFLAG_DMAMAP)) - return; - - ata_fill_sg_dumb(qc); -} - void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } /** @@ -4799,7 +4435,6 @@ void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) * LOCKING: * spin_lock_irqsave(host lock) */ - void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, unsigned int n_elem) { @@ -4879,21 +4514,22 @@ skip_map: return 0; } + /** - * ata_sg_setup - DMA-map the scatter-gather table associated with a command. - * @qc: Command with scatter-gather table to be mapped. + * ata_sg_setup - DMA-map the scatter-gather table associated with a comman + * @qc: Command with scatter-gather table to be mapped. * - * DMA-map the scatter-gather table associated with queued_cmd @qc. + * DMA-map the scatter-gather table associated with queued_cmd @qc. * - * LOCKING: - * spin_lock_irqsave(host lock) + * LOCKING: + * spin_lock_irqsave(host lock) * - * RETURNS: - * Zero on success, negative on error. + * RETURNS: + * Zero on success, negative on error. * */ -static int ata_sg_setup(struct ata_queued_cmd *qc) +static unsigned int ata_sg_setup(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct scatterlist *sg = qc->__sg; @@ -4915,20 +4551,20 @@ static int ata_sg_setup(struct ata_queued_cmd *qc) memset(pad_buf, 0, ATA_DMA_PAD_SZ); /* - * psg->page/offset are used to copy to-be-written - * data in this function or read data in ata_sg_clean. - */ + * psg->page/offset are used to copy to-be-written + * data in this function or read data in ata_sg_clean. + */ offset = lsg->offset + lsg->length - qc->pad_len; sg_init_table(psg, 1); sg_set_page(psg, nth_page(sg_page(lsg), offset >> PAGE_SHIFT), - qc->pad_len, offset_in_page(offset)); + qc->pad_len, offset_in_page(offset)); if (qc->tf.flags & ATA_TFLAG_WRITE) { void *addr = kmap_atomic(sg_page(psg), KM_IRQ0); memcpy(pad_buf, addr + psg->offset, qc->pad_len); kunmap_atomic(addr, KM_IRQ0); } - + sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); sg_dma_len(psg) = ATA_DMA_PAD_SZ; /* trim last sg */ @@ -4956,7 +4592,7 @@ static int ata_sg_setup(struct ata_queued_cmd *qc) lsg->length += qc->pad_len; return -1; } - + DPRINTK("%d sg elements mapped\n", n_elem); skip_map: @@ -4988,703 +4624,6 @@ void swap_buf_le16(u16 *buf, unsigned int buf_words) } /** - * ata_data_xfer - Transfer data by PIO - * @adev: device to target - * @buf: data buffer - * @buflen: buffer length - * @write_data: read/write - * - * Transfer data from/to the device data register by PIO. - * - * LOCKING: - * Inherited from caller. - */ -void ata_data_xfer(struct ata_device *adev, unsigned char *buf, - unsigned int buflen, int write_data) -{ - struct ata_port *ap = adev->link->ap; - unsigned int words = buflen >> 1; - - /* Transfer multiple of 2 bytes */ - if (write_data) - iowrite16_rep(ap->ioaddr.data_addr, buf, words); - else - ioread16_rep(ap->ioaddr.data_addr, buf, words); - - /* Transfer trailing 1 byte, if any. */ - if (unlikely(buflen & 0x01)) { - u16 align_buf[1] = { 0 }; - unsigned char *trailing_buf = buf + buflen - 1; - - if (write_data) { - memcpy(align_buf, trailing_buf, 1); - iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); - } else { - align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr)); - memcpy(trailing_buf, align_buf, 1); - } - } -} - -/** - * ata_data_xfer_noirq - Transfer data by PIO - * @adev: device to target - * @buf: data buffer - * @buflen: buffer length - * @write_data: read/write - * - * Transfer data from/to the device data register by PIO. Do the - * transfer with interrupts disabled. - * - * LOCKING: - * Inherited from caller. - */ -void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf, - unsigned int buflen, int write_data) -{ - unsigned long flags; - local_irq_save(flags); - ata_data_xfer(adev, buf, buflen, write_data); - local_irq_restore(flags); -} - - -/** - * ata_pio_sector - Transfer a sector of data. - * @qc: Command on going - * - * Transfer qc->sect_size bytes of data from/to the ATA device. - * - * LOCKING: - * Inherited from caller. - */ - -static void ata_pio_sector(struct ata_queued_cmd *qc) -{ - int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); - struct ata_port *ap = qc->ap; - struct page *page; - unsigned int offset; - unsigned char *buf; - - if (qc->curbytes == qc->nbytes - qc->sect_size) - ap->hsm_task_state = HSM_ST_LAST; - - page = sg_page(qc->cursg); - offset = qc->cursg->offset + qc->cursg_ofs; - - /* get the current page and offset */ - page = nth_page(page, (offset >> PAGE_SHIFT)); - offset %= PAGE_SIZE; - - DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); - - if (PageHighMem(page)) { - unsigned long flags; - - /* FIXME: use a bounce buffer */ - local_irq_save(flags); - buf = kmap_atomic(page, KM_IRQ0); - - /* do the actual data transfer */ - ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); - - kunmap_atomic(buf, KM_IRQ0); - local_irq_restore(flags); - } else { - buf = page_address(page); - ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); - } - - qc->curbytes += qc->sect_size; - qc->cursg_ofs += qc->sect_size; - - if (qc->cursg_ofs == qc->cursg->length) { - qc->cursg = sg_next(qc->cursg); - qc->cursg_ofs = 0; - } -} - -/** - * ata_pio_sectors - Transfer one or many sectors. - * @qc: Command on going - * - * Transfer one or many sectors of data from/to the - * ATA device for the DRQ request. - * - * LOCKING: - * Inherited from caller. - */ - -static void ata_pio_sectors(struct ata_queued_cmd *qc) -{ - if (is_multi_taskfile(&qc->tf)) { - /* READ/WRITE MULTIPLE */ - unsigned int nsect; - - WARN_ON(qc->dev->multi_count == 0); - - nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size, - qc->dev->multi_count); - while (nsect--) - ata_pio_sector(qc); - } else - ata_pio_sector(qc); - - ata_altstatus(qc->ap); /* flush */ -} - -/** - * atapi_send_cdb - Write CDB bytes to hardware - * @ap: Port to which ATAPI device is attached. - * @qc: Taskfile currently active - * - * When device has indicated its readiness to accept - * a CDB, this function is called. Send the CDB. - * - * LOCKING: - * caller. - */ - -static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) -{ - /* send SCSI cdb */ - DPRINTK("send cdb\n"); - WARN_ON(qc->dev->cdb_len < 12); - - ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); - ata_altstatus(ap); /* flush */ - - switch (qc->tf.protocol) { - case ATA_PROT_ATAPI: - ap->hsm_task_state = HSM_ST; - break; - case ATA_PROT_ATAPI_NODATA: - ap->hsm_task_state = HSM_ST_LAST; - break; - case ATA_PROT_ATAPI_DMA: - ap->hsm_task_state = HSM_ST_LAST; - /* initiate bmdma */ - ap->ops->bmdma_start(qc); - break; - } -} - -/** - * __atapi_pio_bytes - Transfer data from/to the ATAPI device. - * @qc: Command on going - * @bytes: number of bytes - * - * Transfer Transfer data from/to the ATAPI device. - * - * LOCKING: - * Inherited from caller. - * - */ -static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) -{ - int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); - struct ata_port *ap = qc->ap; - struct ata_eh_info *ehi = &qc->dev->link->eh_info; - struct scatterlist *sg; - struct page *page; - unsigned char *buf; - unsigned int offset, count; - -next_sg: - sg = qc->cursg; - if (unlikely(!sg)) { - /* - * The end of qc->sg is reached and the device expects - * more data to transfer. In order not to overrun qc->sg - * and fulfill length specified in the byte count register, - * - for read case, discard trailing data from the device - * - for write case, padding zero data to the device - */ - u16 pad_buf[1] = { 0 }; - unsigned int i; - - if (bytes > qc->curbytes - qc->nbytes + ATAPI_MAX_DRAIN) { - ata_ehi_push_desc(ehi, "too much trailing data " - "buf=%u cur=%u bytes=%u", - qc->nbytes, qc->curbytes, bytes); - return -1; - } - - /* overflow is exptected for misc ATAPI commands */ - if (bytes && !atapi_qc_may_overflow(qc)) - ata_dev_printk(qc->dev, KERN_WARNING, "ATAPI %u bytes " - "trailing data (cdb=%02x nbytes=%u)\n", - bytes, qc->cdb[0], qc->nbytes); - - for (i = 0; i < (bytes + 1) / 2; i++) - ap->ops->data_xfer(qc->dev, (unsigned char *)pad_buf, 2, do_write); - - qc->curbytes += bytes; - - return 0; - } - - page = sg_page(sg); - offset = sg->offset + qc->cursg_ofs; - - /* get the current page and offset */ - page = nth_page(page, (offset >> PAGE_SHIFT)); - offset %= PAGE_SIZE; - - /* don't overrun current sg */ - count = min(sg->length - qc->cursg_ofs, bytes); - - /* don't cross page boundaries */ - count = min(count, (unsigned int)PAGE_SIZE - offset); - - DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); - - if (PageHighMem(page)) { - unsigned long flags; - - /* FIXME: use bounce buffer */ - local_irq_save(flags); - buf = kmap_atomic(page, KM_IRQ0); - - /* do the actual data transfer */ - ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); - - kunmap_atomic(buf, KM_IRQ0); - local_irq_restore(flags); - } else { - buf = page_address(page); - ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); - } - - bytes -= count; - if ((count & 1) && bytes) - bytes--; - qc->curbytes += count; - qc->cursg_ofs += count; - - if (qc->cursg_ofs == sg->length) { - qc->cursg = sg_next(qc->cursg); - qc->cursg_ofs = 0; - } - - if (bytes) - goto next_sg; - - return 0; -} - -/** - * atapi_pio_bytes - Transfer data from/to the ATAPI device. - * @qc: Command on going - * - * Transfer Transfer data from/to the ATAPI device. - * - * LOCKING: - * Inherited from caller. - */ - -static void atapi_pio_bytes(struct ata_queued_cmd *qc) -{ - struct ata_port *ap = qc->ap; - struct ata_device *dev = qc->dev; - unsigned int ireason, bc_lo, bc_hi, bytes; - int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; - - /* Abuse qc->result_tf for temp storage of intermediate TF - * here to save some kernel stack usage. - * For normal completion, qc->result_tf is not relevant. For - * error, qc->result_tf is later overwritten by ata_qc_complete(). - * So, the correctness of qc->result_tf is not affected. - */ - ap->ops->tf_read(ap, &qc->result_tf); - ireason = qc->result_tf.nsect; - bc_lo = qc->result_tf.lbam; - bc_hi = qc->result_tf.lbah; - bytes = (bc_hi << 8) | bc_lo; - - /* shall be cleared to zero, indicating xfer of data */ - if (ireason & (1 << 0)) - goto err_out; - - /* make sure transfer direction matches expected */ - i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; - if (do_write != i_write) - goto err_out; - - VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes); - - if (__atapi_pio_bytes(qc, bytes)) - goto err_out; - ata_altstatus(ap); /* flush */ - - return; - -err_out: - ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); - qc->err_mask |= AC_ERR_HSM; - ap->hsm_task_state = HSM_ST_ERR; -} - -/** - * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. - * @ap: the target ata_port - * @qc: qc on going - * - * RETURNS: - * 1 if ok in workqueue, 0 otherwise. - */ - -static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) -{ - if (qc->tf.flags & ATA_TFLAG_POLLING) - return 1; - - if (ap->hsm_task_state == HSM_ST_FIRST) { - if (qc->tf.protocol == ATA_PROT_PIO && - (qc->tf.flags & ATA_TFLAG_WRITE)) - return 1; - - if (is_atapi_taskfile(&qc->tf) && - !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) - return 1; - } - - return 0; -} - -/** - * ata_hsm_qc_complete - finish a qc running on standard HSM - * @qc: Command to complete - * @in_wq: 1 if called from workqueue, 0 otherwise - * - * Finish @qc which is running on standard HSM. - * - * LOCKING: - * If @in_wq is zero, spin_lock_irqsave(host lock). - * Otherwise, none on entry and grabs host lock. - */ -static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) -{ - struct ata_port *ap = qc->ap; - unsigned long flags; - - if (ap->ops->error_handler) { - if (in_wq) { - spin_lock_irqsave(ap->lock, flags); - - /* EH might have kicked in while host lock is - * released. - */ - qc = ata_qc_from_tag(ap, qc->tag); - if (qc) { - if (likely(!(qc->err_mask & AC_ERR_HSM))) { - ap->ops->irq_on(ap); - ata_qc_complete(qc); - } else - ata_port_freeze(ap); - } - - spin_unlock_irqrestore(ap->lock, flags); - } else { - if (likely(!(qc->err_mask & AC_ERR_HSM))) - ata_qc_complete(qc); - else - ata_port_freeze(ap); - } - } else { - if (in_wq) { - spin_lock_irqsave(ap->lock, flags); - ap->ops->irq_on(ap); - ata_qc_complete(qc); - spin_unlock_irqrestore(ap->lock, flags); - } else - ata_qc_complete(qc); - } -} - -/** - * ata_hsm_move - move the HSM to the next state. - * @ap: the target ata_port - * @qc: qc on going - * @status: current device status - * @in_wq: 1 if called from workqueue, 0 otherwise - * - * RETURNS: - * 1 when poll next status needed, 0 otherwise. - */ -int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, - u8 status, int in_wq) -{ - unsigned long flags = 0; - int poll_next; - - WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); - - /* Make sure ata_qc_issue_prot() does not throw things - * like DMA polling into the workqueue. Notice that - * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). - */ - WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); - -fsm_start: - DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", - ap->print_id, qc->tf.protocol, ap->hsm_task_state, status); - - switch (ap->hsm_task_state) { - case HSM_ST_FIRST: - /* Send first data block or PACKET CDB */ - - /* If polling, we will stay in the work queue after - * sending the data. Otherwise, interrupt handler - * takes over after sending the data. - */ - poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); - - /* check device status */ - if (unlikely((status & ATA_DRQ) == 0)) { - /* handle BSY=0, DRQ=0 as error */ - if (likely(status & (ATA_ERR | ATA_DF))) - /* device stops HSM for abort/error */ - qc->err_mask |= AC_ERR_DEV; - else - /* HSM violation. Let EH handle this */ - qc->err_mask |= AC_ERR_HSM; - - ap->hsm_task_state = HSM_ST_ERR; - goto fsm_start; - } - - /* Device should not ask for data transfer (DRQ=1) - * when it finds something wrong. - * We ignore DRQ here and stop the HSM by - * changing hsm_task_state to HSM_ST_ERR and - * let the EH abort the command or reset the device. - */ - if (unlikely(status & (ATA_ERR | ATA_DF))) { - /* Some ATAPI tape drives forget to clear the ERR bit - * when doing the next command (mostly request sense). - * We ignore ERR here to workaround and proceed sending - * the CDB. - */ - if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) { - ata_port_printk(ap, KERN_WARNING, - "DRQ=1 with device error, " - "dev_stat 0x%X\n", status); - qc->err_mask |= AC_ERR_HSM; - ap->hsm_task_state = HSM_ST_ERR; - goto fsm_start; - } - } - - /* Send the CDB (atapi) or the first data block (ata pio out). - * During the state transition, interrupt handler shouldn't - * be invoked before the data transfer is complete and - * hsm_task_state is changed. Hence, the following locking. - */ - if (in_wq) - spin_lock_irqsave(ap->lock, flags); - - if (qc->tf.protocol == ATA_PROT_PIO) { - /* PIO data out protocol. - * send first data block. - */ - - /* ata_pio_sectors() might change the state - * to HSM_ST_LAST. so, the state is changed here - * before ata_pio_sectors(). - */ - ap->hsm_task_state = HSM_ST; - ata_pio_sectors(qc); - } else - /* send CDB */ - atapi_send_cdb(ap, qc); - - if (in_wq) - spin_unlock_irqrestore(ap->lock, flags); - - /* if polling, ata_pio_task() handles the rest. - * otherwise, interrupt handler takes over from here. - */ - break; - - case HSM_ST: - /* complete command or read/write the data register */ - if (qc->tf.protocol == ATA_PROT_ATAPI) { - /* ATAPI PIO protocol */ - if ((status & ATA_DRQ) == 0) { - /* No more data to transfer or device error. - * Device error will be tagged in HSM_ST_LAST. - */ - ap->hsm_task_state = HSM_ST_LAST; - goto fsm_start; - } - - /* Device should not ask for data transfer (DRQ=1) - * when it finds something wrong. - * We ignore DRQ here and stop the HSM by - * changing hsm_task_state to HSM_ST_ERR and - * let the EH abort the command or reset the device. - */ - if (unlikely(status & (ATA_ERR | ATA_DF))) { - ata_port_printk(ap, KERN_WARNING, "DRQ=1 with " - "device error, dev_stat 0x%X\n", - status); - qc->err_mask |= AC_ERR_HSM; - ap->hsm_task_state = HSM_ST_ERR; - goto fsm_start; - } - - atapi_pio_bytes(qc); - - if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) - /* bad ireason reported by device */ - goto fsm_start; - - } else { - /* ATA PIO protocol */ - if (unlikely((status & ATA_DRQ) == 0)) { - /* handle BSY=0, DRQ=0 as error */ - if (likely(status & (ATA_ERR | ATA_DF))) - /* device stops HSM for abort/error */ - qc->err_mask |= AC_ERR_DEV; - else - /* HSM violation. Let EH handle this. - * Phantom devices also trigger this - * condition. Mark hint. - */ - qc->err_mask |= AC_ERR_HSM | - AC_ERR_NODEV_HINT; - - ap->hsm_task_state = HSM_ST_ERR; - goto fsm_start; - } - - /* For PIO reads, some devices may ask for - * data transfer (DRQ=1) alone with ERR=1. - * We respect DRQ here and transfer one - * block of junk data before changing the - * hsm_task_state to HSM_ST_ERR. - * - * For PIO writes, ERR=1 DRQ=1 doesn't make - * sense since the data block has been - * transferred to the device. - */ - if (unlikely(status & (ATA_ERR | ATA_DF))) { - /* data might be corrputed */ - qc->err_mask |= AC_ERR_DEV; - - if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { - ata_pio_sectors(qc); - status = ata_wait_idle(ap); - } - - if (status & (ATA_BUSY | ATA_DRQ)) - qc->err_mask |= AC_ERR_HSM; - - /* ata_pio_sectors() might change the - * state to HSM_ST_LAST. so, the state - * is changed after ata_pio_sectors(). - */ - ap->hsm_task_state = HSM_ST_ERR; - goto fsm_start; - } - - ata_pio_sectors(qc); - - if (ap->hsm_task_state == HSM_ST_LAST && - (!(qc->tf.flags & ATA_TFLAG_WRITE))) { - /* all data read */ - status = ata_wait_idle(ap); - goto fsm_start; - } - } - - poll_next = 1; - break; - - case HSM_ST_LAST: - if (unlikely(!ata_ok(status))) { - qc->err_mask |= __ac_err_mask(status); - ap->hsm_task_state = HSM_ST_ERR; - goto fsm_start; - } - - /* no more data to transfer */ - DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", - ap->print_id, qc->dev->devno, status); - - WARN_ON(qc->err_mask); - - ap->hsm_task_state = HSM_ST_IDLE; - - /* complete taskfile transaction */ - ata_hsm_qc_complete(qc, in_wq); - - poll_next = 0; - break; - - case HSM_ST_ERR: - /* make sure qc->err_mask is available to - * know what's wrong and recover - */ - WARN_ON(qc->err_mask == 0); - - ap->hsm_task_state = HSM_ST_IDLE; - - /* complete taskfile transaction */ - ata_hsm_qc_complete(qc, in_wq); - - poll_next = 0; - break; - default: - poll_next = 0; - BUG(); - } - - return poll_next; -} - -static void ata_pio_task(void *_data) -{ - struct ata_port *ap = _data; - struct ata_queued_cmd *qc = ap->port_task_data; - u8 status; - int poll_next; - - DPRINTK("ENTER\n"); - -fsm_start: - WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); - - /* - * This is purely heuristic. This is a fast path. - * Sometimes when we enter, BSY will be cleared in - * a chk-status or two. If not, the drive is probably seeking - * or something. Snooze for a couple msecs, then - * chk-status again. If still busy, queue delayed work. - */ - status = ata_busy_wait(ap, ATA_BUSY, 5); - if (status & ATA_BUSY) { - msleep(2); - status = ata_busy_wait(ap, ATA_BUSY, 10); - if (status & ATA_BUSY) { - ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE); - return; - } - } - - /* move the HSM */ - poll_next = ata_hsm_move(ap, qc, status, 1); - - /* another command or interrupt handler - * may be running at this point. - */ - if (poll_next) - goto fsm_start; -} - -/** * ata_qc_new - Request an available ATA command, for queueing * @ap: Port associated with device @dev * @dev: Device from whom we request an available command structure @@ -5807,7 +4746,23 @@ static void fill_result_tf(struct ata_queued_cmd *qc) struct ata_port *ap = qc->ap; qc->result_tf.flags = qc->tf.flags; - ap->ops->tf_read(ap, &qc->result_tf); + ap->ops->qc_fill_rtf(qc); +} + +static void ata_verify_xfer(struct ata_queued_cmd *qc) +{ + struct ata_device *dev = qc->dev; + + if (ata_tag_internal(qc->tag)) + return; + + if (ata_is_nodata(qc->tf.protocol)) + return; + + if ((dev->mwdma_mask || dev->udma_mask) && ata_is_pio(qc->tf.protocol)) + return; + + dev->flags &= ~ATA_DFLAG_DUBIOUS_XFER; } /** @@ -5881,6 +4836,9 @@ void ata_qc_complete(struct ata_queued_cmd *qc) break; } + if (unlikely(dev->flags & ATA_DFLAG_DUBIOUS_XFER)) + ata_verify_xfer(qc); + __ata_qc_complete(qc); } else { if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) @@ -5898,7 +4856,6 @@ void ata_qc_complete(struct ata_queued_cmd *qc) * ata_qc_complete_multiple - Complete multiple qcs successfully * @ap: port in question * @qc_active: new qc_active mask - * @finish_qc: LLDD callback invoked before completing a qc * * Complete in-flight commands. This functions is meant to be * called from low-level driver's interrupt routine to complete @@ -5911,8 +4868,7 @@ void ata_qc_complete(struct ata_queued_cmd *qc) * RETURNS: * Number of completed commands on success, -errno otherwise. */ -int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, - void (*finish_qc)(struct ata_queued_cmd *)) +int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active) { int nr_done = 0; u32 done_mask; @@ -5933,8 +4889,6 @@ int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, continue; if ((qc = ata_qc_from_tag(ap, i))) { - if (finish_qc) - finish_qc(qc); ata_qc_complete(qc); nr_done++; } @@ -5943,30 +4897,6 @@ int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, return nr_done; } -static inline int ata_should_dma_map(struct ata_queued_cmd *qc) -{ - struct ata_port *ap = qc->ap; - - switch (qc->tf.protocol) { - case ATA_PROT_NCQ: - case ATA_PROT_DMA: - case ATA_PROT_ATAPI_DMA: - return 1; - - case ATA_PROT_ATAPI: - case ATA_PROT_PIO: - if (ap->flags & ATA_FLAG_PIO_DMA) - return 1; - - /* fall through */ - - default: - return 0; - } - - /* never reached */ -} - /** * ata_qc_issue - issue taskfile to device * @qc: command to issue to device @@ -5983,14 +4913,16 @@ void ata_qc_issue(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct ata_link *link = qc->dev->link; + u8 prot = qc->tf.protocol; /* Make sure only one non-NCQ command is outstanding. The * check is skipped for old EH because it reuses active qc to * request ATAPI sense. */ + WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag)); - if (qc->tf.protocol == ATA_PROT_NCQ) { + if (ata_is_ncq(prot)) { WARN_ON(link->sactive & (1 << qc->tag)); if (!link->sactive) @@ -6006,7 +4938,8 @@ void ata_qc_issue(struct ata_queued_cmd *qc) qc->flags |= ATA_QCFLAG_ACTIVE; ap->qc_active |= 1 << qc->tag; - if (ata_should_dma_map(qc)) { + if (ata_is_dma(prot) || (ata_is_pio(prot) && + (ap->flags & ATA_FLAG_PIO_DMA))) { if (qc->flags & ATA_QCFLAG_SG) { if (ata_sg_setup(qc)) goto sg_err; @@ -6018,9 +4951,9 @@ void ata_qc_issue(struct ata_queued_cmd *qc) qc->flags &= ~ATA_QCFLAG_DMAMAP; } - /* if device is sleeping, schedule softreset and abort the link */ + /* if device is sleeping, schedule reset and abort the link */ if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) { - link->eh_info.action |= ATA_EH_SOFTRESET; + link->eh_info.action |= ATA_EH_RESET; ata_ehi_push_desc(&link->eh_info, "waking up from sleep"); ata_link_abort(link); return; @@ -6041,285 +4974,6 @@ err: } /** - * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner - * @qc: command to issue to device - * - * Using various libata functions and hooks, this function - * starts an ATA command. ATA commands are grouped into - * classes called "protocols", and issuing each type of protocol - * is slightly different. - * - * May be used as the qc_issue() entry in ata_port_operations. - * - * LOCKING: - * spin_lock_irqsave(host lock) - * - * RETURNS: - * Zero on success, AC_ERR_* mask on failure - */ - -unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) -{ - struct ata_port *ap = qc->ap; - - /* Use polling pio if the LLD doesn't handle - * interrupt driven pio and atapi CDB interrupt. - */ - if (ap->flags & ATA_FLAG_PIO_POLLING) { - switch (qc->tf.protocol) { - case ATA_PROT_PIO: - case ATA_PROT_NODATA: - case ATA_PROT_ATAPI: - case ATA_PROT_ATAPI_NODATA: - qc->tf.flags |= ATA_TFLAG_POLLING; - break; - case ATA_PROT_ATAPI_DMA: - if (qc->dev->flags & ATA_DFLAG_CDB_INTR) - /* see ata_dma_blacklisted() */ - BUG(); - break; - default: - break; - } - } - - /* select the device */ - ata_dev_select(ap, qc->dev->devno, 1, 0); - - /* start the command */ - switch (qc->tf.protocol) { - case ATA_PROT_NODATA: - if (qc->tf.flags & ATA_TFLAG_POLLING) - ata_qc_set_polling(qc); - - ata_tf_to_host(ap, &qc->tf); - ap->hsm_task_state = HSM_ST_LAST; - - if (qc->tf.flags & ATA_TFLAG_POLLING) - ata_port_queue_task(ap, ata_pio_task, qc, 0); - - break; - - case ATA_PROT_DMA: - WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); - - ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ - ap->ops->bmdma_setup(qc); /* set up bmdma */ - ap->ops->bmdma_start(qc); /* initiate bmdma */ - ap->hsm_task_state = HSM_ST_LAST; - break; - - case ATA_PROT_PIO: - if (qc->tf.flags & ATA_TFLAG_POLLING) - ata_qc_set_polling(qc); - - ata_tf_to_host(ap, &qc->tf); - - if (qc->tf.flags & ATA_TFLAG_WRITE) { - /* PIO data out protocol */ - ap->hsm_task_state = HSM_ST_FIRST; - ata_port_queue_task(ap, ata_pio_task, qc, 0); - - /* always send first data block using - * the ata_pio_task() codepath. - */ - } else { - /* PIO data in protocol */ - ap->hsm_task_state = HSM_ST; - - if (qc->tf.flags & ATA_TFLAG_POLLING) - ata_port_queue_task(ap, ata_pio_task, qc, 0); - - /* if polling, ata_pio_task() handles the rest. - * otherwise, interrupt handler takes over from here. - */ - } - - break; - - case ATA_PROT_ATAPI: - case ATA_PROT_ATAPI_NODATA: - if (qc->tf.flags & ATA_TFLAG_POLLING) - ata_qc_set_polling(qc); - - ata_tf_to_host(ap, &qc->tf); - - ap->hsm_task_state = HSM_ST_FIRST; - - /* send cdb by polling if no cdb interrupt */ - if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || - (qc->tf.flags & ATA_TFLAG_POLLING)) - ata_port_queue_task(ap, ata_pio_task, qc, 0); - break; - - case ATA_PROT_ATAPI_DMA: - WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); - - ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ - ap->ops->bmdma_setup(qc); /* set up bmdma */ - ap->hsm_task_state = HSM_ST_FIRST; - - /* send cdb by polling if no cdb interrupt */ - if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) - ata_port_queue_task(ap, ata_pio_task, qc, 0); - break; - - default: - WARN_ON(1); - return AC_ERR_SYSTEM; - } - - return 0; -} - -/** - * ata_host_intr - Handle host interrupt for given (port, task) - * @ap: Port on which interrupt arrived (possibly...) - * @qc: Taskfile currently active in engine - * - * Handle host interrupt for given queued command. Currently, - * only DMA interrupts are handled. All other commands are - * handled via polling with interrupts disabled (nIEN bit). - * - * LOCKING: - * spin_lock_irqsave(host lock) - * - * RETURNS: - * One if interrupt was handled, zero if not (shared irq). - */ - -inline unsigned int ata_host_intr(struct ata_port *ap, - struct ata_queued_cmd *qc) -{ - struct ata_eh_info *ehi = &ap->link.eh_info; - u8 status, host_stat = 0; - - VPRINTK("ata%u: protocol %d task_state %d\n", - ap->print_id, qc->tf.protocol, ap->hsm_task_state); - - /* Check whether we are expecting interrupt in this state */ - switch (ap->hsm_task_state) { - case HSM_ST_FIRST: - /* Some pre-ATAPI-4 devices assert INTRQ - * at this state when ready to receive CDB. - */ - - /* Check the ATA_DFLAG_CDB_INTR flag is enough here. - * The flag was turned on only for atapi devices. - * No need to check is_atapi_taskfile(&qc->tf) again. - */ - if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) - goto idle_irq; - break; - case HSM_ST_LAST: - if (qc->tf.protocol == ATA_PROT_DMA || - qc->tf.protocol == ATA_PROT_ATAPI_DMA) { - /* check status of DMA engine */ - host_stat = ap->ops->bmdma_status(ap); - VPRINTK("ata%u: host_stat 0x%X\n", - ap->print_id, host_stat); - - /* if it's not our irq... */ - if (!(host_stat & ATA_DMA_INTR)) - goto idle_irq; - - /* before we do anything else, clear DMA-Start bit */ - ap->ops->bmdma_stop(qc); - - if (unlikely(host_stat & ATA_DMA_ERR)) { - /* error when transfering data to/from memory */ - qc->err_mask |= AC_ERR_HOST_BUS; - ap->hsm_task_state = HSM_ST_ERR; - } - } - break; - case HSM_ST: - break; - default: - goto idle_irq; - } - - /* check altstatus */ - status = ata_altstatus(ap); - if (status & ATA_BUSY) - goto idle_irq; - - /* check main status, clearing INTRQ */ - status = ata_chk_status(ap); - if (unlikely(status & ATA_BUSY)) - goto idle_irq; - - /* ack bmdma irq events */ - ap->ops->irq_clear(ap); - - ata_hsm_move(ap, qc, status, 0); - - if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || - qc->tf.protocol == ATA_PROT_ATAPI_DMA)) - ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); - - return 1; /* irq handled */ - -idle_irq: - ap->stats.idle_irq++; - -#ifdef ATA_IRQ_TRAP - if ((ap->stats.idle_irq % 1000) == 0) { - ata_chk_status(ap); - ap->ops->irq_clear(ap); - ata_port_printk(ap, KERN_WARNING, "irq trap\n"); - return 1; - } -#endif - return 0; /* irq not handled */ -} - -/** - * ata_interrupt - Default ATA host interrupt handler - * @irq: irq line (unused) - * @dev_instance: pointer to our ata_host information structure - * - * Default interrupt handler for PCI IDE devices. Calls - * ata_host_intr() for each port that is not disabled. - * - * LOCKING: - * Obtains host lock during operation. - * - * RETURNS: - * IRQ_NONE or IRQ_HANDLED. - */ - -irqreturn_t ata_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs) -{ - struct ata_host *host = dev_instance; - unsigned int i; - unsigned int handled = 0; - unsigned long flags; - - /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ - spin_lock_irqsave(&host->lock, flags); - - for (i = 0; i < host->n_ports; i++) { - struct ata_port *ap; - - ap = host->ports[i]; - if (ap && - !(ap->flags & ATA_FLAG_DISABLED)) { - struct ata_queued_cmd *qc; - - qc = ata_qc_from_tag(ap, ap->link.active_tag); - if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && - (qc->flags & ATA_QCFLAG_ACTIVE)) - handled |= ata_host_intr(ap, qc); - } - } - - spin_unlock_irqrestore(&host->lock, flags); - - return IRQ_RETVAL(handled); -} - -/** * sata_scr_valid - test whether SCRs are accessible * @link: ATA link to test SCR accessibility for * @@ -6477,32 +5131,6 @@ int ata_link_offline(struct ata_link *link) return 0; } -int ata_flush_cache(struct ata_device *dev) -{ - unsigned int err_mask; - u8 cmd; - - if (!ata_try_flush_cache(dev)) - return 0; - - if (dev->flags & ATA_DFLAG_FLUSH_EXT) - cmd = ATA_CMD_FLUSH_EXT; - else - cmd = ATA_CMD_FLUSH; - - /* This is wrong. On a failed flush we get back the LBA of the lost - sector and we should (assuming it wasn't aborted as unknown) issue - a further flush command to continue the writeback until it - does not error */ - err_mask = ata_do_simple_cmd(dev, cmd); - if (err_mask) { - ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n"); - return -EIO; - } - - return 0; -} - #ifdef CONFIG_PM static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg, unsigned int action, unsigned int ehi_flags, @@ -6598,7 +5226,7 @@ int ata_host_suspend(struct ata_host *host, pm_message_t mesg) */ void ata_host_resume(struct ata_host *host) { - ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET, + ata_host_request_pm(host, PMSG_ON, ATA_EH_RESET, ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0); host->dev->power.power_state = PMSG_ON; @@ -6721,7 +5349,8 @@ void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp) */ int sata_link_init_spd(struct ata_link *link) { - u32 scontrol, spd; + u32 scontrol; + u8 spd; int rc; rc = sata_scr_read(link, SCR_CONTROL, &scontrol); @@ -6732,6 +5361,8 @@ int sata_link_init_spd(struct ata_link *link) if (spd) link->hw_sata_spd_limit &= (1 << spd) - 1; + ata_force_spd_limit(link); + link->sata_spd_limit = link->hw_sata_spd_limit; return 0; @@ -6927,8 +5558,6 @@ struct ata_host *ata_host_alloc_pinfo(struct device *dev, if (!host->ops && (pi->port_ops != &ata_dummy_port_ops)) host->ops = pi->port_ops; - if (!host->private_data && pi->private_data) - host->private_data = pi->private_data; } return host; @@ -6953,6 +5582,56 @@ static void ata_host_stop(struct device *gendev, void *res) } /** + * ata_finalize_port_ops - finalize ata_port_operations + * @ops: ata_port_operations to finalize + * + * An ata_port_operations can inherit from another ops and that + * ops can again inherit from another. This can go on as many + * times as necessary as long as there is no loop in the + * inheritance chain. + * + * Ops tables are finalized when the host is started. NULL or + * unspecified entries are inherited from the closet ancestor + * which has the method and the entry is populated with it. + * After finalization, the ops table directly points to all the + * methods and ->inherits is no longer necessary and cleared. + * + * Using ATA_OP_NULL, inheriting ops can force a method to NULL. + * + * LOCKING: + * None. + */ +static void ata_finalize_port_ops(struct ata_port_operations *ops) +{ + static DEFINE_SPINLOCK(lock); + const struct ata_port_operations *cur; + void **begin = (void **)ops; + void **end = (void **)&ops->inherits; + void **pp; + + if (!ops || !ops->inherits) + return; + + spin_lock(&lock); + + for (cur = ops->inherits; cur; cur = cur->inherits) { + void **inherit = (void **)cur; + + for (pp = begin; pp < end; pp++, inherit++) + if (!*pp) + *pp = *inherit; + } + + for (pp = begin; pp < end; pp++) + if (IS_ERR(*pp)) + *pp = NULL; + + ops->inherits = NULL; + + spin_unlock(&lock); +} + +/** * ata_host_start - start and freeze ports of an ATA host * @host: ATA host to start ports for * @@ -6977,9 +5656,13 @@ int ata_host_start(struct ata_host *host) if (host->flags & ATA_HOST_STARTED) return 0; + ata_finalize_port_ops(host->ops); + for (i = 0; i < host->n_ports; i++) { struct ata_port *ap = host->ports[i]; + ata_finalize_port_ops(ap->ops); + if (!host->ops && !ata_port_is_dummy(ap)) host->ops = ap->ops; @@ -7003,7 +5686,9 @@ int ata_host_start(struct ata_host *host) rc = ap->ops->port_start(ap); if (rc) { if (rc != -ENODEV) - dev_printk(KERN_ERR, host->dev, "failed to start port %d (errno=%d)\n", i, rc); + dev_printk(KERN_ERR, host->dev, + "failed to start port %d " + "(errno=%d)\n", i, rc); goto err_out; } } @@ -7039,7 +5724,7 @@ int ata_host_start(struct ata_host *host) */ /* KILLME - the only user left is ipr */ void ata_host_init(struct ata_host *host, struct device *dev, - unsigned long flags, const struct ata_port_operations *ops) + unsigned long flags, struct ata_port_operations *ops) { spin_lock_init(&host->lock); host->dev = dev; @@ -7124,7 +5809,6 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) DPRINTK("probe begin\n"); for (i = 0; i < host->n_ports; i++) { struct ata_port *ap = host->ports[i]; - int rc; /* probe */ if (ap->ops->error_handler) { @@ -7136,9 +5820,8 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) /* kick EH for boot probing */ spin_lock_irqsave(ap->lock, flags); - ehi->probe_mask = - (1 << ata_link_max_devices(&ap->link)) - 1; - ehi->action |= ATA_EH_SOFTRESET; + ehi->probe_mask |= ATA_ALL_DEVICES; + ehi->action |= ATA_EH_RESET | ATA_EH_LPM; ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET; ap->pflags &= ~ATA_PFLAG_INITIALIZING; @@ -7171,7 +5854,6 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) struct ata_port *ap = host->ports[i]; ata_scsi_scan_host(ap, 1); - ata_lpm_schedule(ap, ap->pm_policy); } return 0; @@ -7276,10 +5958,7 @@ static void ata_port_detach(struct ata_port *ap) spin_unlock_irqrestore(ap->lock, flags); ata_port_wait_eh(ap); - - flush_workqueue(ata_aux_wq); - if (!cancel_delayed_work(&ap->hotplug_task)) - flush_workqueue(ata_aux_wq); + cancel_rearming_delayed_work(&ap->hotplug_task); skip_eh: /* remove the associated SCSI host */ @@ -7306,33 +5985,6 @@ void ata_host_detach(struct ata_host *host) ata_acpi_dissociate(host); } -/** - * ata_std_ports - initialize ioaddr with standard port offsets. - * @ioaddr: IO address structure to be initialized - * - * Utility function which initializes data_addr, error_addr, - * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, - * device_addr, status_addr, and command_addr to standard offsets - * relative to cmd_addr. - * - * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. - */ - -void ata_std_ports(struct ata_ioports *ioaddr) -{ - ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; - ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; - ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; - ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; - ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; - ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; - ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; - ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; - ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; - ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; -} - - #ifdef CONFIG_PCI /** @@ -7444,10 +6096,187 @@ int ata_pci_device_resume(struct pci_dev *pdev) #endif /* CONFIG_PCI */ +static int __init ata_parse_force_one(char **cur, + struct ata_force_ent *force_ent, + const char **reason) +{ + /* FIXME: Currently, there's no way to tag init const data and + * using __initdata causes build failure on some versions of + * gcc. Once __initdataconst is implemented, add const to the + * following structure. + */ + static struct ata_force_param force_tbl[] __initdata = { + { "40c", .cbl = ATA_CBL_PATA40 }, + { "80c", .cbl = ATA_CBL_PATA80 }, + { "short40c", .cbl = ATA_CBL_PATA40_SHORT }, + { "unk", .cbl = ATA_CBL_PATA_UNK }, + { "ign", .cbl = ATA_CBL_PATA_IGN }, + { "sata", .cbl = ATA_CBL_SATA }, + { "1.5Gbps", .spd_limit = 1 }, + { "3.0Gbps", .spd_limit = 2 }, + { "noncq", .horkage_on = ATA_HORKAGE_NONCQ }, + { "ncq", .horkage_off = ATA_HORKAGE_NONCQ }, + { "pio0", .xfer_mask = 1 << (ATA_SHIFT_PIO + 0) }, + { "pio1", .xfer_mask = 1 << (ATA_SHIFT_PIO + 1) }, + { "pio2", .xfer_mask = 1 << (ATA_SHIFT_PIO + 2) }, + { "pio3", .xfer_mask = 1 << (ATA_SHIFT_PIO + 3) }, + { "pio4", .xfer_mask = 1 << (ATA_SHIFT_PIO + 4) }, + { "pio5", .xfer_mask = 1 << (ATA_SHIFT_PIO + 5) }, + { "pio6", .xfer_mask = 1 << (ATA_SHIFT_PIO + 6) }, + { "mwdma0", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 0) }, + { "mwdma1", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 1) }, + { "mwdma2", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 2) }, + { "mwdma3", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 3) }, + { "mwdma4", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 4) }, + { "udma0", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) }, + { "udma16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) }, + { "udma/16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) }, + { "udma1", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) }, + { "udma25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) }, + { "udma/25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) }, + { "udma2", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) }, + { "udma33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) }, + { "udma/33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) }, + { "udma3", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) }, + { "udma44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) }, + { "udma/44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) }, + { "udma4", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) }, + { "udma66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) }, + { "udma/66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) }, + { "udma5", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) }, + { "udma100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) }, + { "udma/100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) }, + { "udma6", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) }, + { "udma133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) }, + { "udma/133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) }, + { "udma7", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 7) }, + }; + char *start = *cur, *p = *cur; + char *id, *val, *endp; + const struct ata_force_param *match_fp = NULL; + int nr_matches = 0, i; + + /* find where this param ends and update *cur */ + while (*p != '\0' && *p != ',') + p++; + + if (*p == '\0') + *cur = p; + else + *cur = p + 1; + + *p = '\0'; + + /* parse */ + p = strchr(start, ':'); + if (!p) { + val = strstrip(start); + goto parse_val; + } + *p = '\0'; + + id = strstrip(start); + val = strstrip(p + 1); + + /* parse id */ + p = strchr(id, '.'); + if (p) { + *p++ = '\0'; + force_ent->device = simple_strtoul(p, &endp, 10); + if (p == endp || *endp != '\0') { + *reason = "invalid device"; + return -EINVAL; + } + } + + force_ent->port = simple_strtoul(id, &endp, 10); + if (p == endp || *endp != '\0') { + *reason = "invalid port/link"; + return -EINVAL; + } + + parse_val: + /* parse val, allow shortcuts so that both 1.5 and 1.5Gbps work */ + for (i = 0; i < ARRAY_SIZE(force_tbl); i++) { + const struct ata_force_param *fp = &force_tbl[i]; + + if (strncasecmp(val, fp->name, strlen(val))) + continue; + + nr_matches++; + match_fp = fp; + + if (strcasecmp(val, fp->name) == 0) { + nr_matches = 1; + break; + } + } + + if (!nr_matches) { + *reason = "unknown value"; + return -EINVAL; + } + if (nr_matches > 1) { + *reason = "ambigious value"; + return -EINVAL; + } + + force_ent->param = *match_fp; + + return 0; +} + +static void __init ata_parse_force_param(void) +{ + int idx = 0, size = 1; + int last_port = -1, last_device = -1; + char *p, *cur, *next; + + /* calculate maximum number of params and allocate force_tbl */ + for (p = ata_force_param_buf; *p; p++) + if (*p == ',') + size++; + + ata_force_tbl = kzalloc(sizeof(ata_force_tbl[0]) * size, GFP_KERNEL); + if (!ata_force_tbl) { + printk(KERN_WARNING "ata: failed to extend force table, " + "libata.force ignored\n"); + return; + } + + /* parse and populate the table */ + for (cur = ata_force_param_buf; *cur != '\0'; cur = next) { + const char *reason = ""; + struct ata_force_ent te = { .port = -1, .device = -1 }; + + next = cur; + if (ata_parse_force_one(&next, &te, &reason)) { + printk(KERN_WARNING "ata: failed to parse force " + "parameter \"%s\" (%s)\n", + cur, reason); + continue; + } + + if (te.port == -1) { + te.port = last_port; + te.device = last_device; + } + + ata_force_tbl[idx++] = te; + + last_port = te.port; + last_device = te.device; + } + + ata_force_tbl_size = idx; +} static int __init ata_init(void) { ata_probe_timeout *= HZ; + + ata_parse_force_param(); + ata_wq = create_workqueue("ata"); if (!ata_wq) return -ENOMEM; @@ -7464,6 +6293,7 @@ static int __init ata_init(void) static void __exit ata_exit(void) { + kfree(ata_force_tbl); destroy_workqueue(ata_wq); destroy_workqueue(ata_aux_wq); } @@ -7541,33 +6371,20 @@ u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, /* * Dummy port_ops */ -static void ata_dummy_noret(struct ata_port *ap) { } -static int ata_dummy_ret0(struct ata_port *ap) { return 0; } -static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { } - -static u8 ata_dummy_check_status(struct ata_port *ap) +static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc) { - return ATA_DRDY; + return AC_ERR_SYSTEM; } -static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc) +static void ata_dummy_error_handler(struct ata_port *ap) { - return AC_ERR_SYSTEM; + /* truly dummy */ } -const struct ata_port_operations ata_dummy_port_ops = { - .check_status = ata_dummy_check_status, - .check_altstatus = ata_dummy_check_status, - .dev_select = ata_noop_dev_select, +struct ata_port_operations ata_dummy_port_ops = { .qc_prep = ata_noop_qc_prep, .qc_issue = ata_dummy_qc_issue, - .freeze = ata_dummy_noret, - .thaw = ata_dummy_noret, - .error_handler = ata_dummy_noret, - .post_internal_cmd = ata_dummy_qc_noret, - .irq_clear = ata_dummy_noret, - .port_start = ata_dummy_ret0, - .port_stop = ata_dummy_noret, + .error_handler = ata_dummy_error_handler, }; const struct ata_port_info ata_dummy_port_info = { @@ -7583,10 +6400,11 @@ const struct ata_port_info ata_dummy_port_info = { EXPORT_SYMBOL_GPL(sata_deb_timing_normal); EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); EXPORT_SYMBOL_GPL(sata_deb_timing_long); +EXPORT_SYMBOL_GPL(ata_base_port_ops); +EXPORT_SYMBOL_GPL(sata_port_ops); EXPORT_SYMBOL_GPL(ata_dummy_port_ops); EXPORT_SYMBOL_GPL(ata_dummy_port_info); EXPORT_SYMBOL_GPL(ata_std_bios_param); -EXPORT_SYMBOL_GPL(ata_std_ports); EXPORT_SYMBOL_GPL(ata_host_init); EXPORT_SYMBOL_GPL(ata_host_alloc); EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo); @@ -7596,48 +6414,29 @@ EXPORT_SYMBOL_GPL(ata_host_activate); EXPORT_SYMBOL_GPL(ata_host_detach); EXPORT_SYMBOL_GPL(ata_sg_init); EXPORT_SYMBOL_GPL(ata_sg_init_one); -EXPORT_SYMBOL_GPL(ata_hsm_move); EXPORT_SYMBOL_GPL(ata_qc_complete); EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); -EXPORT_SYMBOL_GPL(ata_qc_issue_prot); -EXPORT_SYMBOL_GPL(ata_tf_load); -EXPORT_SYMBOL_GPL(ata_tf_read); -EXPORT_SYMBOL_GPL(ata_noop_dev_select); -EXPORT_SYMBOL_GPL(ata_std_dev_select); -EXPORT_SYMBOL_GPL(sata_print_link_status); +EXPORT_SYMBOL_GPL(atapi_cmd_type); EXPORT_SYMBOL_GPL(ata_tf_to_fis); EXPORT_SYMBOL_GPL(ata_tf_from_fis); -EXPORT_SYMBOL_GPL(ata_check_status); -EXPORT_SYMBOL_GPL(ata_altstatus); -EXPORT_SYMBOL_GPL(ata_exec_command); +EXPORT_SYMBOL_GPL(ata_pack_xfermask); +EXPORT_SYMBOL_GPL(ata_unpack_xfermask); +EXPORT_SYMBOL_GPL(ata_xfer_mask2mode); +EXPORT_SYMBOL_GPL(ata_xfer_mode2mask); +EXPORT_SYMBOL_GPL(ata_xfer_mode2shift); +EXPORT_SYMBOL_GPL(ata_mode_string); +EXPORT_SYMBOL_GPL(ata_id_xfermask); EXPORT_SYMBOL_GPL(ata_port_start); -EXPORT_SYMBOL_GPL(ata_sff_port_start); -EXPORT_SYMBOL_GPL(ata_interrupt); EXPORT_SYMBOL_GPL(ata_do_set_mode); -EXPORT_SYMBOL_GPL(ata_data_xfer); -EXPORT_SYMBOL_GPL(ata_data_xfer_noirq); EXPORT_SYMBOL_GPL(ata_std_qc_defer); -EXPORT_SYMBOL_GPL(ata_qc_prep); -EXPORT_SYMBOL_GPL(ata_dumb_qc_prep); EXPORT_SYMBOL_GPL(ata_noop_qc_prep); -EXPORT_SYMBOL_GPL(ata_bmdma_setup); -EXPORT_SYMBOL_GPL(ata_bmdma_start); -EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); -EXPORT_SYMBOL_GPL(ata_bmdma_status); -EXPORT_SYMBOL_GPL(ata_bmdma_stop); -EXPORT_SYMBOL_GPL(ata_bmdma_freeze); -EXPORT_SYMBOL_GPL(ata_bmdma_thaw); -EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); -EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); -EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); EXPORT_SYMBOL_GPL(ata_port_probe); EXPORT_SYMBOL_GPL(ata_dev_disable); EXPORT_SYMBOL_GPL(sata_set_spd); +EXPORT_SYMBOL_GPL(ata_wait_after_reset); EXPORT_SYMBOL_GPL(sata_link_debounce); EXPORT_SYMBOL_GPL(sata_link_resume); -EXPORT_SYMBOL_GPL(ata_bus_reset); EXPORT_SYMBOL_GPL(ata_std_prereset); -EXPORT_SYMBOL_GPL(ata_std_softreset); EXPORT_SYMBOL_GPL(sata_link_hardreset); EXPORT_SYMBOL_GPL(sata_std_hardreset); EXPORT_SYMBOL_GPL(ata_std_postreset); @@ -7646,16 +6445,11 @@ EXPORT_SYMBOL_GPL(ata_dev_pair); EXPORT_SYMBOL_GPL(ata_port_disable); EXPORT_SYMBOL_GPL(ata_ratelimit); EXPORT_SYMBOL_GPL(ata_wait_register); -EXPORT_SYMBOL_GPL(ata_busy_sleep); -EXPORT_SYMBOL_GPL(ata_wait_after_reset); -EXPORT_SYMBOL_GPL(ata_wait_ready); -EXPORT_SYMBOL_GPL(ata_port_queue_task); EXPORT_SYMBOL_GPL(ata_scsi_ioctl); EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); EXPORT_SYMBOL_GPL(ata_scsi_slave_config); EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); -EXPORT_SYMBOL_GPL(ata_host_intr); EXPORT_SYMBOL_GPL(sata_scr_valid); EXPORT_SYMBOL_GPL(sata_scr_read); EXPORT_SYMBOL_GPL(sata_scr_write); @@ -7668,19 +6462,16 @@ EXPORT_SYMBOL_GPL(ata_host_resume); #endif /* CONFIG_PM */ EXPORT_SYMBOL_GPL(ata_id_string); EXPORT_SYMBOL_GPL(ata_id_c_string); -EXPORT_SYMBOL_GPL(ata_id_to_dma_mode); EXPORT_SYMBOL_GPL(ata_scsi_simulate); EXPORT_SYMBOL_GPL(ata_pio_need_iordy); +EXPORT_SYMBOL_GPL(ata_timing_find_mode); EXPORT_SYMBOL_GPL(ata_timing_compute); EXPORT_SYMBOL_GPL(ata_timing_merge); +EXPORT_SYMBOL_GPL(ata_timing_cycle2mode); #ifdef CONFIG_PCI EXPORT_SYMBOL_GPL(pci_test_config_bits); -EXPORT_SYMBOL_GPL(ata_pci_init_sff_host); -EXPORT_SYMBOL_GPL(ata_pci_init_bmdma); -EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host); -EXPORT_SYMBOL_GPL(ata_pci_init_one); EXPORT_SYMBOL_GPL(ata_pci_remove_one); #ifdef CONFIG_PM EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend); @@ -7688,16 +6479,8 @@ EXPORT_SYMBOL_GPL(ata_pci_device_do_resume); EXPORT_SYMBOL_GPL(ata_pci_device_suspend); EXPORT_SYMBOL_GPL(ata_pci_device_resume); #endif /* CONFIG_PM */ -EXPORT_SYMBOL_GPL(ata_pci_default_filter); -EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); #endif /* CONFIG_PCI */ -EXPORT_SYMBOL_GPL(sata_pmp_qc_defer_cmd_switch); -EXPORT_SYMBOL_GPL(sata_pmp_std_prereset); -EXPORT_SYMBOL_GPL(sata_pmp_std_hardreset); -EXPORT_SYMBOL_GPL(sata_pmp_std_postreset); -EXPORT_SYMBOL_GPL(sata_pmp_do_eh); - EXPORT_SYMBOL_GPL(__ata_ehi_push_desc); EXPORT_SYMBOL_GPL(ata_ehi_push_desc); EXPORT_SYMBOL_GPL(ata_ehi_clear_desc); @@ -7714,11 +6497,12 @@ EXPORT_SYMBOL_GPL(ata_eh_freeze_port); EXPORT_SYMBOL_GPL(ata_eh_thaw_port); EXPORT_SYMBOL_GPL(ata_eh_qc_complete); EXPORT_SYMBOL_GPL(ata_eh_qc_retry); +EXPORT_SYMBOL_GPL(ata_eh_analyze_ncq_error); EXPORT_SYMBOL_GPL(ata_do_eh); -EXPORT_SYMBOL_GPL(ata_irq_on); -EXPORT_SYMBOL_GPL(ata_dev_try_classify); +EXPORT_SYMBOL_GPL(ata_std_error_handler); EXPORT_SYMBOL_GPL(ata_cable_40wire); EXPORT_SYMBOL_GPL(ata_cable_80wire); EXPORT_SYMBOL_GPL(ata_cable_unknown); +EXPORT_SYMBOL_GPL(ata_cable_ignore); EXPORT_SYMBOL_GPL(ata_cable_sata); diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c index f0124a8..f4eccda 100644 --- a/drivers/ata/libata-eh.c +++ b/drivers/ata/libata-eh.c @@ -46,9 +46,26 @@ #include "libata.h" enum { + /* speed down verdicts */ ATA_EH_SPDN_NCQ_OFF = (1 << 0), ATA_EH_SPDN_SPEED_DOWN = (1 << 1), ATA_EH_SPDN_FALLBACK_TO_PIO = (1 << 2), + ATA_EH_SPDN_KEEP_ERRORS = (1 << 3), + + /* error flags */ + ATA_EFLAG_IS_IO = (1 << 0), + ATA_EFLAG_DUBIOUS_XFER = (1 << 1), + + /* error categories */ + ATA_ECAT_NONE = 0, + ATA_ECAT_ATA_BUS = 1, + ATA_ECAT_TOUT_HSM = 2, + ATA_ECAT_UNK_DEV = 3, + ATA_ECAT_DUBIOUS_NONE = 4, + ATA_ECAT_DUBIOUS_ATA_BUS = 5, + ATA_ECAT_DUBIOUS_TOUT_HSM = 6, + ATA_ECAT_DUBIOUS_UNK_DEV = 7, + ATA_ECAT_NR = 8, }; /* Waiting in ->prereset can never be reliable. It's sometimes nice @@ -213,12 +230,13 @@ void ata_port_pbar_desc(struct ata_port *ap, int bar, ssize_t offset, if (offset < 0) ata_port_desc(ap, "%s %s%llu@0x%llx", name, type, len, start); else - ata_port_desc(ap, "%s 0x%llx", name, start + offset); + ata_port_desc(ap, "%s 0x%llx", name, + start + (unsigned long long)offset); } #endif /* CONFIG_PCI */ -static void ata_ering_record(struct ata_ering *ering, int is_io, +static void ata_ering_record(struct ata_ering *ering, unsigned int eflags, unsigned int err_mask) { struct ata_ering_entry *ent; @@ -229,11 +247,20 @@ static void ata_ering_record(struct ata_ering *ering, int is_io, ering->cursor %= ATA_ERING_SIZE; ent = &ering->ring[ering->cursor]; - ent->is_io = is_io; + ent->eflags = eflags; ent->err_mask = err_mask; ent->timestamp = get_jiffies_64(); } +static struct ata_ering_entry *ata_ering_top(struct ata_ering *ering) +{ + struct ata_ering_entry *ent = &ering->ring[ering->cursor]; + + if (ent->err_mask) + return ent; + return NULL; +} + static void ata_ering_clear(struct ata_ering *ering) { memset(ering, 0, sizeof(*ering)); @@ -445,9 +472,20 @@ void ata_scsi_error(struct Scsi_Host *host) spin_lock_irqsave(ap->lock, flags); __ata_port_for_each_link(link, ap) { + struct ata_eh_context *ehc = &link->eh_context; + struct ata_device *dev; + memset(&link->eh_context, 0, sizeof(link->eh_context)); link->eh_context.i = link->eh_info; memset(&link->eh_info, 0, sizeof(link->eh_info)); + + ata_link_for_each_dev(dev, link) { + int devno = dev->devno; + + ehc->saved_xfer_mode[devno] = dev->xfer_mode; + if (ata_ncq_enabled(dev)) + ehc->saved_ncq_enabled |= 1 << devno; + } } ap->pflags |= ATA_PFLAG_EH_IN_PROGRESS; @@ -509,7 +547,7 @@ void ata_scsi_error(struct Scsi_Host *host) if (ap->pflags & ATA_PFLAG_LOADING) ap->pflags &= ~ATA_PFLAG_LOADING; else if (ap->pflags & ATA_PFLAG_SCSI_HOTPLUG) - queue_delayed_work(ata_aux_wq, &ap->hotplug_task, 0); + queue_work(ata_aux_wq, &ap->hotplug_task); if (ap->pflags & ATA_PFLAG_RECOVERED) ata_port_printk(ap, KERN_INFO, "EH complete\n"); @@ -835,9 +873,9 @@ int sata_async_notification(struct ata_port *ap) if (rc == 0) sata_scr_write(&ap->link, SCR_NOTIFICATION, sntf); - if (!ap->nr_pmp_links || rc) { + if (!sata_pmp_attached(ap) || rc) { /* PMP is not attached or SNTF is not available */ - if (!ap->nr_pmp_links) { + if (!sata_pmp_attached(ap)) { /* PMP is not attached. Check whether ATAPI * AN is configured. If so, notify media * change. @@ -1041,19 +1079,6 @@ void ata_eh_about_to_do(struct ata_link *link, struct ata_device *dev, spin_lock_irqsave(ap->lock, flags); - /* Reset is represented by combination of actions and EHI - * flags. Suck in all related bits before clearing eh_info to - * avoid losing requested action. - */ - if (action & ATA_EH_RESET_MASK) { - ehc->i.action |= ehi->action & ATA_EH_RESET_MASK; - ehc->i.flags |= ehi->flags & ATA_EHI_RESET_MODIFIER_MASK; - - /* make sure all reset actions are cleared & clear EHI flags */ - action |= ATA_EH_RESET_MASK; - ehi->flags &= ~ATA_EHI_RESET_MODIFIER_MASK; - } - ata_eh_clear_action(link, dev, ehi, action); if (!(ehc->i.flags & ATA_EHI_QUIET)) @@ -1079,12 +1104,6 @@ void ata_eh_done(struct ata_link *link, struct ata_device *dev, { struct ata_eh_context *ehc = &link->eh_context; - /* if reset is complete, clear all reset actions & reset modifier */ - if (action & ATA_EH_RESET_MASK) { - action |= ATA_EH_RESET_MASK; - ehc->i.flags &= ~ATA_EHI_RESET_MODIFIER_MASK; - } - ata_eh_clear_action(link, dev, &ehc->i, action); } @@ -1260,10 +1279,10 @@ static unsigned int atapi_eh_request_sense(struct ata_queued_cmd *qc) /* is it pointless to prefer PIO for "safety reasons"? */ if (ap->flags & ATA_FLAG_PIO_DMA) { - tf.protocol = ATA_PROT_ATAPI_DMA; + tf.protocol = ATAPI_PROT_DMA; tf.feature |= ATAPI_PKT_DMA; } else { - tf.protocol = ATA_PROT_ATAPI; + tf.protocol = ATAPI_PROT_PIO; tf.lbam = SCSI_SENSE_BUFFERSIZE; tf.lbah = 0; } @@ -1289,22 +1308,17 @@ static void ata_eh_analyze_serror(struct ata_link *link) unsigned int err_mask = 0, action = 0; u32 hotplug_mask; - if (serror & SERR_PERSISTENT) { - err_mask |= AC_ERR_ATA_BUS; - action |= ATA_EH_HARDRESET; - } - if (serror & - (SERR_DATA_RECOVERED | SERR_COMM_RECOVERED | SERR_DATA)) { + if (serror & (SERR_PERSISTENT | SERR_DATA)) { err_mask |= AC_ERR_ATA_BUS; - action |= ATA_EH_SOFTRESET; + action |= ATA_EH_RESET; } if (serror & SERR_PROTOCOL) { err_mask |= AC_ERR_HSM; - action |= ATA_EH_SOFTRESET; + action |= ATA_EH_RESET; } if (serror & SERR_INTERNAL) { err_mask |= AC_ERR_SYSTEM; - action |= ATA_EH_HARDRESET; + action |= ATA_EH_RESET; } /* Determine whether a hotplug event has occurred. Both @@ -1338,7 +1352,7 @@ static void ata_eh_analyze_serror(struct ata_link *link) * LOCKING: * Kernel thread context (may sleep). */ -static void ata_eh_analyze_ncq_error(struct ata_link *link) +void ata_eh_analyze_ncq_error(struct ata_link *link) { struct ata_port *ap = link->ap; struct ata_eh_context *ehc = &link->eh_context; @@ -1383,6 +1397,7 @@ static void ata_eh_analyze_ncq_error(struct ata_link *link) /* we've got the perpetrator, condemn it */ qc = __ata_qc_from_tag(ap, tag); memcpy(&qc->result_tf, &tf, sizeof(tf)); + qc->result_tf.flags = ATA_TFLAG_ISADDR | ATA_TFLAG_LBA | ATA_TFLAG_LBA48; qc->err_mask |= AC_ERR_DEV | AC_ERR_NCQ; ehc->i.err_mask &= ~AC_ERR_DEV; } @@ -1410,7 +1425,7 @@ static unsigned int ata_eh_analyze_tf(struct ata_queued_cmd *qc, if ((stat & (ATA_BUSY | ATA_DRQ | ATA_DRDY)) != ATA_DRDY) { qc->err_mask |= AC_ERR_HSM; - return ATA_EH_SOFTRESET; + return ATA_EH_RESET; } if (stat & (ATA_ERR | ATA_DF)) @@ -1446,25 +1461,34 @@ static unsigned int ata_eh_analyze_tf(struct ata_queued_cmd *qc, } if (qc->err_mask & (AC_ERR_HSM | AC_ERR_TIMEOUT | AC_ERR_ATA_BUS)) - action |= ATA_EH_SOFTRESET; + action |= ATA_EH_RESET; return action; } -static int ata_eh_categorize_error(int is_io, unsigned int err_mask) +static int ata_eh_categorize_error(unsigned int eflags, unsigned int err_mask, + int *xfer_ok) { + int base = 0; + + if (!(eflags & ATA_EFLAG_DUBIOUS_XFER)) + *xfer_ok = 1; + + if (!*xfer_ok) + base = ATA_ECAT_DUBIOUS_NONE; + if (err_mask & AC_ERR_ATA_BUS) - return 1; + return base + ATA_ECAT_ATA_BUS; if (err_mask & AC_ERR_TIMEOUT) - return 2; + return base + ATA_ECAT_TOUT_HSM; - if (is_io) { + if (eflags & ATA_EFLAG_IS_IO) { if (err_mask & AC_ERR_HSM) - return 2; + return base + ATA_ECAT_TOUT_HSM; if ((err_mask & (AC_ERR_DEV|AC_ERR_MEDIA|AC_ERR_INVALID)) == AC_ERR_DEV) - return 3; + return base + ATA_ECAT_UNK_DEV; } return 0; @@ -1472,18 +1496,22 @@ static int ata_eh_categorize_error(int is_io, unsigned int err_mask) struct speed_down_verdict_arg { u64 since; - int nr_errors[4]; + int xfer_ok; + int nr_errors[ATA_ECAT_NR]; }; static int speed_down_verdict_cb(struct ata_ering_entry *ent, void *void_arg) { struct speed_down_verdict_arg *arg = void_arg; - int cat = ata_eh_categorize_error(ent->is_io, ent->err_mask); + int cat; if (ent->timestamp < arg->since) return -1; + cat = ata_eh_categorize_error(ent->eflags, ent->err_mask, + &arg->xfer_ok); arg->nr_errors[cat]++; + return 0; } @@ -1495,22 +1523,48 @@ static int speed_down_verdict_cb(struct ata_ering_entry *ent, void *void_arg) * whether NCQ needs to be turned off, transfer speed should be * stepped down, or falling back to PIO is necessary. * - * Cat-1 is ATA_BUS error for any command. + * ECAT_ATA_BUS : ATA_BUS error for any command + * + * ECAT_TOUT_HSM : TIMEOUT for any command or HSM violation for + * IO commands + * + * ECAT_UNK_DEV : Unknown DEV error for IO commands + * + * ECAT_DUBIOUS_* : Identical to above three but occurred while + * data transfer hasn't been verified. + * + * Verdicts are + * + * NCQ_OFF : Turn off NCQ. + * + * SPEED_DOWN : Speed down transfer speed but don't fall back + * to PIO. * - * Cat-2 is TIMEOUT for any command or HSM violation for known - * supported commands. + * FALLBACK_TO_PIO : Fall back to PIO. * - * Cat-3 is is unclassified DEV error for known supported - * command. + * Even if multiple verdicts are returned, only one action is + * taken per error. An action triggered by non-DUBIOUS errors + * clears ering, while one triggered by DUBIOUS_* errors doesn't. + * This is to expedite speed down decisions right after device is + * initially configured. * - * NCQ needs to be turned off if there have been more than 3 - * Cat-2 + Cat-3 errors during last 10 minutes. + * The followings are speed down rules. #1 and #2 deal with + * DUBIOUS errors. * - * Speed down is necessary if there have been more than 3 Cat-1 + - * Cat-2 errors or 10 Cat-3 errors during last 10 minutes. + * 1. If more than one DUBIOUS_ATA_BUS or DUBIOUS_TOUT_HSM errors + * occurred during last 5 mins, SPEED_DOWN and FALLBACK_TO_PIO. * - * Falling back to PIO mode is necessary if there have been more - * than 10 Cat-1 + Cat-2 + Cat-3 errors during last 5 minutes. + * 2. If more than one DUBIOUS_TOUT_HSM or DUBIOUS_UNK_DEV errors + * occurred during last 5 mins, NCQ_OFF. + * + * 3. If more than 8 ATA_BUS, TOUT_HSM or UNK_DEV errors + * ocurred during last 5 mins, FALLBACK_TO_PIO + * + * 4. If more than 3 TOUT_HSM or UNK_DEV errors occurred + * during last 10 mins, NCQ_OFF. + * + * 5. If more than 3 ATA_BUS or TOUT_HSM errors, or more than 6 + * UNK_DEV errors occurred during last 10 mins, SPEED_DOWN. * * LOCKING: * Inherited from caller. @@ -1525,23 +1579,38 @@ static unsigned int ata_eh_speed_down_verdict(struct ata_device *dev) struct speed_down_verdict_arg arg; unsigned int verdict = 0; - /* scan past 10 mins of error history */ + /* scan past 5 mins of error history */ memset(&arg, 0, sizeof(arg)); - arg.since = j64 - min(j64, j10mins); + arg.since = j64 - min(j64, j5mins); ata_ering_map(&dev->ering, speed_down_verdict_cb, &arg); - if (arg.nr_errors[2] + arg.nr_errors[3] > 3) - verdict |= ATA_EH_SPDN_NCQ_OFF; - if (arg.nr_errors[1] + arg.nr_errors[2] > 3 || arg.nr_errors[3] > 10) - verdict |= ATA_EH_SPDN_SPEED_DOWN; + if (arg.nr_errors[ATA_ECAT_DUBIOUS_ATA_BUS] + + arg.nr_errors[ATA_ECAT_DUBIOUS_TOUT_HSM] > 1) + verdict |= ATA_EH_SPDN_SPEED_DOWN | + ATA_EH_SPDN_FALLBACK_TO_PIO | ATA_EH_SPDN_KEEP_ERRORS; + + if (arg.nr_errors[ATA_ECAT_DUBIOUS_TOUT_HSM] + + arg.nr_errors[ATA_ECAT_DUBIOUS_UNK_DEV] > 1) + verdict |= ATA_EH_SPDN_NCQ_OFF | ATA_EH_SPDN_KEEP_ERRORS; + + if (arg.nr_errors[ATA_ECAT_ATA_BUS] + + arg.nr_errors[ATA_ECAT_TOUT_HSM] + + arg.nr_errors[ATA_ECAT_UNK_DEV] > 6) + verdict |= ATA_EH_SPDN_FALLBACK_TO_PIO; - /* scan past 3 mins of error history */ + /* scan past 10 mins of error history */ memset(&arg, 0, sizeof(arg)); - arg.since = j64 - min(j64, j5mins); + arg.since = j64 - min(j64, j10mins); ata_ering_map(&dev->ering, speed_down_verdict_cb, &arg); - if (arg.nr_errors[1] + arg.nr_errors[2] + arg.nr_errors[3] > 10) - verdict |= ATA_EH_SPDN_FALLBACK_TO_PIO; + if (arg.nr_errors[ATA_ECAT_TOUT_HSM] + + arg.nr_errors[ATA_ECAT_UNK_DEV] > 3) + verdict |= ATA_EH_SPDN_NCQ_OFF; + + if (arg.nr_errors[ATA_ECAT_ATA_BUS] + + arg.nr_errors[ATA_ECAT_TOUT_HSM] > 3 || + arg.nr_errors[ATA_ECAT_UNK_DEV] > 6) + verdict |= ATA_EH_SPDN_SPEED_DOWN; return verdict; } @@ -1549,7 +1618,7 @@ static unsigned int ata_eh_speed_down_verdict(struct ata_device *dev) /** * ata_eh_speed_down - record error and speed down if necessary * @dev: Failed device - * @is_io: Did the device fail during normal IO? + * @eflags: mask of ATA_EFLAG_* flags * @err_mask: err_mask of the error * * Record error and examine error history to determine whether @@ -1563,18 +1632,20 @@ static unsigned int ata_eh_speed_down_verdict(struct ata_device *dev) * RETURNS: * Determined recovery action. */ -static unsigned int ata_eh_speed_down(struct ata_device *dev, int is_io, - unsigned int err_mask) +static unsigned int ata_eh_speed_down(struct ata_device *dev, + unsigned int eflags, unsigned int err_mask) { + struct ata_link *link = dev->link; + int xfer_ok = 0; unsigned int verdict; unsigned int action = 0; /* don't bother if Cat-0 error */ - if (ata_eh_categorize_error(is_io, err_mask) == 0) + if (ata_eh_categorize_error(eflags, err_mask, &xfer_ok) == 0) return 0; /* record error and determine whether speed down is necessary */ - ata_ering_record(&dev->ering, is_io, err_mask); + ata_ering_record(&dev->ering, eflags, err_mask); verdict = ata_eh_speed_down_verdict(dev); /* turn off NCQ? */ @@ -1590,8 +1661,8 @@ static unsigned int ata_eh_speed_down(struct ata_device *dev, int is_io, /* speed down? */ if (verdict & ATA_EH_SPDN_SPEED_DOWN) { /* speed down SATA link speed if possible */ - if (sata_down_spd_limit(dev->link) == 0) { - action |= ATA_EH_HARDRESET; + if (sata_down_spd_limit(link) == 0) { + action |= ATA_EH_RESET; goto done; } @@ -1611,21 +1682,21 @@ static unsigned int ata_eh_speed_down(struct ata_device *dev, int is_io, dev->spdn_cnt++; if (ata_down_xfermask_limit(dev, sel) == 0) { - action |= ATA_EH_SOFTRESET; + action |= ATA_EH_RESET; goto done; } } } /* Fall back to PIO? Slowing down to PIO is meaningless for - * SATA. Consider it only for PATA. + * SATA ATA devices. Consider it only for PATA and SATAPI. */ if ((verdict & ATA_EH_SPDN_FALLBACK_TO_PIO) && (dev->spdn_cnt >= 2) && - (dev->link->ap->cbl != ATA_CBL_SATA) && + (link->ap->cbl != ATA_CBL_SATA || dev->class == ATA_DEV_ATAPI) && (dev->xfer_shift != ATA_SHIFT_PIO)) { if (ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO) == 0) { dev->spdn_cnt = 0; - action |= ATA_EH_SOFTRESET; + action |= ATA_EH_RESET; goto done; } } @@ -1633,7 +1704,8 @@ static unsigned int ata_eh_speed_down(struct ata_device *dev, int is_io, return 0; done: /* device has been slowed down, blow error history */ - ata_ering_clear(&dev->ering); + if (!(verdict & ATA_EH_SPDN_KEEP_ERRORS)) + ata_ering_clear(&dev->ering); return action; } @@ -1653,8 +1725,8 @@ static void ata_eh_link_autopsy(struct ata_link *link) struct ata_port *ap = link->ap; struct ata_eh_context *ehc = &link->eh_context; struct ata_device *dev; - unsigned int all_err_mask = 0; - int tag, is_io = 0; + unsigned int all_err_mask = 0, eflags = 0; + int tag; u32 serror; int rc; @@ -1669,9 +1741,9 @@ static void ata_eh_link_autopsy(struct ata_link *link) ehc->i.serror |= serror; ata_eh_analyze_serror(link); } else if (rc != -EOPNOTSUPP) { - /* SError read failed, force hardreset and probing */ - ata_ehi_schedule_probe(&ehc->i); - ehc->i.action |= ATA_EH_HARDRESET; + /* SError read failed, force reset and probing */ + ehc->i.probe_mask |= ATA_ALL_DEVICES; + ehc->i.action |= ATA_EH_RESET; ehc->i.err_mask |= AC_ERR_OTHER; } @@ -1709,19 +1781,24 @@ static void ata_eh_link_autopsy(struct ata_link *link) if (qc->flags & ATA_QCFLAG_SENSE_VALID) qc->err_mask &= ~(AC_ERR_DEV | AC_ERR_OTHER); + /* determine whether the command is worth retrying */ + if (!(qc->err_mask & AC_ERR_INVALID) && + ((qc->flags & ATA_QCFLAG_IO) || qc->err_mask != AC_ERR_DEV)) + qc->flags |= ATA_QCFLAG_RETRY; + /* accumulate error info */ ehc->i.dev = qc->dev; all_err_mask |= qc->err_mask; if (qc->flags & ATA_QCFLAG_IO) - is_io = 1; + eflags |= ATA_EFLAG_IS_IO; } /* enforce default EH actions */ if (ap->pflags & ATA_PFLAG_FROZEN || all_err_mask & (AC_ERR_HSM | AC_ERR_TIMEOUT)) - ehc->i.action |= ATA_EH_SOFTRESET; - else if ((is_io && all_err_mask) || - (!is_io && (all_err_mask & ~AC_ERR_DEV))) + ehc->i.action |= ATA_EH_RESET; + else if (((eflags & ATA_EFLAG_IS_IO) && all_err_mask) || + (!(eflags & ATA_EFLAG_IS_IO) && (all_err_mask & ~AC_ERR_DEV))) ehc->i.action |= ATA_EH_REVALIDATE; /* If we have offending qcs and the associated failed device, @@ -1733,14 +1810,21 @@ static void ata_eh_link_autopsy(struct ata_link *link) ehc->i.action &= ~ATA_EH_PERDEV_MASK; } - /* consider speeding down */ + /* propagate timeout to host link */ + if ((all_err_mask & AC_ERR_TIMEOUT) && !ata_is_host_link(link)) + ap->link.eh_context.i.err_mask |= AC_ERR_TIMEOUT; + + /* record error and consider speeding down */ dev = ehc->i.dev; - if (!dev && ata_link_max_devices(link) == 1 && - ata_dev_enabled(link->device)) - dev = link->device; + if (!dev && ((ata_link_max_devices(link) == 1 && + ata_dev_enabled(link->device)))) + dev = link->device; - if (dev) - ehc->i.action |= ata_eh_speed_down(dev, is_io, all_err_mask); + if (dev) { + if (dev->flags & ATA_DFLAG_DUBIOUS_XFER) + eflags |= ATA_EFLAG_DUBIOUS_XFER; + ehc->i.action |= ata_eh_speed_down(dev, eflags, all_err_mask); + } DPRINTK("EXIT\n"); } @@ -1759,8 +1843,14 @@ void ata_eh_autopsy(struct ata_port *ap) { struct ata_link *link; - __ata_port_for_each_link(link, ap) + ata_port_for_each_link(link, ap) ata_eh_link_autopsy(link); + + /* Autopsy of fanout ports can affect host link autopsy. + * Perform host link autopsy last. + */ + if (sata_pmp_attached(ap)) + ata_eh_link_autopsy(&ap->link); } /** @@ -1870,8 +1960,8 @@ static void ata_eh_link_report(struct ata_link *link) [ATA_PROT_PIO] = "pio", [ATA_PROT_DMA] = "dma", [ATA_PROT_NCQ] = "ncq", - [ATA_PROT_ATAPI] = "pio", - [ATA_PROT_ATAPI_DMA] = "dma", + [ATAPI_PROT_PIO] = "pio", + [ATAPI_PROT_DMA] = "dma", }; snprintf(data_buf, sizeof(data_buf), " %s %u %s", @@ -1879,7 +1969,7 @@ static void ata_eh_link_report(struct ata_link *link) dma_str[qc->dma_dir]); } - if (is_atapi_taskfile(&qc->tf)) + if (ata_is_atapi(qc->tf.protocol)) snprintf(cdb_buf, sizeof(cdb_buf), "cdb %02x %02x %02x %02x %02x %02x %02x %02x " "%02x %02x %02x %02x %02x %02x %02x %02x\n ", @@ -1952,47 +2042,27 @@ static int ata_do_reset(struct ata_link *link, ata_reset_fn_t reset, unsigned int *classes, unsigned long deadline) { struct ata_device *dev; - int rc; ata_link_for_each_dev(dev, link) classes[dev->devno] = ATA_DEV_UNKNOWN; - rc = reset(link, classes, deadline); - if (rc) - return rc; - - /* If any class isn't ATA_DEV_UNKNOWN, consider classification - * is complete and convert all ATA_DEV_UNKNOWN to - * ATA_DEV_NONE. - */ - ata_link_for_each_dev(dev, link) - if (classes[dev->devno] != ATA_DEV_UNKNOWN) - break; - - if (dev) { - ata_link_for_each_dev(dev, link) { - if (classes[dev->devno] == ATA_DEV_UNKNOWN) - classes[dev->devno] = ATA_DEV_NONE; - } - } - - return 0; + return reset(link, classes, deadline); } static int ata_eh_followup_srst_needed(struct ata_link *link, int rc, int classify, const unsigned int *classes) { - if (link->flags & ATA_LFLAG_NO_SRST) + if ((link->flags & ATA_LFLAG_NO_SRST) || ata_link_offline(link)) return 0; - if (rc == -EAGAIN) - return 1; + if (rc == -EAGAIN) { + if (classify) + return 1; + rc = 0; + } if (rc != 0) return 0; - if ((link->ap->flags & ATA_FLAG_PMP) && ata_is_host_link(link)) - return 1; - if (classify && !(link->flags & ATA_LFLAG_ASSUME_CLASS) && - classes[0] == ATA_DEV_UNKNOWN) + if (sata_pmp_supported(link->ap) && ata_is_host_link(link)) return 1; return 0; } @@ -2010,18 +2080,19 @@ int ata_eh_reset(struct ata_link *link, int classify, int try = 0; struct ata_device *dev; unsigned long deadline, now; - unsigned int tmp_action; ata_reset_fn_t reset; unsigned long flags; u32 sstatus; - int rc; + int nr_known, rc; - /* about to reset */ + /* + * Prepare to reset + */ spin_lock_irqsave(ap->lock, flags); ap->pflags |= ATA_PFLAG_RESETTING; spin_unlock_irqrestore(ap->lock, flags); - ata_eh_about_to_do(link, NULL, ehc->i.action & ATA_EH_RESET_MASK); + ata_eh_about_to_do(link, NULL, ATA_EH_RESET); ata_link_for_each_dev(dev, link) { /* If we issue an SRST then an ATA drive (not ATAPI) @@ -2042,17 +2113,16 @@ int ata_eh_reset(struct ata_link *link, int classify, ap->ops->set_piomode(ap, dev); } - /* Determine which reset to use and record in ehc->i.action. - * prereset() may examine and modify it. - */ - if (softreset && (!hardreset || (!(lflags & ATA_LFLAG_NO_SRST) && - !sata_set_spd_needed(link) && - !(ehc->i.action & ATA_EH_HARDRESET)))) - tmp_action = ATA_EH_SOFTRESET; - else - tmp_action = ATA_EH_HARDRESET; - - ehc->i.action = (ehc->i.action & ~ATA_EH_RESET_MASK) | tmp_action; + /* prefer hardreset */ + reset = NULL; + ehc->i.action &= ~ATA_EH_RESET; + if (hardreset) { + reset = hardreset; + ehc->i.action = ATA_EH_HARDRESET; + } else if (softreset) { + reset = softreset; + ehc->i.action = ATA_EH_SOFTRESET; + } if (prereset) { rc = prereset(link, jiffies + ATA_EH_PRERESET_TIMEOUT); @@ -2060,7 +2130,7 @@ int ata_eh_reset(struct ata_link *link, int classify, if (rc == -ENOENT) { ata_link_printk(link, KERN_DEBUG, "port disabled. ignoring.\n"); - ehc->i.action &= ~ATA_EH_RESET_MASK; + ehc->i.action &= ~ATA_EH_RESET; ata_link_for_each_dev(dev, link) classes[dev->devno] = ATA_DEV_NONE; @@ -2071,81 +2141,71 @@ int ata_eh_reset(struct ata_link *link, int classify, "prereset failed (errno=%d)\n", rc); goto out; } - } - /* prereset() might have modified ehc->i.action */ - if (ehc->i.action & ATA_EH_HARDRESET) - reset = hardreset; - else if (ehc->i.action & ATA_EH_SOFTRESET) - reset = softreset; - else { - /* prereset told us not to reset, bang classes and return */ - ata_link_for_each_dev(dev, link) - classes[dev->devno] = ATA_DEV_NONE; - rc = 0; - goto out; - } - - /* did prereset() screw up? if so, fix up to avoid oopsing */ - if (!reset) { - if (softreset) - reset = softreset; - else - reset = hardreset; + /* prereset() might have cleared ATA_EH_RESET. If so, + * bang classes and return. + */ + if (reset && !(ehc->i.action & ATA_EH_RESET)) { + ata_link_for_each_dev(dev, link) + classes[dev->devno] = ATA_DEV_NONE; + rc = 0; + goto out; + } } retry: - deadline = jiffies + ata_eh_reset_timeouts[try++]; - - /* shut up during boot probing */ - if (verbose) - ata_link_printk(link, KERN_INFO, "%s resetting link\n", - reset == softreset ? "soft" : "hard"); - - /* mark that this EH session started with reset */ - if (reset == hardreset) - ehc->i.flags |= ATA_EHI_DID_HARDRESET; - else - ehc->i.flags |= ATA_EHI_DID_SOFTRESET; + /* + * Perform reset + */ + if (ata_is_host_link(link)) + ata_eh_freeze_port(ap); - rc = ata_do_reset(link, reset, classes, deadline); + deadline = jiffies + ata_eh_reset_timeouts[try++]; - if (reset == hardreset && - ata_eh_followup_srst_needed(link, rc, classify, classes)) { - /* okay, let's do follow-up softreset */ - reset = softreset; + if (reset) { + if (verbose) + ata_link_printk(link, KERN_INFO, "%s resetting link\n", + reset == softreset ? "soft" : "hard"); - if (!reset) { - ata_link_printk(link, KERN_ERR, - "follow-up softreset required " - "but no softreset avaliable\n"); - rc = -EINVAL; - goto fail; - } + /* mark that this EH session started with reset */ + if (reset == hardreset) + ehc->i.flags |= ATA_EHI_DID_HARDRESET; + else + ehc->i.flags |= ATA_EHI_DID_SOFTRESET; - ata_eh_about_to_do(link, NULL, ATA_EH_RESET_MASK); rc = ata_do_reset(link, reset, classes, deadline); - } - /* -EAGAIN can happen if we skipped followup SRST */ - if (rc && rc != -EAGAIN) - goto fail; + if (reset == hardreset && + ata_eh_followup_srst_needed(link, rc, classify, classes)) { + /* okay, let's do follow-up softreset */ + reset = softreset; - /* was classification successful? */ - if (classify && classes[0] == ATA_DEV_UNKNOWN && - !(lflags & ATA_LFLAG_ASSUME_CLASS)) { - if (try < max_tries) { - ata_link_printk(link, KERN_WARNING, - "classification failed\n"); - rc = -EINVAL; - goto fail; + if (!reset) { + ata_link_printk(link, KERN_ERR, + "follow-up softreset required " + "but no softreset avaliable\n"); + rc = -EINVAL; + goto fail; + } + + ata_eh_about_to_do(link, NULL, ATA_EH_RESET); + rc = ata_do_reset(link, reset, classes, deadline); } - ata_link_printk(link, KERN_WARNING, - "classfication failed, assuming ATA\n"); - lflags |= ATA_LFLAG_ASSUME_ATA; + /* -EAGAIN can happen if we skipped followup SRST */ + if (rc && rc != -EAGAIN) + goto fail; + } else { + if (verbose) + ata_link_printk(link, KERN_INFO, "no reset method " + "available, skipping reset\n"); + if (!(lflags & ATA_LFLAG_ASSUME_CLASS)) + lflags |= ATA_LFLAG_ASSUME_ATA; } + /* + * Post-reset processing + */ ata_link_for_each_dev(dev, link) { /* After the reset, the device state is PIO 0 and the * controller state is undefined. Reset also wakes up @@ -2157,24 +2217,66 @@ int ata_eh_reset(struct ata_link *link, int classify, if (ata_link_offline(link)) continue; - /* apply class override and convert UNKNOWN to NONE */ + /* apply class override */ if (lflags & ATA_LFLAG_ASSUME_ATA) classes[dev->devno] = ATA_DEV_ATA; else if (lflags & ATA_LFLAG_ASSUME_SEMB) classes[dev->devno] = ATA_DEV_SEMB_UNSUP; /* not yet */ - else if (classes[dev->devno] == ATA_DEV_UNKNOWN) - classes[dev->devno] = ATA_DEV_NONE; } /* record current link speed */ if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0) link->sata_spd = (sstatus >> 4) & 0xf; + /* thaw the port */ + if (ata_is_host_link(link)) + ata_eh_thaw_port(ap); + + /* postreset() should clear hardware SError. Although SError + * is cleared during link resume, clearing SError here is + * necessary as some PHYs raise hotplug events after SRST. + * This introduces race condition where hotplug occurs between + * reset and here. This race is mediated by cross checking + * link onlineness and classification result later. + */ if (postreset) postreset(link, classes); + /* clear cached SError */ + spin_lock_irqsave(link->ap->lock, flags); + link->eh_info.serror = 0; + spin_unlock_irqrestore(link->ap->lock, flags); + + /* Make sure onlineness and classification result correspond. + * Hotplug could have happened during reset and some + * controllers fail to wait while a drive is spinning up after + * being hotplugged causing misdetection. By cross checking + * link onlineness and classification result, those conditions + * can be reliably detected and retried. + */ + nr_known = 0; + ata_link_for_each_dev(dev, link) { + /* convert all ATA_DEV_UNKNOWN to ATA_DEV_NONE */ + if (classes[dev->devno] == ATA_DEV_UNKNOWN) + classes[dev->devno] = ATA_DEV_NONE; + else + nr_known++; + } + + if (classify && !nr_known && ata_link_online(link)) { + if (try < max_tries) { + ata_link_printk(link, KERN_WARNING, "link online but " + "device misclassified, retrying\n"); + rc = -EAGAIN; + goto fail; + } + ata_link_printk(link, KERN_WARNING, + "link online but device misclassified, " + "device detection might fail\n"); + } + /* reset successful, schedule revalidation */ - ata_eh_done(link, NULL, ehc->i.action & ATA_EH_RESET_MASK); + ata_eh_done(link, NULL, ATA_EH_RESET); ehc->i.action |= ATA_EH_REVALIDATE; rc = 0; @@ -2189,6 +2291,11 @@ int ata_eh_reset(struct ata_link *link, int classify, return rc; fail: + /* if SCR isn't accessible on a fan-out port, PMP needs to be reset */ + if (!ata_is_host_link(link) && + sata_scr_read(link, SCR_STATUS, &sstatus)) + rc = -ERESTART; + if (rc == -ERESTART || try >= max_tries) goto out; @@ -2287,9 +2394,11 @@ static int ata_eh_revalidate_and_attach(struct ata_link *link, } /* PDIAG- should have been released, ask cable type if post-reset */ - if (ata_is_host_link(link) && ap->ops->cable_detect && - (ehc->i.flags & ATA_EHI_DID_RESET)) - ap->cbl = ap->ops->cable_detect(ap); + if ((ehc->i.flags & ATA_EHI_DID_RESET) && ata_is_host_link(link)) { + if (ap->ops->cable_detect) + ap->cbl = ap->ops->cable_detect(ap); + ata_force_cbl(ap); + } /* Configure new devices forward such that user doesn't see * device detection messages backwards. @@ -2321,6 +2430,58 @@ static int ata_eh_revalidate_and_attach(struct ata_link *link, return rc; } +/** + * ata_set_mode - Program timings and issue SET FEATURES - XFER + * @link: link on which timings will be programmed + * @r_failed_dev: out paramter for failed device + * + * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If + * ata_set_mode() fails, pointer to the failing device is + * returned in @r_failed_dev. + * + * LOCKING: + * PCI/etc. bus probe sem. + * + * RETURNS: + * 0 on success, negative errno otherwise + */ +int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) +{ + struct ata_port *ap = link->ap; + struct ata_device *dev; + int rc; + + /* if data transfer is verified, clear DUBIOUS_XFER on ering top */ + ata_link_for_each_dev(dev, link) { + if (!(dev->flags & ATA_DFLAG_DUBIOUS_XFER)) { + struct ata_ering_entry *ent; + + ent = ata_ering_top(&dev->ering); + if (ent) + ent->eflags &= ~ATA_EFLAG_DUBIOUS_XFER; + } + } + + /* has private set_mode? */ + if (ap->ops->set_mode) + rc = ap->ops->set_mode(link, r_failed_dev); + else + rc = ata_do_set_mode(link, r_failed_dev); + + /* if transfer mode has changed, set DUBIOUS_XFER on device */ + ata_link_for_each_dev(dev, link) { + struct ata_eh_context *ehc = &link->eh_context; + u8 saved_xfer_mode = ehc->saved_xfer_mode[dev->devno]; + u8 saved_ncq = !!(ehc->saved_ncq_enabled & (1 << dev->devno)); + + if (dev->xfer_mode != saved_xfer_mode || + ata_ncq_enabled(dev) != saved_ncq) + dev->flags |= ATA_DFLAG_DUBIOUS_XFER; + } + + return rc; +} + static int ata_link_nr_enabled(struct ata_link *link) { struct ata_device *dev; @@ -2345,6 +2506,7 @@ static int ata_link_nr_vacant(struct ata_link *link) static int ata_eh_skip_recovery(struct ata_link *link) { + struct ata_port *ap = link->ap; struct ata_eh_context *ehc = &link->eh_context; struct ata_device *dev; @@ -2352,9 +2514,13 @@ static int ata_eh_skip_recovery(struct ata_link *link) if (link->flags & ATA_LFLAG_DISABLED) return 1; - /* thaw frozen port, resume link and recover failed devices */ - if ((link->ap->pflags & ATA_PFLAG_FROZEN) || - (ehc->i.flags & ATA_EHI_RESUME_LINK) || ata_link_nr_enabled(link)) + /* thaw frozen port and recover failed devices */ + if ((ap->pflags & ATA_PFLAG_FROZEN) || ata_link_nr_enabled(link)) + return 0; + + /* reset at least once if reset is requested */ + if ((ehc->i.action & ATA_EH_RESET) && + !(ehc->i.flags & ATA_EHI_DID_RESET)) return 0; /* skip if class codes for all vacant slots are ATA_DEV_NONE */ @@ -2367,6 +2533,24 @@ static int ata_eh_skip_recovery(struct ata_link *link) return 1; } +static int ata_eh_schedule_probe(struct ata_device *dev) +{ + struct ata_eh_context *ehc = &dev->link->eh_context; + + if (!(ehc->i.probe_mask & (1 << dev->devno)) || + (ehc->did_probe_mask & (1 << dev->devno))) + return 0; + + ata_eh_detach_dev(dev); + ata_dev_init(dev); + ehc->did_probe_mask |= (1 << dev->devno); + ehc->i.action |= ATA_EH_RESET; + ehc->saved_xfer_mode[dev->devno] = 0; + ehc->saved_ncq_enabled &= ~(1 << dev->devno); + + return 1; +} + static int ata_eh_handle_dev_fail(struct ata_device *dev, int err) { struct ata_eh_context *ehc = &dev->link->eh_context; @@ -2398,25 +2582,13 @@ static int ata_eh_handle_dev_fail(struct ata_device *dev, int err) if (ata_link_offline(dev->link)) ata_eh_detach_dev(dev); - /* probe if requested */ - if ((ehc->i.probe_mask & (1 << dev->devno)) && - !(ehc->did_probe_mask & (1 << dev->devno))) { - ata_eh_detach_dev(dev); - ata_dev_init(dev); - + /* schedule probe if necessary */ + if (ata_eh_schedule_probe(dev)) ehc->tries[dev->devno] = ATA_EH_DEV_TRIES; - ehc->did_probe_mask |= (1 << dev->devno); - ehc->i.action |= ATA_EH_SOFTRESET; - } return 1; } else { - /* soft didn't work? be haaaaard */ - if (ehc->i.flags & ATA_EHI_DID_RESET) - ehc->i.action |= ATA_EH_HARDRESET; - else - ehc->i.action |= ATA_EH_SOFTRESET; - + ehc->i.action |= ATA_EH_RESET; return 0; } } @@ -2451,7 +2623,7 @@ int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset, struct ata_link *link; struct ata_device *dev; int nr_failed_devs, nr_disabled_devs; - int reset, rc; + int rc; unsigned long flags; DPRINTK("ENTER\n"); @@ -2484,14 +2656,9 @@ int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset, if (dev->flags & ATA_DFLAG_DETACH) ata_eh_detach_dev(dev); - if (!ata_dev_enabled(dev) && - ((ehc->i.probe_mask & (1 << dev->devno)) && - !(ehc->did_probe_mask & (1 << dev->devno)))) { - ata_eh_detach_dev(dev); - ata_dev_init(dev); - ehc->did_probe_mask |= (1 << dev->devno); - ehc->i.action |= ATA_EH_SOFTRESET; - } + /* schedule probe if necessary */ + if (!ata_dev_enabled(dev)) + ata_eh_schedule_probe(dev); } } @@ -2499,7 +2666,6 @@ int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset, rc = 0; nr_failed_devs = 0; nr_disabled_devs = 0; - reset = 0; /* if UNLOADING, finish immediately */ if (ap->pflags & ATA_PFLAG_UNLOADING) @@ -2513,40 +2679,24 @@ int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset, if (ata_eh_skip_recovery(link)) ehc->i.action = 0; - /* do we need to reset? */ - if (ehc->i.action & ATA_EH_RESET_MASK) - reset = 1; - ata_link_for_each_dev(dev, link) ehc->classes[dev->devno] = ATA_DEV_UNKNOWN; } /* reset */ - if (reset) { - /* if PMP is attached, this function only deals with - * downstream links, port should stay thawed. - */ - if (!ap->nr_pmp_links) - ata_eh_freeze_port(ap); - - ata_port_for_each_link(link, ap) { - struct ata_eh_context *ehc = &link->eh_context; + ata_port_for_each_link(link, ap) { + struct ata_eh_context *ehc = &link->eh_context; - if (!(ehc->i.action & ATA_EH_RESET_MASK)) - continue; + if (!(ehc->i.action & ATA_EH_RESET)) + continue; - rc = ata_eh_reset(link, ata_link_nr_vacant(link), - prereset, softreset, hardreset, - postreset); - if (rc) { - ata_link_printk(link, KERN_ERR, - "reset failed, giving up\n"); - goto out; - } + rc = ata_eh_reset(link, ata_link_nr_vacant(link), + prereset, softreset, hardreset, postreset); + if (rc) { + ata_link_printk(link, KERN_ERR, + "reset failed, giving up\n"); + goto out; } - - if (!ap->nr_pmp_links) - ata_eh_thaw_port(ap); } /* the rest */ @@ -2572,7 +2722,7 @@ int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset, ehc->i.flags &= ~ATA_EHI_SETMODE; } - if (ehc->i.action & ATA_EHI_LPM) + if (ehc->i.action & ATA_EH_LPM) ata_link_for_each_dev(dev, link) ata_dev_enable_pm(dev, ap->pm_policy); @@ -2589,7 +2739,7 @@ dev_fail: /* PMP reset requires working host port. * Can't retry if it's frozen. */ - if (ap->nr_pmp_links) + if (sata_pmp_attached(ap)) goto out; break; } @@ -2641,18 +2791,11 @@ void ata_eh_finish(struct ata_port *ap) /* FIXME: Once EH migration is complete, * generate sense data in this function, * considering both err_mask and tf. - * - * There's no point in retrying invalid - * (detected by libata) and non-IO device - * errors (rejected by device). Finish them - * immediately. */ - if ((qc->err_mask & AC_ERR_INVALID) || - (!(qc->flags & ATA_QCFLAG_IO) && - qc->err_mask == AC_ERR_DEV)) - ata_eh_qc_complete(qc); - else + if (qc->flags & ATA_QCFLAG_RETRY) ata_eh_qc_retry(qc); + else + ata_eh_qc_complete(qc); } else { if (qc->flags & ATA_QCFLAG_SENSE_VALID) { ata_eh_qc_complete(qc); @@ -2672,6 +2815,7 @@ void ata_eh_finish(struct ata_port *ap) /** * ata_do_eh - do standard error handling * @ap: host port to handle error for + * * @prereset: prereset method (can be NULL) * @softreset: softreset method (can be NULL) * @hardreset: hardreset method (can be NULL) @@ -2702,6 +2846,27 @@ void ata_do_eh(struct ata_port *ap, ata_prereset_fn_t prereset, ata_eh_finish(ap); } +/** + * ata_std_error_handler - standard error handler + * @ap: host port to handle error for + * + * Standard error handler + * + * LOCKING: + * Kernel thread context (may sleep). + */ +void ata_std_error_handler(struct ata_port *ap) +{ + struct ata_port_operations *ops = ap->ops; + ata_reset_fn_t hardreset = ops->hardreset; + + /* ignore built-in hardreset if SCR access is not available */ + if (ata_is_builtin_hardreset(hardreset) && !sata_scr_valid(&ap->link)) + hardreset = NULL; + + ata_do_eh(ap, ops->prereset, ops->softreset, hardreset, ops->postreset); +} + #ifdef CONFIG_PM /** * ata_eh_handle_port_suspend - perform port suspend operation @@ -2739,6 +2904,7 @@ static void ata_eh_handle_port_suspend(struct ata_port *ap) if (ap->ops->port_suspend) rc = ap->ops->port_suspend(ap, ap->pm_mesg); + ata_acpi_set_state(ap, PMSG_SUSPEND); out: /* report result */ spin_lock_irqsave(ap->lock, flags); @@ -2784,6 +2950,8 @@ static void ata_eh_handle_port_resume(struct ata_port *ap) WARN_ON(!(ap->pflags & ATA_PFLAG_SUSPENDED)); + ata_acpi_set_state(ap, PMSG_ON); + if (ap->ops->port_resume) rc = ap->ops->port_resume(ap); diff --git a/drivers/ata/libata-pmp.c b/drivers/ata/libata-pmp.c index c0c4dbc..7daf4c0 100644 --- a/drivers/ata/libata-pmp.c +++ b/drivers/ata/libata-pmp.c @@ -11,6 +11,14 @@ #include <linux/libata.h> #include "libata.h" +const struct ata_port_operations sata_pmp_port_ops = { + .inherits = &sata_port_ops, + .pmp_prereset = ata_std_prereset, + .pmp_hardreset = sata_std_hardreset, + .pmp_postreset = ata_std_postreset, + .error_handler = sata_pmp_error_handler, +}; + /** * sata_pmp_read - read PMP register * @link: link to read PMP register for @@ -35,12 +43,12 @@ static unsigned int sata_pmp_read(struct ata_link *link, int reg, u32 *r_val) ata_tf_init(pmp_dev, &tf); tf.command = ATA_CMD_PMP_READ; tf.protocol = ATA_PROT_NODATA; - tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; + tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_LBA48; tf.feature = reg; tf.device = link->pmp; err_mask = ata_exec_internal(pmp_dev, &tf, NULL, DMA_NONE, NULL, 0, - SATA_PMP_SCR_TIMEOUT); + SATA_PMP_RW_TIMEOUT); if (err_mask) return err_mask; @@ -71,7 +79,7 @@ static unsigned int sata_pmp_write(struct ata_link *link, int reg, u32 val) ata_tf_init(pmp_dev, &tf); tf.command = ATA_CMD_PMP_WRITE; tf.protocol = ATA_PROT_NODATA; - tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; + tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_LBA48; tf.feature = reg; tf.device = link->pmp; tf.nsect = val & 0xff; @@ -80,7 +88,7 @@ static unsigned int sata_pmp_write(struct ata_link *link, int reg, u32 val) tf.lbah = (val >> 24) & 0xff; return ata_exec_internal(pmp_dev, &tf, NULL, DMA_NONE, NULL, 0, - SATA_PMP_SCR_TIMEOUT); + SATA_PMP_RW_TIMEOUT); } /** @@ -176,140 +184,6 @@ int sata_pmp_scr_write(struct ata_link *link, int reg, u32 val) } /** - * sata_pmp_std_prereset - prepare PMP link for reset - * @link: link to be reset - * @deadline: deadline jiffies for the operation - * - * @link is about to be reset. Initialize it. - * - * LOCKING: - * Kernel thread context (may sleep) - * - * RETURNS: - * 0 on success, -errno otherwise. - */ -int sata_pmp_std_prereset(struct ata_link *link, unsigned long deadline) -{ - struct ata_eh_context *ehc = &link->eh_context; - const unsigned long *timing = sata_ehc_deb_timing(ehc); - int rc; - - /* force HRST? */ - if (link->flags & ATA_LFLAG_NO_SRST) - ehc->i.action |= ATA_EH_HARDRESET; - - /* handle link resume */ - if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && - (link->flags & ATA_LFLAG_HRST_TO_RESUME)) - ehc->i.action |= ATA_EH_HARDRESET; - - /* if we're about to do hardreset, nothing more to do */ - if (ehc->i.action & ATA_EH_HARDRESET) - return 0; - - /* resume link */ - rc = sata_link_resume(link, timing, deadline); - if (rc) { - /* phy resume failed */ - ata_link_printk(link, KERN_WARNING, "failed to resume link " - "for reset (errno=%d)\n", rc); - return rc; - } - - /* clear SError bits including .X which blocks the port when set */ - rc = sata_scr_write(link, SCR_ERROR, 0xffffffff); - if (rc) { - ata_link_printk(link, KERN_ERR, - "failed to clear SError (errno=%d)\n", rc); - return rc; - } - - return 0; -} - -/** - * sata_pmp_std_hardreset - standard hardreset method for PMP link - * @link: link to be reset - * @class: resulting class of attached device - * @deadline: deadline jiffies for the operation - * - * Hardreset PMP port @link. Note that this function doesn't - * wait for BSY clearance. There simply isn't a generic way to - * wait the event. Instead, this function return -EAGAIN thus - * telling libata-EH to followup with softreset. - * - * LOCKING: - * Kernel thread context (may sleep) - * - * RETURNS: - * 0 on success, -errno otherwise. - */ -int sata_pmp_std_hardreset(struct ata_link *link, unsigned int *class, - unsigned long deadline) -{ - const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context); - u32 tmp; - int rc; - - DPRINTK("ENTER\n"); - - /* do hardreset */ - rc = sata_link_hardreset(link, timing, deadline); - if (rc) { - ata_link_printk(link, KERN_ERR, - "COMRESET failed (errno=%d)\n", rc); - goto out; - } - - /* clear SError bits including .X which blocks the port when set */ - rc = sata_scr_write(link, SCR_ERROR, 0xffffffff); - if (rc) { - ata_link_printk(link, KERN_ERR, "failed to clear SError " - "during hardreset (errno=%d)\n", rc); - goto out; - } - - /* if device is present, follow up with srst to wait for !BSY */ - if (ata_link_online(link)) - rc = -EAGAIN; - out: - /* if SCR isn't accessible, we need to reset the PMP */ - if (rc && rc != -EAGAIN && sata_scr_read(link, SCR_STATUS, &tmp)) - rc = -ERESTART; - - DPRINTK("EXIT, rc=%d\n", rc); - return rc; -} - -/** - * ata_std_postreset - standard postreset method for PMP link - * @link: the target ata_link - * @classes: classes of attached devices - * - * This function is invoked after a successful reset. Note that - * the device might have been reset more than once using - * different reset methods before postreset is invoked. - * - * LOCKING: - * Kernel thread context (may sleep) - */ -void sata_pmp_std_postreset(struct ata_link *link, unsigned int *class) -{ - u32 serror; - - DPRINTK("ENTER\n"); - - /* clear SError */ - if (sata_scr_read(link, SCR_ERROR, &serror) == 0) - sata_scr_write(link, SCR_ERROR, serror); - - /* print link status */ - sata_print_link_status(link); - - DPRINTK("EXIT\n"); -} - -/** * sata_pmp_read_gscr - read GSCR block of SATA PMP * @dev: PMP device * @gscr: buffer to read GSCR block into @@ -383,19 +257,6 @@ static int sata_pmp_configure(struct ata_device *dev, int print_info) goto fail; } - /* turn off notification till fan-out ports are reset and configured */ - if (gscr[SATA_PMP_GSCR_FEAT_EN] & SATA_PMP_FEAT_NOTIFY) { - gscr[SATA_PMP_GSCR_FEAT_EN] &= ~SATA_PMP_FEAT_NOTIFY; - - err_mask = sata_pmp_write(dev->link, SATA_PMP_GSCR_FEAT_EN, - gscr[SATA_PMP_GSCR_FEAT_EN]); - if (err_mask) { - rc = -EIO; - reason = "failed to write GSCR_FEAT_EN"; - goto fail; - } - } - if (print_info) { ata_dev_printk(dev, KERN_INFO, "Port Multiplier %s, " "0x%04x:0x%04x r%d, %d ports, feat 0x%x/0x%x\n", @@ -444,9 +305,8 @@ static int sata_pmp_init_links(struct ata_port *ap, int nr_ports) struct ata_eh_context *ehc = &link->eh_context; link->flags = 0; - ehc->i.probe_mask |= 1; - ehc->i.action |= ATA_EH_SOFTRESET; - ehc->i.flags |= ATA_EHI_RESUME_LINK; + ehc->i.probe_mask |= ATA_ALL_DEVICES; + ehc->i.action |= ATA_EH_RESET; } return 0; @@ -462,12 +322,12 @@ static void sata_pmp_quirks(struct ata_port *ap) if (vendor == 0x1095 && devid == 0x3726) { /* sil3726 quirks */ ata_port_for_each_link(link, ap) { - /* SError.N need a kick in the ass to get working */ - link->flags |= ATA_LFLAG_HRST_TO_RESUME; - - /* class code report is unreliable */ + /* Class code report is unreliable and SRST + * times out under certain configurations. + */ if (link->pmp < 5) - link->flags |= ATA_LFLAG_ASSUME_ATA; + link->flags |= ATA_LFLAG_NO_SRST | + ATA_LFLAG_ASSUME_ATA; /* port 5 is for SEMB device and it doesn't like SRST */ if (link->pmp == 5) @@ -477,9 +337,6 @@ static void sata_pmp_quirks(struct ata_port *ap) } else if (vendor == 0x1095 && devid == 0x4723) { /* sil4723 quirks */ ata_port_for_each_link(link, ap) { - /* SError.N need a kick in the ass to get working */ - link->flags |= ATA_LFLAG_HRST_TO_RESUME; - /* class code report is unreliable */ if (link->pmp < 2) link->flags |= ATA_LFLAG_ASSUME_ATA; @@ -492,17 +349,12 @@ static void sata_pmp_quirks(struct ata_port *ap) } else if (vendor == 0x1095 && devid == 0x4726) { /* sil4726 quirks */ ata_port_for_each_link(link, ap) { - /* SError.N need a kick in the ass to get working */ - link->flags |= ATA_LFLAG_HRST_TO_RESUME; - - /* class code report is unreliable */ - if (link->pmp < 5) - link->flags |= ATA_LFLAG_ASSUME_ATA; - - /* The config device, which can be either at - * port 0 or 5, locks up on SRST. + /* Class code report is unreliable and SRST + * times out under certain configurations. + * Config device can be at port 0 or 5 and + * locks up on SRST. */ - if (link->pmp == 0 || link->pmp == 5) + if (link->pmp <= 5) link->flags |= ATA_LFLAG_NO_SRST | ATA_LFLAG_ASSUME_ATA; @@ -524,13 +376,6 @@ static void sata_pmp_quirks(struct ata_port *ap) * otherwise. Don't try hard to recover it. */ ap->pmp_link[ap->nr_pmp_links - 1].flags |= ATA_LFLAG_NO_RETRY; - } else if (vendor == 0x11ab && devid == 0x4140) { - /* Marvell 88SM4140 quirks. Fan-out ports require PHY - * reset to work; other than that, it behaves very - * nicely. - */ - ata_port_for_each_link(link, ap) - link->flags |= ATA_LFLAG_HRST_TO_RESUME; } } @@ -556,7 +401,7 @@ int sata_pmp_attach(struct ata_device *dev) int rc; /* is it hanging off the right place? */ - if (!(ap->flags & ATA_FLAG_PMP)) { + if (!sata_pmp_supported(ap)) { ata_dev_printk(dev, KERN_ERR, "host does not support Port Multiplier\n"); return -EINVAL; @@ -842,13 +687,10 @@ static int sata_pmp_eh_recover_pmp(struct ata_port *ap, retry: ehc->classes[0] = ATA_DEV_UNKNOWN; - if (ehc->i.action & ATA_EH_RESET_MASK) { + if (ehc->i.action & ATA_EH_RESET) { struct ata_link *tlink; - ata_eh_freeze_port(ap); - /* reset */ - ehc->i.action = ATA_EH_HARDRESET; rc = ata_eh_reset(link, 0, prereset, softreset, hardreset, postreset); if (rc) { @@ -857,11 +699,13 @@ static int sata_pmp_eh_recover_pmp(struct ata_port *ap, goto fail; } - ata_eh_thaw_port(ap); - /* PMP is reset, SErrors cannot be trusted, scan all */ - ata_port_for_each_link(tlink, ap) - ata_ehi_schedule_probe(&tlink->eh_context.i); + ata_port_for_each_link(tlink, ap) { + struct ata_eh_context *ehc = &tlink->eh_context; + + ehc->i.probe_mask |= ATA_ALL_DEVICES; + ehc->i.action |= ATA_EH_RESET; + } } /* If revalidation is requested, revalidate and reconfigure; @@ -876,7 +720,7 @@ static int sata_pmp_eh_recover_pmp(struct ata_port *ap, tries--; if (rc == -ENODEV) { - ehc->i.probe_mask |= 1; + ehc->i.probe_mask |= ATA_ALL_DEVICES; detach = 1; /* give it just two more chances */ tries = min(tries, 2); @@ -892,11 +736,11 @@ static int sata_pmp_eh_recover_pmp(struct ata_port *ap, reval_failed = 1; ata_dev_printk(dev, KERN_WARNING, - "retrying hardreset%s\n", + "retrying reset%s\n", sleep ? " in 5 secs" : ""); if (sleep) ssleep(5); - ehc->i.action |= ATA_EH_HARDRESET; + ehc->i.action |= ATA_EH_RESET; goto retry; } else { ata_dev_printk(dev, KERN_ERR, "failed to recover PMP " @@ -940,10 +784,8 @@ static int sata_pmp_eh_handle_disabled_links(struct ata_port *ap) /* Some PMPs require hardreset sequence to get * SError.N working. */ - if ((link->flags & ATA_LFLAG_HRST_TO_RESUME) && - (link->eh_context.i.flags & ATA_EHI_RESUME_LINK)) - sata_link_hardreset(link, sata_deb_timing_normal, - jiffies + ATA_TMOUT_INTERNAL_QUICK); + sata_link_hardreset(link, sata_deb_timing_normal, + jiffies + ATA_TMOUT_INTERNAL_QUICK, NULL, NULL); /* unconditionally clear SError.N */ rc = sata_scr_write(link, SCR_ERROR, SERR_PHYRDY_CHG); @@ -989,14 +831,6 @@ static int sata_pmp_handle_link_fail(struct ata_link *link, int *link_tries) /** * sata_pmp_eh_recover - recover PMP-enabled port * @ap: ATA port to recover - * @prereset: prereset method (can be NULL) - * @softreset: softreset method - * @hardreset: hardreset method - * @postreset: postreset method (can be NULL) - * @pmp_prereset: PMP prereset method (can be NULL) - * @pmp_softreset: PMP softreset method (can be NULL) - * @pmp_hardreset: PMP hardreset method (can be NULL) - * @pmp_postreset: PMP postreset method (can be NULL) * * Drive EH recovery operation for PMP enabled port @ap. This * function recovers host and PMP ports with proper retrials and @@ -1009,16 +843,14 @@ static int sata_pmp_handle_link_fail(struct ata_link *link, int *link_tries) * RETURNS: * 0 on success, -errno on failure. */ -static int sata_pmp_eh_recover(struct ata_port *ap, - ata_prereset_fn_t prereset, ata_reset_fn_t softreset, - ata_reset_fn_t hardreset, ata_postreset_fn_t postreset, - ata_prereset_fn_t pmp_prereset, ata_reset_fn_t pmp_softreset, - ata_reset_fn_t pmp_hardreset, ata_postreset_fn_t pmp_postreset) +static int sata_pmp_eh_recover(struct ata_port *ap) { + struct ata_port_operations *ops = ap->ops; int pmp_tries, link_tries[SATA_PMP_MAX_PORTS]; struct ata_link *pmp_link = &ap->link; struct ata_device *pmp_dev = pmp_link->device; struct ata_eh_context *pmp_ehc = &pmp_link->eh_context; + u32 *gscr = pmp_dev->gscr; struct ata_link *link; struct ata_device *dev; unsigned int err_mask; @@ -1031,9 +863,9 @@ static int sata_pmp_eh_recover(struct ata_port *ap, retry: /* PMP attached? */ - if (!ap->nr_pmp_links) { - rc = ata_eh_recover(ap, prereset, softreset, hardreset, - postreset, NULL); + if (!sata_pmp_attached(ap)) { + rc = ata_eh_recover(ap, ops->prereset, ops->softreset, + ops->hardreset, ops->postreset, NULL); if (rc) { ata_link_for_each_dev(dev, &ap->link) ata_dev_disable(dev); @@ -1051,19 +883,35 @@ static int sata_pmp_eh_recover(struct ata_port *ap, } /* recover pmp */ - rc = sata_pmp_eh_recover_pmp(ap, prereset, softreset, hardreset, - postreset); + rc = sata_pmp_eh_recover_pmp(ap, ops->prereset, ops->softreset, + ops->hardreset, ops->postreset); if (rc) goto pmp_fail; + /* PHY event notification can disturb reset and other recovery + * operations. Turn it off. + */ + if (gscr[SATA_PMP_GSCR_FEAT_EN] & SATA_PMP_FEAT_NOTIFY) { + gscr[SATA_PMP_GSCR_FEAT_EN] &= ~SATA_PMP_FEAT_NOTIFY; + + err_mask = sata_pmp_write(pmp_link, SATA_PMP_GSCR_FEAT_EN, + gscr[SATA_PMP_GSCR_FEAT_EN]); + if (err_mask) { + ata_link_printk(pmp_link, KERN_WARNING, + "failed to disable NOTIFY (err_mask=0x%x)\n", + err_mask); + goto pmp_fail; + } + } + /* handle disabled links */ rc = sata_pmp_eh_handle_disabled_links(ap); if (rc) goto pmp_fail; /* recover links */ - rc = ata_eh_recover(ap, pmp_prereset, pmp_softreset, pmp_hardreset, - pmp_postreset, &link); + rc = ata_eh_recover(ap, ops->pmp_prereset, ops->pmp_softreset, + ops->pmp_hardreset, ops->pmp_postreset, &link); if (rc) goto link_fail; @@ -1078,10 +926,10 @@ static int sata_pmp_eh_recover(struct ata_port *ap, /* enable notification */ if (pmp_dev->flags & ATA_DFLAG_AN) { - pmp_dev->gscr[SATA_PMP_GSCR_FEAT_EN] |= SATA_PMP_FEAT_NOTIFY; + gscr[SATA_PMP_GSCR_FEAT_EN] |= SATA_PMP_FEAT_NOTIFY; - err_mask = sata_pmp_write(pmp_dev->link, SATA_PMP_GSCR_FEAT_EN, - pmp_dev->gscr[SATA_PMP_GSCR_FEAT_EN]); + err_mask = sata_pmp_write(pmp_link, SATA_PMP_GSCR_FEAT_EN, + gscr[SATA_PMP_GSCR_FEAT_EN]); if (err_mask) { ata_dev_printk(pmp_dev, KERN_ERR, "failed to write " "PMP_FEAT_EN (Emask=0x%x)\n", err_mask); @@ -1126,7 +974,7 @@ static int sata_pmp_eh_recover(struct ata_port *ap, link_fail: if (sata_pmp_handle_link_fail(link, link_tries)) { - pmp_ehc->i.action |= ATA_EH_HARDRESET; + pmp_ehc->i.action |= ATA_EH_RESET; goto retry; } @@ -1138,13 +986,13 @@ static int sata_pmp_eh_recover(struct ata_port *ap, if (ap->pflags & ATA_PFLAG_UNLOADING) return rc; - if (!ap->nr_pmp_links) + if (!sata_pmp_attached(ap)) goto retry; if (--pmp_tries) { ata_port_printk(ap, KERN_WARNING, "failed to recover PMP, retrying in 5 secs\n"); - pmp_ehc->i.action |= ATA_EH_HARDRESET; + pmp_ehc->i.action |= ATA_EH_RESET; ssleep(5); goto retry; } @@ -1159,16 +1007,8 @@ static int sata_pmp_eh_recover(struct ata_port *ap, } /** - * sata_pmp_do_eh - do standard error handling for PMP-enabled host + * sata_pmp_error_handler - do standard error handling for PMP-enabled host * @ap: host port to handle error for - * @prereset: prereset method (can be NULL) - * @softreset: softreset method - * @hardreset: hardreset method - * @postreset: postreset method (can be NULL) - * @pmp_prereset: PMP prereset method (can be NULL) - * @pmp_softreset: PMP softreset method (can be NULL) - * @pmp_hardreset: PMP hardreset method (can be NULL) - * @pmp_postreset: PMP postreset method (can be NULL) * * Perform standard error handling sequence for PMP-enabled host * @ap. @@ -1176,16 +1016,14 @@ static int sata_pmp_eh_recover(struct ata_port *ap, * LOCKING: * Kernel thread context (may sleep). */ -void sata_pmp_do_eh(struct ata_port *ap, - ata_prereset_fn_t prereset, ata_reset_fn_t softreset, - ata_reset_fn_t hardreset, ata_postreset_fn_t postreset, - ata_prereset_fn_t pmp_prereset, ata_reset_fn_t pmp_softreset, - ata_reset_fn_t pmp_hardreset, ata_postreset_fn_t pmp_postreset) +void sata_pmp_error_handler(struct ata_port *ap) { ata_eh_autopsy(ap); ata_eh_report(ap); - sata_pmp_eh_recover(ap, prereset, softreset, hardreset, postreset, - pmp_prereset, pmp_softreset, pmp_hardreset, - pmp_postreset); + sata_pmp_eh_recover(ap); ata_eh_finish(ap); } + +EXPORT_SYMBOL_GPL(sata_pmp_port_ops); +EXPORT_SYMBOL_GPL(sata_pmp_qc_defer_cmd_switch); +EXPORT_SYMBOL_GPL(sata_pmp_error_handler); diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c index 68c9b63..ba90cf0 100644 --- a/drivers/ata/libata-scsi.c +++ b/drivers/ata/libata-scsi.c @@ -46,6 +46,8 @@ #include <linux/libata.h> #include <linux/hdreg.h> #include <linux/uaccess.h> +#include <linux/scatterlist.h> +#include <linux/highmem.h> #include "libata.h" @@ -132,7 +134,7 @@ static const char *ata_scsi_lpm_get(enum link_pm policy) } static ssize_t ata_scsi_lpm_put(struct class_device *class_dev, - const char *buf, size_t count) + const char *buf, size_t count) { struct Scsi_Host *shost = class_to_shost(class_dev); struct ata_port *ap = ata_shost_to_port(shost); @@ -175,9 +177,16 @@ ata_scsi_lpm_show(struct class_device *class_dev, char *buf) return snprintf(buf, 23, "%s\n", policy); } CLASS_DEVICE_ATTR(link_power_management_policy, S_IRUGO | S_IWUSR, - ata_scsi_lpm_show, ata_scsi_lpm_put); + ata_scsi_lpm_show, ata_scsi_lpm_put); EXPORT_SYMBOL_GPL(class_device_attr_link_power_management_policy); +static void ata_scsi_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq) +{ + cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION; + + scsi_build_sense_buffer(0, cmd->sense_buffer, sk, asc, ascq); +} + static void ata_scsi_invalid_field(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *)) { @@ -516,10 +525,10 @@ static struct ata_queued_cmd *ata_scsi_qc_new(struct ata_device *dev, if (qc) { qc->scsicmd = cmd; qc->scsidone = done; - + if (cmd->use_sg) { qc->__sg = scsi_sglist(cmd); - qc->n_elem = scsi_sg_count(cmd); + qc->n_elem = cmd->use_sg; } else if (cmd->request_bufflen) { qc->__sg = &qc->sgent; qc->n_elem = 1; @@ -844,15 +853,24 @@ static void ata_scsi_dev_config(struct scsi_device *sdev, if (dev->class == ATA_DEV_ATAPI) { struct request_queue *q = sdev->request_queue; blk_queue_max_hw_segments(q, q->max_hw_segments - 1); - } - if (dev->flags & ATA_DFLAG_AN) { + /* set the min alignment */ + blk_queue_update_dma_alignment(sdev->request_queue, + ATA_DMA_PAD_SZ - 1); + } else + /* ATA devices must be sector aligned */ + blk_queue_update_dma_alignment(sdev->request_queue, + ATA_SECT_SIZE - 1); + + if (dev->class == ATA_DEV_ATA) + sdev->manage_start_stop = 1; + + if (dev->flags & ATA_DFLAG_AN){ struct scsi_device_shadow *shdev = sdev_shadow(sdev); if (shdev) set_bit(SDEV_EVT_MEDIA_CHANGE, shdev->supported_events); } - if (dev->flags & ATA_DFLAG_NCQ) { int depth; @@ -881,12 +899,10 @@ int ata_scsi_slave_config(struct scsi_device *sdev) ata_scsi_sdev_config(sdev); - sdev->manage_start_stop = 1; - if (dev) ata_scsi_dev_config(sdev, dev); - return 0; /* scsi layer doesn't check return value, sigh */ + return 0; } /** @@ -1023,12 +1039,6 @@ static unsigned int ata_scsi_start_stop_xlat(struct ata_queued_cmd *qc) if (((cdb[4] >> 4) & 0xf) != 0) goto invalid_fld; /* power conditions not supported */ - if (qc->dev->horkage & ATA_HORKAGE_SKIP_PM) { - /* the device lacks PM support, finish without doing anything */ - scmd->result = SAM_STAT_GOOD; - return 1; - } - if (cdb[4] & 0x1) { tf->nsect = 1; /* 1 sector, lba=0 */ @@ -1605,9 +1615,10 @@ static unsigned int ata_scsi_rbuf_get(struct scsi_cmnd *cmd, u8 **buf_out) u8 *buf; unsigned int buflen; - struct scatterlist *sg = scsi_sglist(cmd); - - if (sg) { + if (cmd->use_sg) { + struct scatterlist *sg; + + sg = (struct scatterlist *) cmd->request_buffer; buf = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset; buflen = sg->length; } else { @@ -1632,9 +1643,12 @@ static unsigned int ata_scsi_rbuf_get(struct scsi_cmnd *cmd, u8 **buf_out) static inline void ata_scsi_rbuf_put(struct scsi_cmnd *cmd, u8 *buf) { - struct scatterlist *sg = scsi_sglist(cmd); - if (sg) + if (cmd->use_sg) { + struct scatterlist *sg; + + sg = (struct scatterlist *) cmd->request_buffer; kunmap_atomic(buf - sg->offset, KM_IRQ0); + } } /** @@ -2192,17 +2206,6 @@ saving_not_supp: return 1; } -/** - * ata_scsiop_read_cap - Simulate READ CAPACITY[ 16] commands - * @args: device IDENTIFY data / SCSI command of interest. - * @rbuf: Response buffer, to which simulated SCSI cmd output is sent. - * @buflen: Response buffer length. - * - * Simulate READ CAPACITY commands. - * - * LOCKING: - * None. - */ unsigned int ata_scsiop_read_cap(struct ata_scsi_args *args, u8 *rbuf, unsigned int buflen) { @@ -2246,16 +2249,15 @@ unsigned int ata_scsiop_read_cap(struct ata_scsi_args *args, u8 *rbuf, * ata_scsiop_report_luns - Simulate REPORT LUNS command * @args: device IDENTIFY data / SCSI command of interest. * @rbuf: Response buffer, to which simulated SCSI cmd output is sent. - * @buflen: Response buffer length. + * @buflen: Response buffer length. * * Simulate REPORT LUNS command. * * LOCKING: * spin_lock_irqsave(host lock) */ - unsigned int ata_scsiop_report_luns(struct ata_scsi_args *args, u8 *rbuf, - unsigned int buflen) + unsigned int buflen) { VPRINTK("ENTER\n"); rbuf[3] = 8; /* just one lun, LUN 0, size 8 bytes */ @@ -2263,57 +2265,6 @@ unsigned int ata_scsiop_report_luns(struct ata_scsi_args *args, u8 *rbuf, return 0; } -/** - * ata_scsi_set_sense - Set SCSI sense data and status - * @cmd: SCSI request to be handled - * @sk: SCSI-defined sense key - * @asc: SCSI-defined additional sense code - * @ascq: SCSI-defined additional sense code qualifier - * - * Helper function that builds a valid fixed format, current - * response code and the given sense key (sk), additional sense - * code (asc) and additional sense code qualifier (ascq) with - * a SCSI command status of %SAM_STAT_CHECK_CONDITION and - * DRIVER_SENSE set in the upper bits of scsi_cmnd::result . - * - * LOCKING: - * Not required - */ - -void ata_scsi_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq) -{ - cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION; - - cmd->sense_buffer[0] = 0x70; /* fixed format, current */ - cmd->sense_buffer[2] = sk; - cmd->sense_buffer[7] = 18 - 8; /* additional sense length */ - cmd->sense_buffer[12] = asc; - cmd->sense_buffer[13] = ascq; -} - -/** - * ata_scsi_badcmd - End a SCSI request with an error - * @cmd: SCSI request to be handled - * @done: SCSI command completion function - * @asc: SCSI-defined additional sense code - * @ascq: SCSI-defined additional sense code qualifier - * - * Helper function that completes a SCSI command with - * %SAM_STAT_CHECK_CONDITION, with a sense key %ILLEGAL_REQUEST - * and the specified additional sense codes. - * - * LOCKING: - * spin_lock_irqsave(host lock) - */ - -void ata_scsi_badcmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *), u8 asc, u8 ascq) -{ - DPRINTK("ENTER\n"); - ata_scsi_set_sense(cmd, ILLEGAL_REQUEST, asc, ascq); - - done(cmd); -} - static void atapi_sense_complete(struct ata_queued_cmd *qc) { if (qc->err_mask && ((qc->err_mask & AC_ERR_DEV) == 0)) { @@ -2343,9 +2294,12 @@ static void atapi_request_sense(struct ata_queued_cmd *qc) DPRINTK("ATAPI request sense\n"); /* FIXME: is this needed? */ - memset(cmd->sense_buffer, 0, sizeof(cmd->sense_buffer)); + memset(cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); - ap->ops->tf_read(ap, &qc->tf); +#ifdef CONFIG_ATA_SFF + if (ap->ops->sff_tf_read) + ap->ops->sff_tf_read(ap, &qc->tf); +#endif /* fill these in, for the case where they are -not- overwritten */ cmd->sense_buffer[0] = 0x70; @@ -2364,10 +2318,10 @@ static void atapi_request_sense(struct ata_queued_cmd *qc) qc->tf.command = ATA_CMD_PACKET; if (ata_pio_use_silly(ap)) { - qc->tf.protocol = ATA_PROT_ATAPI_DMA; + qc->tf.protocol = ATAPI_PROT_DMA; qc->tf.feature |= ATAPI_PKT_DMA; } else { - qc->tf.protocol = ATA_PROT_ATAPI; + qc->tf.protocol = ATAPI_PROT_PIO; qc->tf.lbam = SCSI_SENSE_BUFFERSIZE; qc->tf.lbah = 0; } @@ -2437,6 +2391,9 @@ static void atapi_qc_complete(struct ata_queued_cmd *qc) if ((scsicmd[0] == INQUIRY) && ((scsicmd[1] & 0x03) == 0)) { u8 *buf = NULL; unsigned int buflen; + unsigned long flags; + + local_irq_save(flags); buflen = ata_scsi_rbuf_get(cmd, &buf); @@ -2454,6 +2411,8 @@ static void atapi_qc_complete(struct ata_queued_cmd *qc) } ata_scsi_rbuf_put(cmd, buf); + + local_irq_restore(flags); } cmd->result = SAM_STAT_GOOD; @@ -2538,15 +2497,16 @@ static unsigned int atapi_xlat(struct ata_queued_cmd *qc) if (using_pio || nodata) { /* no data, or PIO data xfer */ if (nodata) - qc->tf.protocol = ATA_PROT_ATAPI_NODATA; + qc->tf.protocol = ATAPI_PROT_NODATA; else - qc->tf.protocol = ATA_PROT_ATAPI; + qc->tf.protocol = ATAPI_PROT_PIO; } else { /* DMA data xfer */ - qc->tf.protocol = ATA_PROT_ATAPI_DMA; + qc->tf.protocol = ATAPI_PROT_DMA; qc->tf.feature |= ATAPI_PKT_DMA; - if (atapi_dmadir && (scmd->sc_data_direction != DMA_TO_DEVICE)) + if ((dev->flags & ATA_DFLAG_DMADIR) && + (scmd->sc_data_direction != DMA_TO_DEVICE)) /* some SATA bridges need us to indicate data xfer direction */ qc->tf.feature |= ATAPI_DMADIR; } @@ -2559,7 +2519,7 @@ static unsigned int atapi_xlat(struct ata_queued_cmd *qc) static struct ata_device *ata_find_dev(struct ata_port *ap, int devno) { - if (ap->nr_pmp_links == 0) { + if (!sata_pmp_attached(ap)) { if (likely(devno < ata_link_max_devices(&ap->link))) return &ap->link.device[devno]; } else { @@ -2576,7 +2536,7 @@ static struct ata_device *__ata_scsi_find_dev(struct ata_port *ap, int devno; /* skip commands not addressed to targets we simulate */ - if (ap->nr_pmp_links == 0) { + if (!sata_pmp_attached(ap)) { if (unlikely(scsidev->channel || scsidev->lun)) return NULL; devno = scsidev->id; @@ -2702,6 +2662,24 @@ static unsigned int ata_scsi_pass_thru(struct ata_queued_cmd *qc) if ((tf->protocol = ata_scsi_map_proto(cdb[1])) == ATA_PROT_UNKNOWN) goto invalid_fld; + /* + * Filter TPM commands by default. These provide an + * essentially uncontrolled encrypted "back door" between + * applications and the disk. Set libata.allow_tpm=1 if you + * have a real reason for wanting to use them. This ensures + * that installed software cannot easily mess stuff up without + * user intent. DVR type users will probably ship with this enabled + * for movie content management. + * + * Note that for ATA8 we can issue a DCS change and DCS freeze lock + * for this and should do in future but that it is not sufficient as + * DCS is an optional feature set. Thus we also do the software filter + * so that we comply with the TC consortium stated goal that the user + * can turn off TC features of their system. + */ + if (tf->command >= 0x5C && tf->command <= 0x5F && !libata_allow_tpm) + goto invalid_fld; + /* We may not issue DMA commands if no DMA mode is set */ if (tf->protocol == ATA_PROT_DMA && dev->dma_mode == 0) goto invalid_fld; @@ -3349,7 +3327,7 @@ void ata_scsi_media_change_notify(struct ata_device *dev) /** * ata_scsi_hotplug - SCSI part of hotplug - * @work: Pointer to ATA port to perform SCSI hotplug on + * @data: Pointer to ATA port to perform SCSI hotplug on * * Perform SCSI part of hotplug. It's executed from a separate * workqueue after EH completes. This is necessary because SCSI @@ -3359,9 +3337,9 @@ void ata_scsi_media_change_notify(struct ata_device *dev) * LOCKING: * Kernel thread context (may sleep). */ -void ata_scsi_hotplug(void *_data) +void ata_scsi_hotplug(void *data) { - struct ata_port *ap = _data; + struct ata_port *ap = data; int i; if (ap->pflags & ATA_PFLAG_UNLOADING) { @@ -3415,7 +3393,7 @@ static int ata_scsi_user_scan(struct Scsi_Host *shost, unsigned int channel, if (lun != SCAN_WILD_CARD && lun) return -EINVAL; - if (ap->nr_pmp_links == 0) { + if (!sata_pmp_attached(ap)) { if (channel != SCAN_WILD_CARD && channel) return -EINVAL; devno = id; @@ -3432,8 +3410,8 @@ static int ata_scsi_user_scan(struct Scsi_Host *shost, unsigned int channel, ata_port_for_each_link(link, ap) { struct ata_eh_info *ehi = &link->eh_info; - ehi->probe_mask |= (1 << ata_link_max_devices(link)) - 1; - ehi->action |= ATA_EH_SOFTRESET; + ehi->probe_mask |= ATA_ALL_DEVICES; + ehi->action |= ATA_EH_RESET; } } else { struct ata_device *dev = ata_find_dev(ap, devno); @@ -3441,8 +3419,7 @@ static int ata_scsi_user_scan(struct Scsi_Host *shost, unsigned int channel, if (dev) { struct ata_eh_info *ehi = &dev->link->eh_info; ehi->probe_mask |= 1 << dev->devno; - ehi->action |= ATA_EH_SOFTRESET; - ehi->flags |= ATA_EHI_RESUME_LINK; + ehi->action |= ATA_EH_RESET; } else rc = -EINVAL; } @@ -3459,7 +3436,7 @@ static int ata_scsi_user_scan(struct Scsi_Host *shost, unsigned int channel, /** * ata_scsi_dev_rescan - initiate scsi_rescan_device() - * @work: Pointer to ATA port to perform scsi_rescan_device() + * @data: Pointer to ATA port to perform scsi_rescan_device() * * After ATA pass thru (SAT) commands are executed successfully, * libata need to propagate the changes to SCSI layer. This @@ -3469,9 +3446,9 @@ static int ata_scsi_user_scan(struct Scsi_Host *shost, unsigned int channel, * LOCKING: * Kernel thread context (may sleep). */ -void ata_scsi_dev_rescan(void *_data) +void ata_scsi_dev_rescan(void *data) { - struct ata_port *ap = _data; + struct ata_port *ap = data; struct ata_link *link; struct ata_device *dev; unsigned long flags; @@ -3555,7 +3532,7 @@ EXPORT_SYMBOL_GPL(ata_sas_port_start); * ata_port_stop - Undo ata_sas_port_start() * @ap: Port to shut down * - * Frees the DMA pad. + * Frees the DMA pad. * * May be used as the port_stop() entry in ata_port_operations. * diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c index 2762ec1..b532257 100644 --- a/drivers/ata/libata-sff.c +++ b/drivers/ata/libata-sff.c @@ -35,11 +35,468 @@ #include <linux/kernel.h> #include <linux/pci.h> #include <linux/libata.h> +#include <linux/highmem.h> #include "libata.h" +const struct ata_port_operations ata_sff_port_ops = { + .inherits = &ata_base_port_ops, + + .qc_prep = ata_sff_qc_prep, + .qc_issue = ata_sff_qc_issue, + .qc_fill_rtf = ata_sff_qc_fill_rtf, + + .freeze = ata_sff_freeze, + .thaw = ata_sff_thaw, + .prereset = ata_sff_prereset, + .softreset = ata_sff_softreset, + .hardreset = sata_sff_hardreset, + .postreset = ata_sff_postreset, + .error_handler = ata_sff_error_handler, + .post_internal_cmd = ata_sff_post_internal_cmd, + + .sff_dev_select = ata_sff_dev_select, + .sff_check_status = ata_sff_check_status, + .sff_tf_load = ata_sff_tf_load, + .sff_tf_read = ata_sff_tf_read, + .sff_exec_command = ata_sff_exec_command, + .sff_data_xfer = ata_sff_data_xfer, + .sff_irq_on = ata_sff_irq_on, + .sff_irq_clear = ata_sff_irq_clear, + + .port_start = ata_sff_port_start, +}; + +const struct ata_port_operations ata_bmdma_port_ops = { + .inherits = &ata_sff_port_ops, + + .mode_filter = ata_bmdma_mode_filter, + + .bmdma_setup = ata_bmdma_setup, + .bmdma_start = ata_bmdma_start, + .bmdma_stop = ata_bmdma_stop, + .bmdma_status = ata_bmdma_status, +}; + +/** + * ata_fill_sg - Fill PCI IDE PRD table + * @qc: Metadata associated with taskfile to be transferred + * + * Fill PCI IDE PRD (scatter-gather) table with segments + * associated with the current disk command. + * + * LOCKING: + * spin_lock_irqsave(host lock) + * + */ +static void ata_fill_sg(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + struct scatterlist *sg; + unsigned int idx; + + WARN_ON(qc->__sg == NULL); + WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); + + idx = 0; + ata_for_each_sg(sg, qc) { + u32 addr, offset; + u32 sg_len, len; + + /* determine if physical DMA addr spans 64K boundary. + * Note h/w doesn't support 64-bit, so we unconditionally + * truncate dma_addr_t to u32. + */ + addr = (u32) sg_dma_address(sg); + sg_len = sg_dma_len(sg); + + while (sg_len) { + offset = addr & 0xffff; + len = sg_len; + if ((offset + sg_len) > 0x10000) + len = 0x10000 - offset; + + ap->prd[idx].addr = cpu_to_le32(addr); + ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); + VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); + + idx++; + sg_len -= len; + addr += len; + } + } + + if (idx) + ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); +} + +/** + * ata_fill_sg_dumb - Fill PCI IDE PRD table + * @qc: Metadata associated with taskfile to be transferred + * + * Fill PCI IDE PRD (scatter-gather) table with segments + * associated with the current disk command. Perform the fill + * so that we avoid writing any length 64K records for + * controllers that don't follow the spec. + * + * LOCKING: + * spin_lock_irqsave(host lock) + * + */ +static void ata_fill_sg_dumb(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + struct scatterlist *sg; + unsigned int idx; + + WARN_ON(qc->__sg == NULL); + WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); + + idx = 0; + ata_for_each_sg(sg, qc) { + u32 addr, offset; + u32 sg_len, len, blen; + + /* determine if physical DMA addr spans 64K boundary. + * Note h/w doesn't support 64-bit, so we unconditionally + * truncate dma_addr_t to u32. + */ + addr = (u32) sg_dma_address(sg); + sg_len = sg_dma_len(sg); + + while (sg_len) { + offset = addr & 0xffff; + len = sg_len; + if ((offset + sg_len) > 0x10000) + len = 0x10000 - offset; + + blen = len & 0xffff; + ap->prd[idx].addr = cpu_to_le32(addr); + if (blen == 0) { + /* Some PATA chipsets like the CS5530 can't + cope with 0x0000 meaning 64K as the spec says */ + ap->prd[idx].flags_len = cpu_to_le32(0x8000); + blen = 0x8000; + ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000); + } + ap->prd[idx].flags_len = cpu_to_le32(blen); + VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); + + idx++; + sg_len -= len; + addr += len; + } + } + + if (idx) + ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); +} + +/** + * ata_sff_qc_prep - Prepare taskfile for submission + * @qc: Metadata associated with taskfile to be prepared + * + * Prepare ATA taskfile for submission. + * + * LOCKING: + * spin_lock_irqsave(host lock) + */ +void ata_sff_qc_prep(struct ata_queued_cmd *qc) +{ + if (!(qc->flags & ATA_QCFLAG_DMAMAP)) + return; + + ata_fill_sg(qc); +} + +/** + * ata_sff_dumb_qc_prep - Prepare taskfile for submission + * @qc: Metadata associated with taskfile to be prepared + * + * Prepare ATA taskfile for submission. + * + * LOCKING: + * spin_lock_irqsave(host lock) + */ +void ata_sff_dumb_qc_prep(struct ata_queued_cmd *qc) +{ + if (!(qc->flags & ATA_QCFLAG_DMAMAP)) + return; + + ata_fill_sg_dumb(qc); +} + +/** + * ata_sff_check_status - Read device status reg & clear interrupt + * @ap: port where the device is + * + * Reads ATA taskfile status register for currently-selected device + * and return its value. This also clears pending interrupts + * from this device + * + * LOCKING: + * Inherited from caller. + */ +u8 ata_sff_check_status(struct ata_port *ap) +{ + return ioread8(ap->ioaddr.status_addr); +} + +/** + * ata_sff_altstatus - Read device alternate status reg + * @ap: port where the device is + * + * Reads ATA taskfile alternate status register for + * currently-selected device and return its value. + * + * Note: may NOT be used as the check_altstatus() entry in + * ata_port_operations. + * + * LOCKING: + * Inherited from caller. + */ +static u8 ata_sff_altstatus(struct ata_port *ap) +{ + if (ap->ops->sff_check_altstatus) + return ap->ops->sff_check_altstatus(ap); + + return ioread8(ap->ioaddr.altstatus_addr); +} + +/** + * ata_sff_irq_status - Check if the device is busy + * @ap: port where the device is + * + * Determine if the port is currently busy. Uses altstatus + * if available in order to avoid clearing shared IRQ status + * when finding an IRQ source. Non ctl capable devices don't + * share interrupt lines fortunately for us. + * + * LOCKING: + * Inherited from caller. + */ +static u8 ata_sff_irq_status(struct ata_port *ap) +{ + u8 status; + + if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) { + status = ata_sff_altstatus(ap); + /* Not us: We are busy */ + if (status & ATA_BUSY) + return status; + } + /* Clear INTRQ latch */ + status = ap->ops->sff_check_status(ap); + return status; +} + +/** + * ata_sff_sync - Flush writes + * @ap: Port to wait for. + * + * CAUTION: + * If we have an mmio device with no ctl and no altstatus + * method this will fail. No such devices are known to exist. + * + * LOCKING: + * Inherited from caller. + */ + +static void ata_sff_sync(struct ata_port *ap) +{ + if (ap->ops->sff_check_altstatus) + ap->ops->sff_check_altstatus(ap); + else if (ap->ioaddr.altstatus_addr) + ioread8(ap->ioaddr.altstatus_addr); +} + +/** + * ata_sff_pause - Flush writes and wait 400nS + * @ap: Port to pause for. + * + * CAUTION: + * If we have an mmio device with no ctl and no altstatus + * method this will fail. No such devices are known to exist. + * + * LOCKING: + * Inherited from caller. + */ + +void ata_sff_pause(struct ata_port *ap) +{ + ata_sff_sync(ap); + ndelay(400); +} + +/** + * ata_sff_dma_pause - Pause before commencing DMA + * @ap: Port to pause for. + * + * Perform I/O fencing and ensure sufficient cycle delays occur + * for the HDMA1:0 transition + */ + +void ata_sff_dma_pause(struct ata_port *ap) +{ + if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) { + /* An altstatus read will cause the needed delay without + messing up the IRQ status */ + ata_sff_altstatus(ap); + return; + } + /* There are no DMA controllers without ctl. BUG here to ensure + we never violate the HDMA1:0 transition timing and risk + corruption. */ + BUG(); +} + /** - * ata_irq_on - Enable interrupts on a port. + * ata_sff_busy_sleep - sleep until BSY clears, or timeout + * @ap: port containing status register to be polled + * @tmout_pat: impatience timeout + * @tmout: overall timeout + * + * Sleep until ATA Status register bit BSY clears, + * or a timeout occurs. + * + * LOCKING: + * Kernel thread context (may sleep). + * + * RETURNS: + * 0 on success, -errno otherwise. + */ +int ata_sff_busy_sleep(struct ata_port *ap, + unsigned long tmout_pat, unsigned long tmout) +{ + unsigned long timer_start, timeout; + u8 status; + + status = ata_sff_busy_wait(ap, ATA_BUSY, 300); + timer_start = jiffies; + timeout = timer_start + tmout_pat; + while (status != 0xff && (status & ATA_BUSY) && + time_before(jiffies, timeout)) { + msleep(50); + status = ata_sff_busy_wait(ap, ATA_BUSY, 3); + } + + if (status != 0xff && (status & ATA_BUSY)) + ata_port_printk(ap, KERN_WARNING, + "port is slow to respond, please be patient " + "(Status 0x%x)\n", status); + + timeout = timer_start + tmout; + while (status != 0xff && (status & ATA_BUSY) && + time_before(jiffies, timeout)) { + msleep(50); + status = ap->ops->sff_check_status(ap); + } + + if (status == 0xff) + return -ENODEV; + + if (status & ATA_BUSY) { + ata_port_printk(ap, KERN_ERR, "port failed to respond " + "(%lu secs, Status 0x%x)\n", + tmout / HZ, status); + return -EBUSY; + } + + return 0; +} + +static int ata_sff_check_ready(struct ata_link *link) +{ + u8 status = link->ap->ops->sff_check_status(link->ap); + + return ata_check_ready(status); +} + +/** + * ata_sff_wait_ready - sleep until BSY clears, or timeout + * @link: SFF link to wait ready status for + * @deadline: deadline jiffies for the operation + * + * Sleep until ATA Status register bit BSY clears, or timeout + * occurs. + * + * LOCKING: + * Kernel thread context (may sleep). + * + * RETURNS: + * 0 on success, -errno otherwise. + */ +int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline) +{ + return ata_wait_ready(link, deadline, ata_sff_check_ready); +} + +/** + * ata_sff_dev_select - Select device 0/1 on ATA bus + * @ap: ATA channel to manipulate + * @device: ATA device (numbered from zero) to select + * + * Use the method defined in the ATA specification to + * make either device 0, or device 1, active on the + * ATA channel. Works with both PIO and MMIO. + * + * May be used as the dev_select() entry in ata_port_operations. + * + * LOCKING: + * caller. + */ +void ata_sff_dev_select(struct ata_port *ap, unsigned int device) +{ + u8 tmp; + + if (device == 0) + tmp = ATA_DEVICE_OBS; + else + tmp = ATA_DEVICE_OBS | ATA_DEV1; + + iowrite8(tmp, ap->ioaddr.device_addr); + ata_sff_pause(ap); /* needed; also flushes, for mmio */ +} + +/** + * ata_dev_select - Select device 0/1 on ATA bus + * @ap: ATA channel to manipulate + * @device: ATA device (numbered from zero) to select + * @wait: non-zero to wait for Status register BSY bit to clear + * @can_sleep: non-zero if context allows sleeping + * + * Use the method defined in the ATA specification to + * make either device 0, or device 1, active on the + * ATA channel. + * + * This is a high-level version of ata_sff_dev_select(), which + * additionally provides the services of inserting the proper + * pauses and status polling, where needed. + * + * LOCKING: + * caller. + */ +void ata_dev_select(struct ata_port *ap, unsigned int device, + unsigned int wait, unsigned int can_sleep) +{ + if (ata_msg_probe(ap)) + ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, " + "device %u, wait %u\n", device, wait); + + if (wait) + ata_wait_idle(ap); + + ap->ops->sff_dev_select(ap, device); + + if (wait) { + if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI) + msleep(150); + ata_wait_idle(ap); + } +} + +/** + * ata_sff_irq_on - Enable interrupts on a port. * @ap: Port on which interrupts are enabled. * * Enable interrupts on a legacy IDE device using MMIO or PIO, @@ -48,7 +505,7 @@ * LOCKING: * Inherited from caller. */ -u8 ata_irq_on(struct ata_port *ap) +u8 ata_sff_irq_on(struct ata_port *ap) { struct ata_ioports *ioaddr = &ap->ioaddr; u8 tmp; @@ -56,16 +513,38 @@ u8 ata_irq_on(struct ata_port *ap) ap->ctl &= ~ATA_NIEN; ap->last_ctl = ap->ctl; - iowrite8(ap->ctl, ioaddr->ctl_addr); + if (ioaddr->ctl_addr) + iowrite8(ap->ctl, ioaddr->ctl_addr); tmp = ata_wait_idle(ap); - ap->ops->irq_clear(ap); + ap->ops->sff_irq_clear(ap); return tmp; } /** - * ata_tf_load - send taskfile registers to host controller + * ata_sff_irq_clear - Clear PCI IDE BMDMA interrupt. + * @ap: Port associated with this ATA transaction. + * + * Clear interrupt and error flags in DMA status register. + * + * May be used as the irq_clear() entry in ata_port_operations. + * + * LOCKING: + * spin_lock_irqsave(host lock) + */ +void ata_sff_irq_clear(struct ata_port *ap) +{ + void __iomem *mmio = ap->ioaddr.bmdma_addr; + + if (!mmio) + return; + + iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS); +} + +/** + * ata_sff_tf_load - send taskfile registers to host controller * @ap: Port to which output is sent * @tf: ATA taskfile register set * @@ -74,19 +553,20 @@ u8 ata_irq_on(struct ata_port *ap) * LOCKING: * Inherited from caller. */ - -void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) +void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) { struct ata_ioports *ioaddr = &ap->ioaddr; unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR; if (tf->ctl != ap->last_ctl) { - iowrite8(tf->ctl, ioaddr->ctl_addr); + if (ioaddr->ctl_addr) + iowrite8(tf->ctl, ioaddr->ctl_addr); ap->last_ctl = tf->ctl; ata_wait_idle(ap); } if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) { + WARN_ON(!ioaddr->ctl_addr); iowrite8(tf->hob_feature, ioaddr->feature_addr); iowrite8(tf->hob_nsect, ioaddr->nsect_addr); iowrite8(tf->hob_lbal, ioaddr->lbal_addr); @@ -123,7 +603,47 @@ void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) } /** - * ata_exec_command - issue ATA command to host controller + * ata_sff_tf_read - input device's ATA taskfile shadow registers + * @ap: Port from which input is read + * @tf: ATA taskfile register set for storing input + * + * Reads ATA taskfile registers for currently-selected device + * into @tf. Assumes the device has a fully SFF compliant task file + * layout and behaviour. If you device does not (eg has a different + * status method) then you will need to provide a replacement tf_read + * + * LOCKING: + * Inherited from caller. + */ +void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf) +{ + struct ata_ioports *ioaddr = &ap->ioaddr; + + tf->command = ata_sff_check_status(ap); + tf->feature = ioread8(ioaddr->error_addr); + tf->nsect = ioread8(ioaddr->nsect_addr); + tf->lbal = ioread8(ioaddr->lbal_addr); + tf->lbam = ioread8(ioaddr->lbam_addr); + tf->lbah = ioread8(ioaddr->lbah_addr); + tf->device = ioread8(ioaddr->device_addr); + + if (tf->flags & ATA_TFLAG_LBA48) { + if (likely(ioaddr->ctl_addr)) { + iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr); + tf->hob_feature = ioread8(ioaddr->error_addr); + tf->hob_nsect = ioread8(ioaddr->nsect_addr); + tf->hob_lbal = ioread8(ioaddr->lbal_addr); + tf->hob_lbam = ioread8(ioaddr->lbam_addr); + tf->hob_lbah = ioread8(ioaddr->lbah_addr); + iowrite8(tf->ctl, ioaddr->ctl_addr); + ap->last_ctl = tf->ctl; + } else + WARN_ON(1); + } +} + +/** + * ata_sff_exec_command - issue ATA command to host controller * @ap: port to which command is being issued * @tf: ATA taskfile register set * @@ -133,209 +653,1014 @@ void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) * LOCKING: * spin_lock_irqsave(host lock) */ -void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf) +void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf) { DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command); iowrite8(tf->command, ap->ioaddr.command_addr); - ata_pause(ap); + ata_sff_pause(ap); } /** - * ata_tf_read - input device's ATA taskfile shadow registers - * @ap: Port from which input is read - * @tf: ATA taskfile register set for storing input + * ata_tf_to_host - issue ATA taskfile to host controller + * @ap: port to which command is being issued + * @tf: ATA taskfile register set * - * Reads ATA taskfile registers for currently-selected device - * into @tf. + * Issues ATA taskfile register set to ATA host controller, + * with proper synchronization with interrupt handler and + * other threads. + * + * LOCKING: + * spin_lock_irqsave(host lock) + */ +static inline void ata_tf_to_host(struct ata_port *ap, + const struct ata_taskfile *tf) +{ + ap->ops->sff_tf_load(ap, tf); + ap->ops->sff_exec_command(ap, tf); +} + +/** + * ata_sff_data_xfer - Transfer data by PIO + * @dev: device to target + * @buf: data buffer + * @buflen: buffer length + * @rw: read/write + * + * Transfer data from/to the device data register by PIO. * * LOCKING: * Inherited from caller. + * + * RETURNS: + * Bytes consumed. */ -void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) +unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf, + unsigned int buflen, int rw) { - struct ata_ioports *ioaddr = &ap->ioaddr; + struct ata_port *ap = dev->link->ap; + void __iomem *data_addr = ap->ioaddr.data_addr; + unsigned int words = buflen >> 1; + + /* Transfer multiple of 2 bytes */ + if (rw == READ) + ioread16_rep(data_addr, buf, words); + else + iowrite16_rep(data_addr, buf, words); + + /* Transfer trailing 1 byte, if any. */ + if (unlikely(buflen & 0x01)) { + __le16 align_buf[1] = { 0 }; + unsigned char *trailing_buf = buf + buflen - 1; + + if (rw == READ) { + align_buf[0] = cpu_to_le16(ioread16(data_addr)); + memcpy(trailing_buf, align_buf, 1); + } else { + memcpy(align_buf, trailing_buf, 1); + iowrite16(le16_to_cpu(align_buf[0]), data_addr); + } + words++; + } - tf->command = ata_chk_status(ap); - tf->feature = ioread8(ioaddr->error_addr); - tf->nsect = ioread8(ioaddr->nsect_addr); - tf->lbal = ioread8(ioaddr->lbal_addr); - tf->lbam = ioread8(ioaddr->lbam_addr); - tf->lbah = ioread8(ioaddr->lbah_addr); - tf->device = ioread8(ioaddr->device_addr); + return words << 1; +} - if (tf->flags & ATA_TFLAG_LBA48) { - iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr); - tf->hob_feature = ioread8(ioaddr->error_addr); - tf->hob_nsect = ioread8(ioaddr->nsect_addr); - tf->hob_lbal = ioread8(ioaddr->lbal_addr); - tf->hob_lbam = ioread8(ioaddr->lbam_addr); - tf->hob_lbah = ioread8(ioaddr->lbah_addr); - iowrite8(tf->ctl, ioaddr->ctl_addr); - ap->last_ctl = tf->ctl; +/** + * ata_sff_data_xfer_noirq - Transfer data by PIO + * @dev: device to target + * @buf: data buffer + * @buflen: buffer length + * @rw: read/write + * + * Transfer data from/to the device data register by PIO. Do the + * transfer with interrupts disabled. + * + * LOCKING: + * Inherited from caller. + * + * RETURNS: + * Bytes consumed. + */ +unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev, unsigned char *buf, + unsigned int buflen, int rw) +{ + unsigned long flags; + unsigned int consumed; + + local_irq_save(flags); + consumed = ata_sff_data_xfer(dev, buf, buflen, rw); + local_irq_restore(flags); + + return consumed; +} + +/** + * ata_pio_sector - Transfer a sector of data. + * @qc: Command on going + * + * Transfer qc->sect_size bytes of data from/to the ATA device. + * + * LOCKING: + * Inherited from caller. + */ +static void ata_pio_sector(struct ata_queued_cmd *qc) +{ + int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); + struct ata_port *ap = qc->ap; + struct page *page; + unsigned int offset; + unsigned char *buf; + + if (qc->curbytes == qc->nbytes - qc->sect_size) + ap->hsm_task_state = HSM_ST_LAST; + + page = sg_page(qc->cursg); + offset = qc->cursg->offset + qc->cursg_ofs; + + /* get the current page and offset */ + page = nth_page(page, (offset >> PAGE_SHIFT)); + offset %= PAGE_SIZE; + + DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); + + if (PageHighMem(page)) { + unsigned long flags; + + /* FIXME: use a bounce buffer */ + local_irq_save(flags); + buf = kmap_atomic(page, KM_IRQ0); + + /* do the actual data transfer */ + ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size, + do_write); + + kunmap_atomic(buf, KM_IRQ0); + local_irq_restore(flags); + } else { + buf = page_address(page); + ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size, + do_write); + } + + qc->curbytes += qc->sect_size; + qc->cursg_ofs += qc->sect_size; + + if (qc->cursg_ofs == qc->cursg->length) { + qc->cursg = sg_next(qc->cursg); + qc->cursg_ofs = 0; } } /** - * ata_check_status - Read device status reg & clear interrupt - * @ap: port where the device is + * ata_pio_sectors - Transfer one or many sectors. + * @qc: Command on going * - * Reads ATA taskfile status register for currently-selected device - * and return its value. This also clears pending interrupts - * from this device + * Transfer one or many sectors of data from/to the + * ATA device for the DRQ request. * * LOCKING: * Inherited from caller. */ -u8 ata_check_status(struct ata_port *ap) +static void ata_pio_sectors(struct ata_queued_cmd *qc) { - return ioread8(ap->ioaddr.status_addr); + if (is_multi_taskfile(&qc->tf)) { + /* READ/WRITE MULTIPLE */ + unsigned int nsect; + + WARN_ON(qc->dev->multi_count == 0); + + nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size, + qc->dev->multi_count); + while (nsect--) + ata_pio_sector(qc); + } else + ata_pio_sector(qc); + + ata_sff_sync(qc->ap); /* flush */ } /** - * ata_altstatus - Read device alternate status reg - * @ap: port where the device is + * atapi_send_cdb - Write CDB bytes to hardware + * @ap: Port to which ATAPI device is attached. + * @qc: Taskfile currently active * - * Reads ATA taskfile alternate status register for - * currently-selected device and return its value. + * When device has indicated its readiness to accept + * a CDB, this function is called. Send the CDB. * - * Note: may NOT be used as the check_altstatus() entry in - * ata_port_operations. + * LOCKING: + * caller. + */ +static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) +{ + /* send SCSI cdb */ + DPRINTK("send cdb\n"); + WARN_ON(qc->dev->cdb_len < 12); + + ap->ops->sff_data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); + ata_sff_sync(ap); + /* FIXME: If the CDB is for DMA do we need to do the transition delay + or is bmdma_start guaranteed to do it ? */ + switch (qc->tf.protocol) { + case ATAPI_PROT_PIO: + ap->hsm_task_state = HSM_ST; + break; + case ATAPI_PROT_NODATA: + ap->hsm_task_state = HSM_ST_LAST; + break; + case ATAPI_PROT_DMA: + ap->hsm_task_state = HSM_ST_LAST; + /* initiate bmdma */ + ap->ops->bmdma_start(qc); + break; + } +} + +/** + * __atapi_pio_bytes - Transfer data from/to the ATAPI device. + * @qc: Command on going + * @bytes: number of bytes + * + * Transfer Transfer data from/to the ATAPI device. * * LOCKING: * Inherited from caller. + * */ -u8 ata_altstatus(struct ata_port *ap) +static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) { - if (ap->ops->check_altstatus) - return ap->ops->check_altstatus(ap); + int rw = (qc->tf.flags & ATA_TFLAG_WRITE) ? WRITE : READ; + struct ata_port *ap = qc->ap; + struct ata_device *dev = qc->dev; + struct ata_eh_info *ehi = &dev->link->eh_info; + struct scatterlist *sg; + struct page *page; + unsigned char *buf; + unsigned int offset, count, consumed; + +next_sg: + sg = qc->cursg; + if (unlikely(!sg)) { + ata_ehi_push_desc(ehi, "unexpected or too much trailing data " + "buf=%u cur=%u bytes=%u", + qc->nbytes, qc->curbytes, bytes); + return -1; + } - return ioread8(ap->ioaddr.altstatus_addr); + page = sg_page(sg); + offset = sg->offset + qc->cursg_ofs; + + /* get the current page and offset */ + page = nth_page(page, (offset >> PAGE_SHIFT)); + offset %= PAGE_SIZE; + + /* don't overrun current sg */ + count = min(sg->length - qc->cursg_ofs, bytes); + + /* don't cross page boundaries */ + count = min(count, (unsigned int)PAGE_SIZE - offset); + + DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); + + if (PageHighMem(page)) { + unsigned long flags; + + /* FIXME: use bounce buffer */ + local_irq_save(flags); + buf = kmap_atomic(page, KM_IRQ0); + + /* do the actual data transfer */ + consumed = ap->ops->sff_data_xfer(dev, buf + offset, count, rw); + + kunmap_atomic(buf, KM_IRQ0); + local_irq_restore(flags); + } else { + buf = page_address(page); + consumed = ap->ops->sff_data_xfer(dev, buf + offset, count, rw); + } + + bytes -= min(bytes, consumed); + qc->curbytes += count; + qc->cursg_ofs += count; + + if (qc->cursg_ofs == sg->length) { + qc->cursg = sg_next(qc->cursg); + qc->cursg_ofs = 0; + } + + /* consumed can be larger than count only for the last transfer */ + WARN_ON(qc->cursg && count != consumed); + + if (bytes) + goto next_sg; + return 0; } /** - * ata_bmdma_setup - Set up PCI IDE BMDMA transaction - * @qc: Info associated with this ATA transaction. + * atapi_pio_bytes - Transfer data from/to the ATAPI device. + * @qc: Command on going + * + * Transfer Transfer data from/to the ATAPI device. * * LOCKING: - * spin_lock_irqsave(host lock) + * Inherited from caller. */ -void ata_bmdma_setup(struct ata_queued_cmd *qc) +static void atapi_pio_bytes(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; - unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); - u8 dmactl; + struct ata_device *dev = qc->dev; + struct ata_eh_info *ehi = &dev->link->eh_info; + unsigned int ireason, bc_lo, bc_hi, bytes; + int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; + + /* Abuse qc->result_tf for temp storage of intermediate TF + * here to save some kernel stack usage. + * For normal completion, qc->result_tf is not relevant. For + * error, qc->result_tf is later overwritten by ata_qc_complete(). + * So, the correctness of qc->result_tf is not affected. + */ + ap->ops->sff_tf_read(ap, &qc->result_tf); + ireason = qc->result_tf.nsect; + bc_lo = qc->result_tf.lbam; + bc_hi = qc->result_tf.lbah; + bytes = (bc_hi << 8) | bc_lo; - /* load PRD table addr. */ - mb(); /* make sure PRD table writes are visible to controller */ - iowrite32(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS); + /* shall be cleared to zero, indicating xfer of data */ + if (unlikely(ireason & (1 << 0))) + goto atapi_check; - /* specify data direction, triple-check start bit is clear */ - dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); - dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); - if (!rw) - dmactl |= ATA_DMA_WR; - iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); + /* make sure transfer direction matches expected */ + i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; + if (unlikely(do_write != i_write)) + goto atapi_check; - /* issue r/w command */ - ap->ops->exec_command(ap, &qc->tf); + if (unlikely(!bytes)) + goto atapi_check; + + VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes); + + if (unlikely(__atapi_pio_bytes(qc, bytes))) + goto err_out; + ata_sff_sync(ap); /* flush */ + + return; + + atapi_check: + ata_ehi_push_desc(ehi, "ATAPI check failed (ireason=0x%x bytes=%u)", + ireason, bytes); + err_out: + qc->err_mask |= AC_ERR_HSM; + ap->hsm_task_state = HSM_ST_ERR; } /** - * ata_bmdma_start - Start a PCI IDE BMDMA transaction - * @qc: Info associated with this ATA transaction. + * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. + * @ap: the target ata_port + * @qc: qc on going + * + * RETURNS: + * 1 if ok in workqueue, 0 otherwise. + */ +static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) +{ + if (qc->tf.flags & ATA_TFLAG_POLLING) + return 1; + + if (ap->hsm_task_state == HSM_ST_FIRST) { + if (qc->tf.protocol == ATA_PROT_PIO && + (qc->tf.flags & ATA_TFLAG_WRITE)) + return 1; + + if (ata_is_atapi(qc->tf.protocol) && + !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) + return 1; + } + + return 0; +} + +/** + * ata_hsm_qc_complete - finish a qc running on standard HSM + * @qc: Command to complete + * @in_wq: 1 if called from workqueue, 0 otherwise + * + * Finish @qc which is running on standard HSM. * * LOCKING: - * spin_lock_irqsave(host lock) + * If @in_wq is zero, spin_lock_irqsave(host lock). + * Otherwise, none on entry and grabs host lock. */ -void ata_bmdma_start(struct ata_queued_cmd *qc) +static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) { struct ata_port *ap = qc->ap; - u8 dmactl; + unsigned long flags; - /* start host DMA transaction */ - dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); - iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); + if (ap->ops->error_handler) { + if (in_wq) { + spin_lock_irqsave(ap->lock, flags); + + /* EH might have kicked in while host lock is + * released. + */ + qc = ata_qc_from_tag(ap, qc->tag); + if (qc) { + if (likely(!(qc->err_mask & AC_ERR_HSM))) { + ap->ops->sff_irq_on(ap); + ata_qc_complete(qc); + } else + ata_port_freeze(ap); + } + + spin_unlock_irqrestore(ap->lock, flags); + } else { + if (likely(!(qc->err_mask & AC_ERR_HSM))) + ata_qc_complete(qc); + else + ata_port_freeze(ap); + } + } else { + if (in_wq) { + spin_lock_irqsave(ap->lock, flags); + ap->ops->sff_irq_on(ap); + ata_qc_complete(qc); + spin_unlock_irqrestore(ap->lock, flags); + } else + ata_qc_complete(qc); + } +} - /* Strictly, one may wish to issue an ioread8() here, to - * flush the mmio write. However, control also passes - * to the hardware at this point, and it will interrupt - * us when we are to resume control. So, in effect, - * we don't care when the mmio write flushes. - * Further, a read of the DMA status register _immediately_ - * following the write may not be what certain flaky hardware - * is expected, so I think it is best to not add a readb() - * without first all the MMIO ATA cards/mobos. - * Or maybe I'm just being paranoid. - * - * FIXME: The posting of this write means I/O starts are - * unneccessarily delayed for MMIO +/** + * ata_sff_hsm_move - move the HSM to the next state. + * @ap: the target ata_port + * @qc: qc on going + * @status: current device status + * @in_wq: 1 if called from workqueue, 0 otherwise + * + * RETURNS: + * 1 when poll next status needed, 0 otherwise. + */ +int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, + u8 status, int in_wq) +{ + unsigned long flags = 0; + int poll_next; + + WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); + + /* Make sure ata_sff_qc_issue() does not throw things + * like DMA polling into the workqueue. Notice that + * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). + */ + WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); + +fsm_start: + DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", + ap->print_id, qc->tf.protocol, ap->hsm_task_state, status); + + switch (ap->hsm_task_state) { + case HSM_ST_FIRST: + /* Send first data block or PACKET CDB */ + + /* If polling, we will stay in the work queue after + * sending the data. Otherwise, interrupt handler + * takes over after sending the data. + */ + poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); + + /* check device status */ + if (unlikely((status & ATA_DRQ) == 0)) { + /* handle BSY=0, DRQ=0 as error */ + if (likely(status & (ATA_ERR | ATA_DF))) + /* device stops HSM for abort/error */ + qc->err_mask |= AC_ERR_DEV; + else + /* HSM violation. Let EH handle this */ + qc->err_mask |= AC_ERR_HSM; + + ap->hsm_task_state = HSM_ST_ERR; + goto fsm_start; + } + + /* Device should not ask for data transfer (DRQ=1) + * when it finds something wrong. + * We ignore DRQ here and stop the HSM by + * changing hsm_task_state to HSM_ST_ERR and + * let the EH abort the command or reset the device. + */ + if (unlikely(status & (ATA_ERR | ATA_DF))) { + /* Some ATAPI tape drives forget to clear the ERR bit + * when doing the next command (mostly request sense). + * We ignore ERR here to workaround and proceed sending + * the CDB. + */ + if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) { + ata_port_printk(ap, KERN_WARNING, + "DRQ=1 with device error, " + "dev_stat 0x%X\n", status); + qc->err_mask |= AC_ERR_HSM; + ap->hsm_task_state = HSM_ST_ERR; + goto fsm_start; + } + } + + /* Send the CDB (atapi) or the first data block (ata pio out). + * During the state transition, interrupt handler shouldn't + * be invoked before the data transfer is complete and + * hsm_task_state is changed. Hence, the following locking. + */ + if (in_wq) + spin_lock_irqsave(ap->lock, flags); + + if (qc->tf.protocol == ATA_PROT_PIO) { + /* PIO data out protocol. + * send first data block. + */ + + /* ata_pio_sectors() might change the state + * to HSM_ST_LAST. so, the state is changed here + * before ata_pio_sectors(). + */ + ap->hsm_task_state = HSM_ST; + ata_pio_sectors(qc); + } else + /* send CDB */ + atapi_send_cdb(ap, qc); + + if (in_wq) + spin_unlock_irqrestore(ap->lock, flags); + + /* if polling, ata_pio_task() handles the rest. + * otherwise, interrupt handler takes over from here. + */ + break; + + case HSM_ST: + /* complete command or read/write the data register */ + if (qc->tf.protocol == ATAPI_PROT_PIO) { + /* ATAPI PIO protocol */ + if ((status & ATA_DRQ) == 0) { + /* No more data to transfer or device error. + * Device error will be tagged in HSM_ST_LAST. + */ + ap->hsm_task_state = HSM_ST_LAST; + goto fsm_start; + } + + /* Device should not ask for data transfer (DRQ=1) + * when it finds something wrong. + * We ignore DRQ here and stop the HSM by + * changing hsm_task_state to HSM_ST_ERR and + * let the EH abort the command or reset the device. + */ + if (unlikely(status & (ATA_ERR | ATA_DF))) { + ata_port_printk(ap, KERN_WARNING, "DRQ=1 with " + "device error, dev_stat 0x%X\n", + status); + qc->err_mask |= AC_ERR_HSM; + ap->hsm_task_state = HSM_ST_ERR; + goto fsm_start; + } + + atapi_pio_bytes(qc); + + if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) + /* bad ireason reported by device */ + goto fsm_start; + + } else { + /* ATA PIO protocol */ + if (unlikely((status & ATA_DRQ) == 0)) { + /* handle BSY=0, DRQ=0 as error */ + if (likely(status & (ATA_ERR | ATA_DF))) + /* device stops HSM for abort/error */ + qc->err_mask |= AC_ERR_DEV; + else + /* HSM violation. Let EH handle this. + * Phantom devices also trigger this + * condition. Mark hint. + */ + qc->err_mask |= AC_ERR_HSM | + AC_ERR_NODEV_HINT; + + ap->hsm_task_state = HSM_ST_ERR; + goto fsm_start; + } + + /* For PIO reads, some devices may ask for + * data transfer (DRQ=1) alone with ERR=1. + * We respect DRQ here and transfer one + * block of junk data before changing the + * hsm_task_state to HSM_ST_ERR. + * + * For PIO writes, ERR=1 DRQ=1 doesn't make + * sense since the data block has been + * transferred to the device. + */ + if (unlikely(status & (ATA_ERR | ATA_DF))) { + /* data might be corrputed */ + qc->err_mask |= AC_ERR_DEV; + + if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { + ata_pio_sectors(qc); + status = ata_wait_idle(ap); + } + + if (status & (ATA_BUSY | ATA_DRQ)) + qc->err_mask |= AC_ERR_HSM; + + /* ata_pio_sectors() might change the + * state to HSM_ST_LAST. so, the state + * is changed after ata_pio_sectors(). + */ + ap->hsm_task_state = HSM_ST_ERR; + goto fsm_start; + } + + ata_pio_sectors(qc); + + if (ap->hsm_task_state == HSM_ST_LAST && + (!(qc->tf.flags & ATA_TFLAG_WRITE))) { + /* all data read */ + status = ata_wait_idle(ap); + goto fsm_start; + } + } + + poll_next = 1; + break; + + case HSM_ST_LAST: + if (unlikely(!ata_ok(status))) { + qc->err_mask |= __ac_err_mask(status); + ap->hsm_task_state = HSM_ST_ERR; + goto fsm_start; + } + + /* no more data to transfer */ + DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", + ap->print_id, qc->dev->devno, status); + + WARN_ON(qc->err_mask & (AC_ERR_DEV | AC_ERR_HSM)); + + ap->hsm_task_state = HSM_ST_IDLE; + + /* complete taskfile transaction */ + ata_hsm_qc_complete(qc, in_wq); + + poll_next = 0; + break; + + case HSM_ST_ERR: + /* make sure qc->err_mask is available to + * know what's wrong and recover + */ + WARN_ON(!(qc->err_mask & (AC_ERR_DEV | AC_ERR_HSM))); + + ap->hsm_task_state = HSM_ST_IDLE; + + /* complete taskfile transaction */ + ata_hsm_qc_complete(qc, in_wq); + + poll_next = 0; + break; + default: + poll_next = 0; + BUG(); + } + + return poll_next; +} + +void ata_pio_task(void *_data) +{ + struct ata_port *ap = _data; + struct ata_queued_cmd *qc = ap->port_task_data; + u8 status; + int poll_next; + +fsm_start: + WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); + + /* + * This is purely heuristic. This is a fast path. + * Sometimes when we enter, BSY will be cleared in + * a chk-status or two. If not, the drive is probably seeking + * or something. Snooze for a couple msecs, then + * chk-status again. If still busy, queue delayed work. + */ + status = ata_sff_busy_wait(ap, ATA_BUSY, 5); + if (status & ATA_BUSY) { + msleep(2); + status = ata_sff_busy_wait(ap, ATA_BUSY, 10); + if (status & ATA_BUSY) { + ata_pio_queue_task(ap, qc, ATA_SHORT_PAUSE); + return; + } + } + + /* move the HSM */ + poll_next = ata_sff_hsm_move(ap, qc, status, 1); + + /* another command or interrupt handler + * may be running at this point. */ + if (poll_next) + goto fsm_start; } /** - * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt. - * @ap: Port associated with this ATA transaction. + * ata_sff_qc_issue - issue taskfile to device in proto-dependent manner + * @qc: command to issue to device * - * Clear interrupt and error flags in DMA status register. + * Using various libata functions and hooks, this function + * starts an ATA command. ATA commands are grouped into + * classes called "protocols", and issuing each type of protocol + * is slightly different. * - * May be used as the irq_clear() entry in ata_port_operations. + * May be used as the qc_issue() entry in ata_port_operations. * * LOCKING: * spin_lock_irqsave(host lock) + * + * RETURNS: + * Zero on success, AC_ERR_* mask on failure */ -void ata_bmdma_irq_clear(struct ata_port *ap) +unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc) { - void __iomem *mmio = ap->ioaddr.bmdma_addr; + struct ata_port *ap = qc->ap; - if (!mmio) - return; + /* Use polling pio if the LLD doesn't handle + * interrupt driven pio and atapi CDB interrupt. + */ + if (ap->flags & ATA_FLAG_PIO_POLLING) { + switch (qc->tf.protocol) { + case ATA_PROT_PIO: + case ATA_PROT_NODATA: + case ATAPI_PROT_PIO: + case ATAPI_PROT_NODATA: + qc->tf.flags |= ATA_TFLAG_POLLING; + break; + case ATAPI_PROT_DMA: + if (qc->dev->flags & ATA_DFLAG_CDB_INTR) + /* see ata_dma_blacklisted() */ + BUG(); + break; + default: + break; + } + } - iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS); + /* select the device */ + ata_dev_select(ap, qc->dev->devno, 1, 0); + + /* start the command */ + switch (qc->tf.protocol) { + case ATA_PROT_NODATA: + if (qc->tf.flags & ATA_TFLAG_POLLING) + ata_qc_set_polling(qc); + + ata_tf_to_host(ap, &qc->tf); + ap->hsm_task_state = HSM_ST_LAST; + + if (qc->tf.flags & ATA_TFLAG_POLLING) + ata_pio_queue_task(ap, qc, 0); + + break; + + case ATA_PROT_DMA: + WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); + + ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */ + ap->ops->bmdma_setup(qc); /* set up bmdma */ + ap->ops->bmdma_start(qc); /* initiate bmdma */ + ap->hsm_task_state = HSM_ST_LAST; + break; + + case ATA_PROT_PIO: + if (qc->tf.flags & ATA_TFLAG_POLLING) + ata_qc_set_polling(qc); + + ata_tf_to_host(ap, &qc->tf); + + if (qc->tf.flags & ATA_TFLAG_WRITE) { + /* PIO data out protocol */ + ap->hsm_task_state = HSM_ST_FIRST; + ata_pio_queue_task(ap, qc, 0); + + /* always send first data block using + * the ata_pio_task() codepath. + */ + } else { + /* PIO data in protocol */ + ap->hsm_task_state = HSM_ST; + + if (qc->tf.flags & ATA_TFLAG_POLLING) + ata_pio_queue_task(ap, qc, 0); + + /* if polling, ata_pio_task() handles the rest. + * otherwise, interrupt handler takes over from here. + */ + } + + break; + + case ATAPI_PROT_PIO: + case ATAPI_PROT_NODATA: + if (qc->tf.flags & ATA_TFLAG_POLLING) + ata_qc_set_polling(qc); + + ata_tf_to_host(ap, &qc->tf); + + ap->hsm_task_state = HSM_ST_FIRST; + + /* send cdb by polling if no cdb interrupt */ + if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || + (qc->tf.flags & ATA_TFLAG_POLLING)) + ata_pio_queue_task(ap, qc, 0); + break; + + case ATAPI_PROT_DMA: + WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); + + ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */ + ap->ops->bmdma_setup(qc); /* set up bmdma */ + ap->hsm_task_state = HSM_ST_FIRST; + + /* send cdb by polling if no cdb interrupt */ + if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) + ata_pio_queue_task(ap, qc, 0); + break; + + default: + WARN_ON(1); + return AC_ERR_SYSTEM; + } + + return 0; } /** - * ata_bmdma_status - Read PCI IDE BMDMA status - * @ap: Port associated with this ATA transaction. - * - * Read and return BMDMA status register. + * ata_sff_qc_fill_rtf - fill result TF using ->sff_tf_read + * @qc: qc to fill result TF for * - * May be used as the bmdma_status() entry in ata_port_operations. + * @qc is finished and result TF needs to be filled. Fill it + * using ->sff_tf_read. * * LOCKING: * spin_lock_irqsave(host lock) + * + * RETURNS: + * true indicating that result TF is successfully filled. */ -u8 ata_bmdma_status(struct ata_port *ap) +bool ata_sff_qc_fill_rtf(struct ata_queued_cmd *qc) { - return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); + qc->ap->ops->sff_tf_read(qc->ap, &qc->result_tf); + return true; } /** - * ata_bmdma_stop - Stop PCI IDE BMDMA transfer - * @qc: Command we are ending DMA for - * - * Clears the ATA_DMA_START flag in the dma control register + * ata_sff_host_intr - Handle host interrupt for given (port, task) + * @ap: Port on which interrupt arrived (possibly...) + * @qc: Taskfile currently active in engine * - * May be used as the bmdma_stop() entry in ata_port_operations. + * Handle host interrupt for given queued command. Currently, + * only DMA interrupts are handled. All other commands are + * handled via polling with interrupts disabled (nIEN bit). * * LOCKING: * spin_lock_irqsave(host lock) + * + * RETURNS: + * One if interrupt was handled, zero if not (shared irq). */ -void ata_bmdma_stop(struct ata_queued_cmd *qc) +inline unsigned int ata_sff_host_intr(struct ata_port *ap, + struct ata_queued_cmd *qc) { - struct ata_port *ap = qc->ap; - void __iomem *mmio = ap->ioaddr.bmdma_addr; + struct ata_eh_info *ehi = &ap->link.eh_info; + u8 status, host_stat = 0; - /* clear start/stop bit */ - iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START, - mmio + ATA_DMA_CMD); + VPRINTK("ata%u: protocol %d task_state %d\n", + ap->print_id, qc->tf.protocol, ap->hsm_task_state); - /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ - ata_altstatus(ap); /* dummy read */ + /* Check whether we are expecting interrupt in this state */ + switch (ap->hsm_task_state) { + case HSM_ST_FIRST: + /* Some pre-ATAPI-4 devices assert INTRQ + * at this state when ready to receive CDB. + */ + + /* Check the ATA_DFLAG_CDB_INTR flag is enough here. + * The flag was turned on only for atapi devices. No + * need to check ata_is_atapi(qc->tf.protocol) again. + */ + if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) + goto idle_irq; + break; + case HSM_ST_LAST: + if (qc->tf.protocol == ATA_PROT_DMA || + qc->tf.protocol == ATAPI_PROT_DMA) { + /* check status of DMA engine */ + host_stat = ap->ops->bmdma_status(ap); + VPRINTK("ata%u: host_stat 0x%X\n", + ap->print_id, host_stat); + + /* if it's not our irq... */ + if (!(host_stat & ATA_DMA_INTR)) + goto idle_irq; + + /* before we do anything else, clear DMA-Start bit */ + ap->ops->bmdma_stop(qc); + + if (unlikely(host_stat & ATA_DMA_ERR)) { + /* error when transfering data to/from memory */ + qc->err_mask |= AC_ERR_HOST_BUS; + ap->hsm_task_state = HSM_ST_ERR; + } + } + break; + case HSM_ST: + break; + default: + goto idle_irq; + } + + + /* check main status, clearing INTRQ if needed */ + status = ata_sff_irq_status(ap); + if (status & ATA_BUSY) + goto idle_irq; + + /* ack bmdma irq events */ + ap->ops->sff_irq_clear(ap); + + ata_sff_hsm_move(ap, qc, status, 0); + + if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || + qc->tf.protocol == ATAPI_PROT_DMA)) + ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); + + return 1; /* irq handled */ + +idle_irq: + ap->stats.idle_irq++; + +#ifdef ATA_IRQ_TRAP + if ((ap->stats.idle_irq % 1000) == 0) { + ap->ops->sff_check_status(ap); + ap->ops->sff_irq_clear(ap); + ata_port_printk(ap, KERN_WARNING, "irq trap\n"); + return 1; + } +#endif + return 0; /* irq not handled */ } /** - * ata_bmdma_freeze - Freeze BMDMA controller port + * ata_sff_interrupt - Default ATA host interrupt handler + * @irq: irq line (unused) + * @dev_instance: pointer to our ata_host information structure + * + * Default interrupt handler for PCI IDE devices. Calls + * ata_sff_host_intr() for each port that is not disabled. + * + * LOCKING: + * Obtains host lock during operation. + * + * RETURNS: + * IRQ_NONE or IRQ_HANDLED. + */ +irqreturn_t ata_sff_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs) +{ + struct ata_host *host = dev_instance; + unsigned int i; + unsigned int handled = 0; + unsigned long flags; + + /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ + spin_lock_irqsave(&host->lock, flags); + + for (i = 0; i < host->n_ports; i++) { + struct ata_port *ap; + + ap = host->ports[i]; + if (ap && + !(ap->flags & ATA_FLAG_DISABLED)) { + struct ata_queued_cmd *qc; + + qc = ata_qc_from_tag(ap, ap->link.active_tag); + if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && + (qc->flags & ATA_QCFLAG_ACTIVE)) + handled |= ata_sff_host_intr(ap, qc); + } + } + + spin_unlock_irqrestore(&host->lock, flags); + + return IRQ_RETVAL(handled); +} + +/** + * ata_sff_freeze - Freeze SFF controller port * @ap: port to freeze * * Freeze BMDMA controller port. @@ -343,64 +1668,426 @@ void ata_bmdma_stop(struct ata_queued_cmd *qc) * LOCKING: * Inherited from caller. */ -void ata_bmdma_freeze(struct ata_port *ap) +void ata_sff_freeze(struct ata_port *ap) { struct ata_ioports *ioaddr = &ap->ioaddr; ap->ctl |= ATA_NIEN; ap->last_ctl = ap->ctl; - iowrite8(ap->ctl, ioaddr->ctl_addr); + if (ioaddr->ctl_addr) + iowrite8(ap->ctl, ioaddr->ctl_addr); /* Under certain circumstances, some controllers raise IRQ on * ATA_NIEN manipulation. Also, many controllers fail to mask * previously pending IRQ on ATA_NIEN assertion. Clear it. */ - ata_chk_status(ap); + ap->ops->sff_check_status(ap); - ap->ops->irq_clear(ap); + ap->ops->sff_irq_clear(ap); } /** - * ata_bmdma_thaw - Thaw BMDMA controller port + * ata_sff_thaw - Thaw SFF controller port * @ap: port to thaw * - * Thaw BMDMA controller port. + * Thaw SFF controller port. * * LOCKING: * Inherited from caller. */ -void ata_bmdma_thaw(struct ata_port *ap) +void ata_sff_thaw(struct ata_port *ap) { /* clear & re-enable interrupts */ - ata_chk_status(ap); - ap->ops->irq_clear(ap); - ap->ops->irq_on(ap); + ap->ops->sff_check_status(ap); + ap->ops->sff_irq_clear(ap); + ap->ops->sff_irq_on(ap); +} + +/** + * ata_sff_prereset - prepare SFF link for reset + * @link: SFF link to be reset + * @deadline: deadline jiffies for the operation + * + * SFF link @link is about to be reset. Initialize it. It first + * calls ata_std_prereset() and wait for !BSY if the port is + * being softreset. + * + * LOCKING: + * Kernel thread context (may sleep) + * + * RETURNS: + * 0 on success, -errno otherwise. + */ +int ata_sff_prereset(struct ata_link *link, unsigned long deadline) +{ + struct ata_eh_context *ehc = &link->eh_context; + int rc; + + rc = ata_std_prereset(link, deadline); + if (rc) + return rc; + + /* if we're about to do hardreset, nothing more to do */ + if (ehc->i.action & ATA_EH_HARDRESET) + return 0; + + /* wait for !BSY if we don't know that no device is attached */ + if (!ata_link_offline(link)) { + rc = ata_sff_wait_ready(link, deadline); + if (rc && rc != -ENODEV) { + ata_link_printk(link, KERN_WARNING, "device not ready " + "(errno=%d), forcing hardreset\n", rc); + ehc->i.action |= ATA_EH_HARDRESET; + } + } + + return 0; +} + +/** + * ata_devchk - PATA device presence detection + * @ap: ATA channel to examine + * @device: Device to examine (starting at zero) + * + * This technique was originally described in + * Hale Landis's ATADRVR (www.ata-atapi.com), and + * later found its way into the ATA/ATAPI spec. + * + * Write a pattern to the ATA shadow registers, + * and if a device is present, it will respond by + * correctly storing and echoing back the + * ATA shadow register contents. + * + * LOCKING: + * caller. + */ +static unsigned int ata_devchk(struct ata_port *ap, unsigned int device) +{ + struct ata_ioports *ioaddr = &ap->ioaddr; + u8 nsect, lbal; + + ap->ops->sff_dev_select(ap, device); + + iowrite8(0x55, ioaddr->nsect_addr); + iowrite8(0xaa, ioaddr->lbal_addr); + + iowrite8(0xaa, ioaddr->nsect_addr); + iowrite8(0x55, ioaddr->lbal_addr); + + iowrite8(0x55, ioaddr->nsect_addr); + iowrite8(0xaa, ioaddr->lbal_addr); + + nsect = ioread8(ioaddr->nsect_addr); + lbal = ioread8(ioaddr->lbal_addr); + + if ((nsect == 0x55) && (lbal == 0xaa)) + return 1; /* we found a device */ + + return 0; /* nothing found */ +} + +/** + * ata_sff_dev_classify - Parse returned ATA device signature + * @dev: ATA device to classify (starting at zero) + * @present: device seems present + * @r_err: Value of error register on completion + * + * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, + * an ATA/ATAPI-defined set of values is placed in the ATA + * shadow registers, indicating the results of device detection + * and diagnostics. + * + * Select the ATA device, and read the values from the ATA shadow + * registers. Then parse according to the Error register value, + * and the spec-defined values examined by ata_dev_classify(). + * + * LOCKING: + * caller. + * + * RETURNS: + * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. + */ +unsigned int ata_sff_dev_classify(struct ata_device *dev, int present, + u8 *r_err) +{ + struct ata_port *ap = dev->link->ap; + struct ata_taskfile tf; + unsigned int class; + u8 err; + + ap->ops->sff_dev_select(ap, dev->devno); + + memset(&tf, 0, sizeof(tf)); + + ap->ops->sff_tf_read(ap, &tf); + err = tf.feature; + if (r_err) + *r_err = err; + + /* see if device passed diags: continue and warn later */ + if (err == 0) + /* diagnostic fail : do nothing _YET_ */ + dev->horkage |= ATA_HORKAGE_DIAGNOSTIC; + else if (err == 1) + /* do nothing */ ; + else if ((dev->devno == 0) && (err == 0x81)) + /* do nothing */ ; + else + return ATA_DEV_NONE; + + /* determine if device is ATA or ATAPI */ + class = ata_dev_classify(&tf); + + if (class == ATA_DEV_UNKNOWN) { + /* If the device failed diagnostic, it's likely to + * have reported incorrect device signature too. + * Assume ATA device if the device seems present but + * device signature is invalid with diagnostic + * failure. + */ + if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC)) + class = ATA_DEV_ATA; + else + class = ATA_DEV_NONE; + } else if ((class == ATA_DEV_ATA) && + (ap->ops->sff_check_status(ap) == 0)) + class = ATA_DEV_NONE; + + return class; +} + +/** + * ata_sff_wait_after_reset - wait for devices to become ready after reset + * @link: SFF link which is just reset + * @devmask: mask of present devices + * @deadline: deadline jiffies for the operation + * + * Wait devices attached to SFF @link to become ready after + * reset. It contains preceding 150ms wait to avoid accessing TF + * status register too early. + * + * LOCKING: + * Kernel thread context (may sleep). + * + * RETURNS: + * 0 on success, -ENODEV if some or all of devices in @devmask + * don't seem to exist. -errno on other errors. + */ +int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask, + unsigned long deadline) +{ + struct ata_port *ap = link->ap; + struct ata_ioports *ioaddr = &ap->ioaddr; + unsigned int dev0 = devmask & (1 << 0); + unsigned int dev1 = devmask & (1 << 1); + int rc, ret = 0; + + msleep(ATA_WAIT_AFTER_RESET_MSECS); + + /* always check readiness of the master device */ + rc = ata_sff_wait_ready(link, deadline); + /* -ENODEV means the odd clown forgot the D7 pulldown resistor + * and TF status is 0xff, bail out on it too. + */ + if (rc) + return rc; + + /* if device 1 was found in ata_devchk, wait for register + * access briefly, then wait for BSY to clear. + */ + if (dev1) { + int i; + + ap->ops->sff_dev_select(ap, 1); + + /* Wait for register access. Some ATAPI devices fail + * to set nsect/lbal after reset, so don't waste too + * much time on it. We're gonna wait for !BSY anyway. + */ + for (i = 0; i < 2; i++) { + u8 nsect, lbal; + + nsect = ioread8(ioaddr->nsect_addr); + lbal = ioread8(ioaddr->lbal_addr); + if ((nsect == 1) && (lbal == 1)) + break; + msleep(50); /* give drive a breather */ + } + + rc = ata_sff_wait_ready(link, deadline); + if (rc) { + if (rc != -ENODEV) + return rc; + ret = rc; + } + } + + /* is all this really necessary? */ + ap->ops->sff_dev_select(ap, 0); + if (dev1) + ap->ops->sff_dev_select(ap, 1); + if (dev0) + ap->ops->sff_dev_select(ap, 0); + + return ret; +} + +static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask, + unsigned long deadline) +{ + struct ata_ioports *ioaddr = &ap->ioaddr; + + DPRINTK("ata%u: bus reset via SRST\n", ap->print_id); + + /* software reset. causes dev0 to be selected */ + iowrite8(ap->ctl, ioaddr->ctl_addr); + udelay(20); /* FIXME: flush */ + iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr); + udelay(20); /* FIXME: flush */ + iowrite8(ap->ctl, ioaddr->ctl_addr); + + /* wait the port to become ready */ + return ata_sff_wait_after_reset(&ap->link, devmask, deadline); +} + +/** + * ata_sff_softreset - reset host port via ATA SRST + * @link: ATA link to reset + * @classes: resulting classes of attached devices + * @deadline: deadline jiffies for the operation + * + * Reset host port using ATA SRST. + * + * LOCKING: + * Kernel thread context (may sleep) + * + * RETURNS: + * 0 on success, -errno otherwise. + */ +int ata_sff_softreset(struct ata_link *link, unsigned int *classes, + unsigned long deadline) +{ + struct ata_port *ap = link->ap; + unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; + unsigned int devmask = 0; + int rc; + u8 err; + + DPRINTK("ENTER\n"); + + /* determine if device 0/1 are present */ + if (ata_devchk(ap, 0)) + devmask |= (1 << 0); + if (slave_possible && ata_devchk(ap, 1)) + devmask |= (1 << 1); + + /* select device 0 again */ + ap->ops->sff_dev_select(ap, 0); + + /* issue bus reset */ + DPRINTK("about to softreset, devmask=%x\n", devmask); + rc = ata_bus_softreset(ap, devmask, deadline); + /* if link is occupied, -ENODEV too is an error */ + if (rc && (rc != -ENODEV || sata_scr_valid(link))) { + ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc); + return rc; + } + + /* determine by signature whether we have ATA or ATAPI devices */ + classes[0] = ata_sff_dev_classify(&link->device[0], + devmask & (1 << 0), &err); + if (slave_possible && err != 0x81) + classes[1] = ata_sff_dev_classify(&link->device[1], + devmask & (1 << 1), &err); + + DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); + return 0; } /** - * ata_bmdma_drive_eh - Perform EH with given methods for BMDMA controller + * sata_sff_hardreset - reset host port via SATA phy reset + * @link: link to reset + * @class: resulting class of attached device + * @deadline: deadline jiffies for the operation + * + * SATA phy-reset host port using DET bits of SControl register, + * wait for !BSY and classify the attached device. + * + * LOCKING: + * Kernel thread context (may sleep) + * + * RETURNS: + * 0 on success, -errno otherwise. + */ +int sata_sff_hardreset(struct ata_link *link, unsigned int *class, + unsigned long deadline) +{ + struct ata_eh_context *ehc = &link->eh_context; + const unsigned long *timing = sata_ehc_deb_timing(ehc); + bool online; + int rc; + + rc = sata_link_hardreset(link, timing, deadline, &online, + ata_sff_check_ready); + if (online) + *class = ata_sff_dev_classify(link->device, 1, NULL); + + DPRINTK("EXIT, class=%u\n", *class); + return rc; +} + +/** + * ata_sff_postreset - SFF postreset callback + * @link: the target SFF ata_link + * @classes: classes of attached devices + * + * This function is invoked after a successful reset. It first + * calls ata_std_postreset() and performs SFF specific postreset + * processing. + * + * LOCKING: + * Kernel thread context (may sleep) + */ +void ata_sff_postreset(struct ata_link *link, unsigned int *classes) +{ + struct ata_port *ap = link->ap; + + ata_std_postreset(link, classes); + + /* is double-select really necessary? */ + if (classes[0] != ATA_DEV_NONE) + ap->ops->sff_dev_select(ap, 1); + if (classes[1] != ATA_DEV_NONE) + ap->ops->sff_dev_select(ap, 0); + + /* bail out if no device is present */ + if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { + DPRINTK("EXIT, no device\n"); + return; + } + + /* set up device control */ + if (ap->ioaddr.ctl_addr) + iowrite8(ap->ctl, ap->ioaddr.ctl_addr); +} + +/** + * ata_sff_error_handler - Stock error handler for BMDMA controller * @ap: port to handle error for - * @prereset: prereset method (can be NULL) - * @softreset: softreset method (can be NULL) - * @hardreset: hardreset method (can be NULL) - * @postreset: postreset method (can be NULL) * - * Handle error for ATA BMDMA controller. It can handle both + * Stock error handler for SFF controller. It can handle both * PATA and SATA controllers. Many controllers should be able to * use this EH as-is or with some added handling before and * after. * - * This function is intended to be used for constructing - * ->error_handler callback by low level drivers. - * * LOCKING: * Kernel thread context (may sleep) */ -void ata_bmdma_drive_eh(struct ata_port *ap, ata_prereset_fn_t prereset, - ata_reset_fn_t softreset, ata_reset_fn_t hardreset, - ata_postreset_fn_t postreset) +void ata_sff_error_handler(struct ata_port *ap) { + ata_reset_fn_t softreset = ap->ops->softreset; + ata_reset_fn_t hardreset = ap->ops->hardreset; struct ata_queued_cmd *qc; unsigned long flags; int thaw = 0; @@ -414,8 +2101,9 @@ void ata_bmdma_drive_eh(struct ata_port *ap, ata_prereset_fn_t prereset, ap->hsm_task_state = HSM_ST_IDLE; - if (qc && (qc->tf.protocol == ATA_PROT_DMA || - qc->tf.protocol == ATA_PROT_ATAPI_DMA)) { + if (ap->ioaddr.bmdma_addr && + qc && (qc->tf.protocol == ATA_PROT_DMA || + qc->tf.protocol == ATAPI_PROT_DMA)) { u8 host_stat; host_stat = ap->ops->bmdma_status(ap); @@ -433,9 +2121,9 @@ void ata_bmdma_drive_eh(struct ata_port *ap, ata_prereset_fn_t prereset, ap->ops->bmdma_stop(qc); } - ata_altstatus(ap); - ata_chk_status(ap); - ap->ops->irq_clear(ap); + ata_sff_sync(ap); /* FIXME: We don't need this */ + ap->ops->sff_check_status(ap); + ap->ops->sff_irq_clear(ap); spin_unlock_irqrestore(ap->lock, flags); @@ -443,39 +2131,27 @@ void ata_bmdma_drive_eh(struct ata_port *ap, ata_prereset_fn_t prereset, ata_eh_thaw_port(ap); /* PIO and DMA engines have been stopped, perform recovery */ - ata_do_eh(ap, prereset, softreset, hardreset, postreset); -} - -/** - * ata_bmdma_error_handler - Stock error handler for BMDMA controller - * @ap: port to handle error for - * - * Stock error handler for BMDMA controller. - * - * LOCKING: - * Kernel thread context (may sleep) - */ -void ata_bmdma_error_handler(struct ata_port *ap) -{ - ata_reset_fn_t hardreset; - hardreset = NULL; - if (sata_scr_valid(&ap->link)) - hardreset = sata_std_hardreset; + /* Ignore ata_sff_softreset if ctl isn't accessible and + * built-in hardresets if SCR access isn't available. + */ + if (softreset == ata_sff_softreset && !ap->ioaddr.ctl_addr) + softreset = NULL; + if (ata_is_builtin_hardreset(hardreset) && !sata_scr_valid(&ap->link)) + hardreset = NULL; - ata_bmdma_drive_eh(ap, ata_std_prereset, ata_std_softreset, hardreset, - ata_std_postreset); + ata_do_eh(ap, ap->ops->prereset, softreset, hardreset, + ap->ops->postreset); } /** - * ata_bmdma_post_internal_cmd - Stock post_internal_cmd for - * BMDMA controller + * ata_sff_post_internal_cmd - Stock post_internal_cmd for SFF controller * @qc: internal command to clean up * * LOCKING: * Kernel thread context (may sleep) */ -void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc) +void ata_sff_post_internal_cmd(struct ata_queued_cmd *qc) { if (qc->ap->ioaddr.bmdma_addr) ata_bmdma_stop(qc); @@ -494,7 +2170,6 @@ void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc) * LOCKING: * Inherited from caller. */ - int ata_sff_port_start(struct ata_port *ap) { if (ap->ioaddr.bmdma_addr) @@ -502,24 +2177,262 @@ int ata_sff_port_start(struct ata_port *ap) return 0; } -#ifdef CONFIG_PCI +/** + * ata_sff_std_ports - initialize ioaddr with standard port offsets. + * @ioaddr: IO address structure to be initialized + * + * Utility function which initializes data_addr, error_addr, + * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, + * device_addr, status_addr, and command_addr to standard offsets + * relative to cmd_addr. + * + * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. + */ +void ata_sff_std_ports(struct ata_ioports *ioaddr) +{ + ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; + ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; + ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; + ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; + ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; + ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; + ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; + ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; + ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; + ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; +} -static int ata_resources_present(struct pci_dev *pdev, int port) +unsigned long ata_bmdma_mode_filter(struct ata_device *adev, + unsigned long xfer_mask) { - int i; + /* Filter out DMA modes if the device has been configured by + the BIOS as PIO only */ - /* Check the PCI resources for this channel are enabled */ - port = port * 2; - for (i = 0; i < 2; i ++) { - if (pci_resource_start(pdev, port + i) == 0 || - pci_resource_len(pdev, port + i) == 0) - return 0; + if (adev->link->ap->ioaddr.bmdma_addr == NULL) + xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); + return xfer_mask; +} + +/** + * ata_bmdma_setup - Set up PCI IDE BMDMA transaction + * @qc: Info associated with this ATA transaction. + * + * LOCKING: + * spin_lock_irqsave(host lock) + */ +void ata_bmdma_setup(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); + u8 dmactl; + + /* load PRD table addr. */ + mb(); /* make sure PRD table writes are visible to controller */ + iowrite32(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS); + + /* specify data direction, triple-check start bit is clear */ + dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); + dmactl &= ~(ATA_DMA_WR | ATA_DMA_START); + if (!rw) + dmactl |= ATA_DMA_WR; + iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); + + /* issue r/w command */ + ap->ops->sff_exec_command(ap, &qc->tf); +} + +/** + * ata_bmdma_start - Start a PCI IDE BMDMA transaction + * @qc: Info associated with this ATA transaction. + * + * LOCKING: + * spin_lock_irqsave(host lock) + */ +void ata_bmdma_start(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + u8 dmactl; + + /* start host DMA transaction */ + dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD); + iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); + + /* Strictly, one may wish to issue an ioread8() here, to + * flush the mmio write. However, control also passes + * to the hardware at this point, and it will interrupt + * us when we are to resume control. So, in effect, + * we don't care when the mmio write flushes. + * Further, a read of the DMA status register _immediately_ + * following the write may not be what certain flaky hardware + * is expected, so I think it is best to not add a readb() + * without first all the MMIO ATA cards/mobos. + * Or maybe I'm just being paranoid. + * + * FIXME: The posting of this write means I/O starts are + * unneccessarily delayed for MMIO + */ +} + +/** + * ata_bmdma_stop - Stop PCI IDE BMDMA transfer + * @qc: Command we are ending DMA for + * + * Clears the ATA_DMA_START flag in the dma control register + * + * May be used as the bmdma_stop() entry in ata_port_operations. + * + * LOCKING: + * spin_lock_irqsave(host lock) + */ +void ata_bmdma_stop(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + void __iomem *mmio = ap->ioaddr.bmdma_addr; + + /* clear start/stop bit */ + iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START, + mmio + ATA_DMA_CMD); + + /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ + ata_sff_dma_pause(ap); +} + +/** + * ata_bmdma_status - Read PCI IDE BMDMA status + * @ap: Port associated with this ATA transaction. + * + * Read and return BMDMA status register. + * + * May be used as the bmdma_status() entry in ata_port_operations. + * + * LOCKING: + * spin_lock_irqsave(host lock) + */ +u8 ata_bmdma_status(struct ata_port *ap) +{ + return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); +} + +/** + * ata_bus_reset - reset host port and associated ATA channel + * @ap: port to reset + * + * This is typically the first time we actually start issuing + * commands to the ATA channel. We wait for BSY to clear, then + * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its + * result. Determine what devices, if any, are on the channel + * by looking at the device 0/1 error register. Look at the signature + * stored in each device's taskfile registers, to determine if + * the device is ATA or ATAPI. + * + * LOCKING: + * PCI/etc. bus probe sem. + * Obtains host lock. + * + * SIDE EFFECTS: + * Sets ATA_FLAG_DISABLED if bus reset fails. + * + * DEPRECATED: + * This function is only for drivers which still use old EH and + * will be removed soon. + */ +void ata_bus_reset(struct ata_port *ap) +{ + struct ata_device *device = ap->link.device; + struct ata_ioports *ioaddr = &ap->ioaddr; + unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; + u8 err; + unsigned int dev0, dev1 = 0, devmask = 0; + int rc; + + DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no); + + /* determine if device 0/1 are present */ + if (ap->flags & ATA_FLAG_SATA_RESET) + dev0 = 1; + else { + dev0 = ata_devchk(ap, 0); + if (slave_possible) + dev1 = ata_devchk(ap, 1); } - return 1; + + if (dev0) + devmask |= (1 << 0); + if (dev1) + devmask |= (1 << 1); + + /* select device 0 again */ + ap->ops->sff_dev_select(ap, 0); + + /* issue bus reset */ + if (ap->flags & ATA_FLAG_SRST) { + rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ); + if (rc && rc != -ENODEV) + goto err_out; + } + + /* + * determine by signature whether we have ATA or ATAPI devices + */ + device[0].class = ata_sff_dev_classify(&device[0], dev0, &err); + if ((slave_possible) && (err != 0x81)) + device[1].class = ata_sff_dev_classify(&device[1], dev1, &err); + + /* is double-select really necessary? */ + if (device[1].class != ATA_DEV_NONE) + ap->ops->sff_dev_select(ap, 1); + if (device[0].class != ATA_DEV_NONE) + ap->ops->sff_dev_select(ap, 0); + + /* if no devices were detected, disable this port */ + if ((device[0].class == ATA_DEV_NONE) && + (device[1].class == ATA_DEV_NONE)) + goto err_out; + + if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { + /* set up device control for ATA_FLAG_SATA_RESET */ + iowrite8(ap->ctl, ioaddr->ctl_addr); + } + + DPRINTK("EXIT\n"); + return; + +err_out: + ata_port_printk(ap, KERN_ERR, "disabling port\n"); + ata_port_disable(ap); + + DPRINTK("EXIT\n"); +} + +#ifdef CONFIG_PCI + +/** + * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex + * @pdev: PCI device + * + * Some PCI ATA devices report simplex mode but in fact can be told to + * enter non simplex mode. This implements the necessary logic to + * perform the task on such devices. Calling it on other devices will + * have -undefined- behaviour. + */ +int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev) +{ + unsigned long bmdma = pci_resource_start(pdev, 4); + u8 simplex; + + if (bmdma == 0) + return -ENOENT; + + simplex = inb(bmdma + 0x02); + outb(simplex & 0x60, bmdma + 0x02); + simplex = inb(bmdma + 0x02); + if (simplex & 0x80) + return -EOPNOTSUPP; + return 0; } /** - * ata_pci_init_bmdma - acquire PCI BMDMA resources and init ATA host + * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host * @host: target ATA host * * Acquire PCI BMDMA resources and initialize @host accordingly. @@ -530,7 +2443,7 @@ static int ata_resources_present(struct pci_dev *pdev, int port) * RETURNS: * 0 on success, -errno otherwise. */ -int ata_pci_init_bmdma(struct ata_host *host) +int ata_pci_bmdma_init(struct ata_host *host) { struct device *gdev = host->dev; struct pci_dev *pdev = to_pci_dev(gdev); @@ -549,7 +2462,7 @@ int ata_pci_init_bmdma(struct ata_host *host) return rc; /* request and iomap DMA region */ - rc = pcim_iomap_regions(pdev, 1 << 4, DRV_NAME); + rc = pcim_iomap_regions(pdev, 1 << 4, dev_driver_string(gdev)); if (rc) { dev_printk(KERN_ERR, gdev, "failed to request/iomap BAR4\n"); return -ENOMEM; @@ -575,6 +2488,19 @@ int ata_pci_init_bmdma(struct ata_host *host) return 0; } +static int ata_resources_present(struct pci_dev *pdev, int port) +{ + int i; + + /* Check the PCI resources for this channel are enabled */ + port = port * 2; + for (i = 0; i < 2; i ++) { + if (pci_resource_start(pdev, port + i) == 0 || + pci_resource_len(pdev, port + i) == 0) + return 0; + } + return 1; +} struct ata_legacy_devres { unsigned int mask; unsigned long cmd_port[2]; @@ -668,7 +2594,7 @@ static int ata_init_legacy_port(struct ata_port *ap, ap->ioaddr.cmd_addr = legacy_dr->cmd_addr[port_no]; ap->ioaddr.altstatus_addr = legacy_dr->ctl_addr[port_no]; ap->ioaddr.ctl_addr = legacy_dr->ctl_addr[port_no]; - ata_std_ports(&ap->ioaddr); + ata_sff_std_ports(&ap->ioaddr); return 0; } @@ -733,7 +2659,7 @@ static int ata_init_legacy_host(struct ata_host *host, int *was_busy) } /** - * ata_pci_init_sff_host - acquire native PCI ATA resources and init host + * ata_pci_sff_init_host - acquire native PCI ATA resources and init host * @host: target ATA host * * Acquire native PCI ATA resources for @host and initialize the @@ -751,7 +2677,7 @@ static int ata_init_legacy_host(struct ata_host *host, int *was_busy) * 0 if at least one port is initialized, -ENODEV if no port is * available. */ -int ata_pci_init_sff_host(struct ata_host *host) +int ata_pci_sff_init_host(struct ata_host *host) { struct device *gdev = host->dev; struct pci_dev *pdev = to_pci_dev(gdev); @@ -776,7 +2702,8 @@ int ata_pci_init_sff_host(struct ata_host *host) continue; } - rc = pcim_iomap_regions(pdev, 0x3 << base, DRV_NAME); + rc = pcim_iomap_regions(pdev, 0x3 << base, + dev_driver_string(gdev)); if (rc) { dev_printk(KERN_WARNING, gdev, "failed to request/iomap BARs for port %d " @@ -792,7 +2719,7 @@ int ata_pci_init_sff_host(struct ata_host *host) ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr = (void __iomem *) ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS); - ata_std_ports(&ap->ioaddr); + ata_sff_std_ports(&ap->ioaddr); ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx", (unsigned long long)pci_resource_start(pdev, base), @@ -810,7 +2737,7 @@ int ata_pci_init_sff_host(struct ata_host *host) } /** - * ata_pci_prepare_sff_host - helper to prepare native PCI ATA host + * ata_pci_sff_prepare_host - helper to prepare native PCI ATA host * @pdev: target PCI device * @ppi: array of port_info, must be enough for two ports * @r_host: out argument for the initialized ATA host @@ -824,7 +2751,7 @@ int ata_pci_init_sff_host(struct ata_host *host) * RETURNS: * 0 on success, -errno otherwise. */ -int ata_pci_prepare_sff_host(struct pci_dev *pdev, +int ata_pci_sff_prepare_host(struct pci_dev *pdev, const struct ata_port_info * const * ppi, struct ata_host **r_host) { @@ -854,7 +2781,7 @@ int ata_pci_prepare_sff_host(struct pci_dev *pdev, } if (!legacy_mode) { - rc = ata_pci_init_sff_host(host); + rc = ata_pci_sff_init_host(host); if (rc) goto err_out; } else { @@ -872,7 +2799,7 @@ int ata_pci_prepare_sff_host(struct pci_dev *pdev, } /* init DMA related stuff */ - rc = ata_pci_init_bmdma(host); + rc = ata_pci_bmdma_init(host); if (rc) goto err_bmdma; @@ -893,71 +2820,36 @@ int ata_pci_prepare_sff_host(struct pci_dev *pdev, } /** - * ata_pci_init_one - Initialize/register PCI IDE host controller - * @pdev: Controller to be initialized - * @ppi: array of port_info, must be enough for two ports + * ata_pci_sff_activate_host - start SFF host, request IRQ and register it + * @host: target SFF ATA host + * @irq_handler: irq_handler used when requesting IRQ(s) + * @sht: scsi_host_template to use when registering the host * - * This is a helper function which can be called from a driver's - * xxx_init_one() probe function if the hardware uses traditional - * IDE taskfile registers. - * - * This function calls pci_enable_device(), reserves its register - * regions, sets the dma mask, enables bus master mode, and calls - * ata_device_add() - * - * ASSUMPTION: - * Nobody makes a single channel controller that appears solely as - * the secondary legacy port on PCI. + * This is the counterpart of ata_host_activate() for SFF ATA + * hosts. This separate helper is necessary because SFF hosts + * use two separate interrupts in legacy mode. * * LOCKING: - * Inherited from PCI layer (may sleep). + * Inherited from calling layer (may sleep). * * RETURNS: - * Zero on success, negative on errno-based value on error. + * 0 on success, -errno otherwise. */ -int ata_pci_init_one(struct pci_dev *pdev, - const struct ata_port_info * const * ppi) +int ata_pci_sff_activate_host(struct ata_host *host, + irq_handler_t irq_handler, + struct scsi_host_template *sht) { - struct device *dev = &pdev->dev; - const struct ata_port_info *pi = NULL; - struct ata_host *host = NULL; - u8 mask; - int legacy_mode = 0; - int i, rc; - - DPRINTK("ENTER\n"); - - /* look up the first valid port_info */ - for (i = 0; i < 2 && ppi[i]; i++) { - if (ppi[i]->port_ops != &ata_dummy_port_ops) { - pi = ppi[i]; - break; - } - } - - if (!pi) { - dev_printk(KERN_ERR, &pdev->dev, - "no valid port_info specified\n"); - return -EINVAL; - } - - if (!devres_open_group(dev, NULL, GFP_KERNEL)) - return -ENOMEM; + struct device *dev = host->dev; + struct pci_dev *pdev = to_pci_dev(dev); + const char *drv_name = dev_driver_string(host->dev); + int legacy_mode = 0, rc; - /* FIXME: Really for ATA it isn't safe because the device may be - multi-purpose and we want to leave it alone if it was already - enabled. Secondly for shared use as Arjan says we want refcounting - - Checking dev->is_enabled is insufficient as this is not set at - boot for the primary video which is BIOS enabled - */ - - rc = pcim_enable_device(pdev); + rc = ata_host_start(host); if (rc) - goto err_out; + return rc; if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) { - u8 tmp8; + u8 tmp8, mask; /* TODO: What if one channel is in native mode ... */ pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8); @@ -970,42 +2862,29 @@ int ata_pci_init_one(struct pci_dev *pdev, left a device in compatibility mode */ if (legacy_mode) { printk(KERN_ERR "ata: Compatibility mode ATA is not supported on this platform, skipping.\n"); - rc = -EOPNOTSUPP; - goto err_out; + return -EOPNOTSUPP; } #endif } - /* prepare host */ - rc = ata_pci_prepare_sff_host(pdev, ppi, &host); - if (rc) - goto err_out; - - pci_set_master(pdev); - - /* start host and request IRQ */ - rc = ata_host_start(host); - if (rc) - goto err_out; + if (!devres_open_group(dev, NULL, GFP_KERNEL)) + return -ENOMEM; if (!legacy_mode && pdev->irq) { - /* We may have no IRQ assigned in which case we can poll. This - shouldn't happen on a sane system but robustness is cheap - in this case */ - rc = devm_request_irq(dev, pdev->irq, pi->port_ops->irq_handler, - IRQF_SHARED, DRV_NAME, host); + rc = devm_request_irq(dev, pdev->irq, irq_handler, + IRQF_SHARED, drv_name, host); if (rc) - goto err_out; + goto out; ata_port_desc(host->ports[0], "irq %d", pdev->irq); ata_port_desc(host->ports[1], "irq %d", pdev->irq); } else if (legacy_mode) { if (!ata_port_is_dummy(host->ports[0])) { rc = devm_request_irq(dev, ATA_PRIMARY_IRQ(pdev), - pi->port_ops->irq_handler, - IRQF_SHARED, DRV_NAME, host); + irq_handler, IRQF_SHARED, + drv_name, host); if (rc) - goto err_out; + goto out; ata_port_desc(host->ports[0], "irq %d", ATA_PRIMARY_IRQ(pdev)); @@ -1013,64 +2892,147 @@ int ata_pci_init_one(struct pci_dev *pdev, if (!ata_port_is_dummy(host->ports[1])) { rc = devm_request_irq(dev, ATA_SECONDARY_IRQ(pdev), - pi->port_ops->irq_handler, - IRQF_SHARED, DRV_NAME, host); + irq_handler, IRQF_SHARED, + drv_name, host); if (rc) - goto err_out; + goto out; ata_port_desc(host->ports[1], "irq %d", ATA_SECONDARY_IRQ(pdev)); } } - /* register */ - rc = ata_host_register(host, pi->sht); - if (rc) - goto err_out; - - devres_remove_group(dev, NULL); - return 0; + rc = ata_host_register(host, sht); + out: + if (rc == 0) + devres_remove_group(dev, NULL); + else + devres_release_group(dev, NULL); -err_out: - devres_release_group(dev, NULL); return rc; } /** - * ata_pci_clear_simplex - attempt to kick device out of simplex - * @pdev: PCI device + * ata_pci_sff_init_one - Initialize/register PCI IDE host controller + * @pdev: Controller to be initialized + * @ppi: array of port_info, must be enough for two ports + * @sht: scsi_host_template to use when registering the host + * @host_priv: host private_data * - * Some PCI ATA devices report simplex mode but in fact can be told to - * enter non simplex mode. This implements the necessary logic to - * perform the task on such devices. Calling it on other devices will - * have -undefined- behaviour. + * This is a helper function which can be called from a driver's + * xxx_init_one() probe function if the hardware uses traditional + * IDE taskfile registers. + * + * This function calls pci_enable_device(), reserves its register + * regions, sets the dma mask, enables bus master mode, and calls + * ata_device_add() + * + * ASSUMPTION: + * Nobody makes a single channel controller that appears solely as + * the secondary legacy port on PCI. + * + * LOCKING: + * Inherited from PCI layer (may sleep). + * + * RETURNS: + * Zero on success, negative on errno-based value on error. */ - -int ata_pci_clear_simplex(struct pci_dev *pdev) +int ata_pci_sff_init_one(struct pci_dev *pdev, + const struct ata_port_info * const * ppi, + struct scsi_host_template *sht, void *host_priv) { - unsigned long bmdma = pci_resource_start(pdev, 4); - u8 simplex; + struct device *dev = &pdev->dev; + const struct ata_port_info *pi = NULL; + struct ata_host *host = NULL; + int i, rc; - if (bmdma == 0) - return -ENOENT; + DPRINTK("ENTER\n"); - simplex = inb(bmdma + 0x02); - outb(simplex & 0x60, bmdma + 0x02); - simplex = inb(bmdma + 0x02); - if (simplex & 0x80) - return -EOPNOTSUPP; - return 0; -} + /* look up the first valid port_info */ + for (i = 0; i < 2 && ppi[i]; i++) { + if (ppi[i]->port_ops != &ata_dummy_port_ops) { + pi = ppi[i]; + break; + } + } -unsigned long ata_pci_default_filter(struct ata_device *adev, unsigned long xfer_mask) -{ - /* Filter out DMA modes if the device has been configured by - the BIOS as PIO only */ + if (!pi) { + dev_printk(KERN_ERR, &pdev->dev, + "no valid port_info specified\n"); + return -EINVAL; + } - if (adev->link->ap->ioaddr.bmdma_addr == NULL) - xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); - return xfer_mask; + if (!devres_open_group(dev, NULL, GFP_KERNEL)) + return -ENOMEM; + + rc = pcim_enable_device(pdev); + if (rc) + goto out; + + /* prepare and activate SFF host */ + rc = ata_pci_sff_prepare_host(pdev, ppi, &host); + if (rc) + goto out; + host->private_data = host_priv; + + pci_set_master(pdev); + rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht); + out: + if (rc == 0) + devres_remove_group(&pdev->dev, NULL); + else + devres_release_group(&pdev->dev, NULL); + + return rc; } #endif /* CONFIG_PCI */ +EXPORT_SYMBOL_GPL(ata_sff_port_ops); +EXPORT_SYMBOL_GPL(ata_bmdma_port_ops); +EXPORT_SYMBOL_GPL(ata_sff_qc_prep); +EXPORT_SYMBOL_GPL(ata_sff_dumb_qc_prep); +EXPORT_SYMBOL_GPL(ata_sff_dev_select); +EXPORT_SYMBOL_GPL(ata_sff_check_status); +EXPORT_SYMBOL_GPL(ata_sff_dma_pause); +EXPORT_SYMBOL_GPL(ata_sff_pause); +EXPORT_SYMBOL_GPL(ata_sff_busy_sleep); +EXPORT_SYMBOL_GPL(ata_sff_wait_ready); +EXPORT_SYMBOL_GPL(ata_sff_tf_load); +EXPORT_SYMBOL_GPL(ata_sff_tf_read); +EXPORT_SYMBOL_GPL(ata_sff_exec_command); +EXPORT_SYMBOL_GPL(ata_sff_data_xfer); +EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq); +EXPORT_SYMBOL_GPL(ata_sff_irq_on); +EXPORT_SYMBOL_GPL(ata_sff_irq_clear); +EXPORT_SYMBOL_GPL(ata_sff_hsm_move); +EXPORT_SYMBOL_GPL(ata_sff_qc_issue); +EXPORT_SYMBOL_GPL(ata_sff_qc_fill_rtf); +EXPORT_SYMBOL_GPL(ata_sff_host_intr); +EXPORT_SYMBOL_GPL(ata_sff_interrupt); +EXPORT_SYMBOL_GPL(ata_sff_freeze); +EXPORT_SYMBOL_GPL(ata_sff_thaw); +EXPORT_SYMBOL_GPL(ata_sff_prereset); +EXPORT_SYMBOL_GPL(ata_sff_dev_classify); +EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset); +EXPORT_SYMBOL_GPL(ata_sff_softreset); +EXPORT_SYMBOL_GPL(sata_sff_hardreset); +EXPORT_SYMBOL_GPL(ata_sff_postreset); +EXPORT_SYMBOL_GPL(ata_sff_error_handler); +EXPORT_SYMBOL_GPL(ata_sff_post_internal_cmd); +EXPORT_SYMBOL_GPL(ata_sff_port_start); +EXPORT_SYMBOL_GPL(ata_sff_std_ports); +EXPORT_SYMBOL_GPL(ata_bmdma_mode_filter); +EXPORT_SYMBOL_GPL(ata_bmdma_setup); +EXPORT_SYMBOL_GPL(ata_bmdma_start); +EXPORT_SYMBOL_GPL(ata_bmdma_stop); +EXPORT_SYMBOL_GPL(ata_bmdma_status); +EXPORT_SYMBOL_GPL(ata_bus_reset); +#ifdef CONFIG_PCI +EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex); +EXPORT_SYMBOL_GPL(ata_pci_bmdma_init); +EXPORT_SYMBOL_GPL(ata_pci_sff_init_host); +EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host); +EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host); +EXPORT_SYMBOL_GPL(ata_pci_sff_init_one); +#endif /* CONFIG_PCI */ diff --git a/drivers/ata/libata.h b/drivers/ata/libata.h index e6ef0d1..265d2c8 100644 --- a/drivers/ata/libata.h +++ b/drivers/ata/libata.h @@ -38,6 +38,17 @@ struct ata_scsi_args { void (*done)(struct scsi_cmnd *); }; +static inline int ata_is_builtin_hardreset(ata_reset_fn_t reset) +{ + if (reset == sata_std_hardreset) + return 1; +#ifdef CONFIG_ATA_SFF + if (reset == sata_sff_hardreset) + return 1; +#endif + return 0; +} + /* libata-core.c */ enum { /* flags for ata_dev_read_id() */ @@ -54,19 +65,23 @@ enum { }; extern unsigned int ata_print_id; -extern struct workqueue_struct *ata_wq; extern struct workqueue_struct *ata_aux_wq; extern int atapi_enabled; -extern int atapi_dmadir; extern int atapi_passthru16; extern int libata_fua; extern int libata_noacpi; +extern int libata_allow_tpm; +extern void ata_force_cbl(struct ata_port *ap); +extern u64 ata_tf_to_lba(const struct ata_taskfile *tf); +extern u64 ata_tf_to_lba48(const struct ata_taskfile *tf); extern struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev); extern int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev, u64 block, u32 n_block, unsigned int tf_flags, unsigned int tag); extern u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev); extern void ata_dev_disable(struct ata_device *dev); +extern void ata_pio_queue_task(struct ata_port *ap, void *data, + unsigned long delay); extern void ata_port_flush_task(struct ata_port *ap); extern unsigned ata_exec_internal(struct ata_device *dev, struct ata_taskfile *tf, const u8 *cdb, @@ -77,6 +92,8 @@ extern unsigned ata_exec_internal_sg(struct ata_device *dev, int dma_dir, struct scatterlist *sg, unsigned int n_elem, unsigned long timeout); extern unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd); +extern int ata_wait_ready(struct ata_link *link, unsigned long deadline, + int (*check_ready)(struct ata_link *link)); extern int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, unsigned int flags, u16 *id); extern int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags); @@ -84,18 +101,13 @@ extern int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class, unsigned int readid_flags); extern int ata_dev_configure(struct ata_device *dev); extern int sata_down_spd_limit(struct ata_link *link); -extern int sata_set_spd_needed(struct ata_link *link); extern int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel); -extern int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev); extern void ata_sg_clean(struct ata_queued_cmd *qc); extern void ata_qc_free(struct ata_queued_cmd *qc); extern void ata_qc_issue(struct ata_queued_cmd *qc); extern void __ata_qc_complete(struct ata_queued_cmd *qc); extern int ata_check_atapi_dma(struct ata_queued_cmd *qc); -extern void ata_dev_select(struct ata_port *ap, unsigned int device, - unsigned int wait, unsigned int can_sleep); extern void swap_buf_le16(u16 *buf, unsigned int buf_words); -extern int ata_flush_cache(struct ata_device *dev); extern void ata_dev_init(struct ata_device *dev); extern void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp); extern int sata_link_init_spd(struct ata_link *link); @@ -114,6 +126,7 @@ extern int ata_acpi_on_suspend(struct ata_port *ap); extern void ata_acpi_on_resume(struct ata_port *ap); extern int ata_acpi_on_devcfg(struct ata_device *dev); extern void ata_acpi_on_disable(struct ata_device *dev); +extern void ata_acpi_set_state(struct ata_port *ap, pm_message_t state); #else static inline void ata_acpi_associate_sata_port(struct ata_port *ap) { } static inline void ata_acpi_associate(struct ata_host *host) { } @@ -122,6 +135,8 @@ static inline int ata_acpi_on_suspend(struct ata_port *ap) { return 0; } static inline void ata_acpi_on_resume(struct ata_port *ap) { } static inline int ata_acpi_on_devcfg(struct ata_device *dev) { return 0; } static inline void ata_acpi_on_disable(struct ata_device *dev) { } +static inline void ata_acpi_set_state(struct ata_port *ap, + pm_message_t state) { } #endif /* libata-scsi.c */ @@ -130,44 +145,11 @@ extern int ata_scsi_add_hosts(struct ata_host *host, extern void ata_scsi_scan_host(struct ata_port *ap, int sync); extern int ata_scsi_offline_dev(struct ata_device *dev); extern void ata_scsi_media_change_notify(struct ata_device *dev); -extern void ata_scsi_hotplug(void *); -extern unsigned int ata_scsiop_inq_std(struct ata_scsi_args *args, u8 *rbuf, - unsigned int buflen); - -extern unsigned int ata_scsiop_inq_00(struct ata_scsi_args *args, u8 *rbuf, - unsigned int buflen); - -extern unsigned int ata_scsiop_inq_80(struct ata_scsi_args *args, u8 *rbuf, - unsigned int buflen); -extern unsigned int ata_scsiop_inq_83(struct ata_scsi_args *args, u8 *rbuf, - unsigned int buflen); -extern unsigned int ata_scsiop_noop(struct ata_scsi_args *args, u8 *rbuf, - unsigned int buflen); -extern unsigned int ata_scsiop_sync_cache(struct ata_scsi_args *args, u8 *rbuf, - unsigned int buflen); -extern unsigned int ata_scsiop_mode_sense(struct ata_scsi_args *args, u8 *rbuf, - unsigned int buflen); -extern unsigned int ata_scsiop_read_cap(struct ata_scsi_args *args, u8 *rbuf, - unsigned int buflen); -extern unsigned int ata_scsiop_report_luns(struct ata_scsi_args *args, u8 *rbuf, - unsigned int buflen); -extern void ata_scsi_badcmd(struct scsi_cmnd *cmd, - void (*done)(struct scsi_cmnd *), - u8 asc, u8 ascq); -extern void ata_scsi_set_sense(struct scsi_cmnd *cmd, - u8 sk, u8 asc, u8 ascq); -extern void ata_scsi_rbuf_fill(struct ata_scsi_args *args, - unsigned int (*actor) (struct ata_scsi_args *args, - u8 *rbuf, unsigned int buflen)); +extern void ata_scsi_hotplug(void *data); extern void ata_schedule_scsi_eh(struct Scsi_Host *shost); -extern void ata_scsi_dev_rescan(void *); +extern void ata_scsi_dev_rescan(void *data); extern int ata_bus_probe(struct ata_port *ap); -/* libata-pmp.c */ -extern int sata_pmp_scr_read(struct ata_link *link, int reg, u32 *val); -extern int sata_pmp_scr_write(struct ata_link *link, int reg, u32 val); -extern int sata_pmp_attach(struct ata_device *dev); - /* libata-eh.c */ extern enum scsi_eh_timer_return ata_scsi_timed_out(struct scsi_cmnd *cmd); extern void ata_scsi_error(struct Scsi_Host *host); @@ -184,14 +166,41 @@ extern void ata_eh_report(struct ata_port *ap); extern int ata_eh_reset(struct ata_link *link, int classify, ata_prereset_fn_t prereset, ata_reset_fn_t softreset, ata_reset_fn_t hardreset, ata_postreset_fn_t postreset); +extern int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev); extern int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset, ata_reset_fn_t softreset, ata_reset_fn_t hardreset, ata_postreset_fn_t postreset, struct ata_link **r_failed_disk); extern void ata_eh_finish(struct ata_port *ap); +/* libata-pmp.c */ +#ifdef CONFIG_SATA_PMP +extern int sata_pmp_scr_read(struct ata_link *link, int reg, u32 *val); +extern int sata_pmp_scr_write(struct ata_link *link, int reg, u32 val); +extern int sata_pmp_attach(struct ata_device *dev); +#else /* CONFIG_SATA_PMP */ +static inline int sata_pmp_scr_read(struct ata_link *link, int reg, u32 *val) +{ + return -EINVAL; +} + +static inline int sata_pmp_scr_write(struct ata_link *link, int reg, u32 val) +{ + return -EINVAL; +} + +static inline int sata_pmp_attach(struct ata_device *dev) +{ + return -EINVAL; +} +#endif /* CONFIG_SATA_PMP */ + /* libata-sff.c */ +#ifdef CONFIG_ATA_SFF +extern void ata_dev_select(struct ata_port *ap, unsigned int device, + unsigned int wait, unsigned int can_sleep); extern u8 ata_irq_on(struct ata_port *ap); - +extern void ata_pio_task(void *_data); +#endif /* CONFIG_ATA_SFF */ #endif /* __LIBATA_H__ */ diff --git a/drivers/ata/pata_acpi.c b/drivers/ata/pata_acpi.c index e4542ab..fbe6057 100644 --- a/drivers/ata/pata_acpi.c +++ b/drivers/ata/pata_acpi.c @@ -47,7 +47,7 @@ static int pacpi_pre_reset(struct ata_link *link, unsigned long deadline) if (ap->acpi_handle == NULL || ata_acpi_gtm(ap, &acpi->gtm) < 0) return -ENODEV; - return ata_std_prereset(link, deadline); + return ata_sff_prereset(link, deadline); } /** @@ -68,31 +68,6 @@ static int pacpi_cable_detect(struct ata_port *ap) } /** - * pacpi_error_handler - Setup and error handler - * @ap: Port to handle - * - * LOCKING: - * None (inherited from caller). - */ - -static void pacpi_error_handler(struct ata_port *ap) -{ - return ata_bmdma_drive_eh(ap, pacpi_pre_reset, ata_std_softreset, - NULL, ata_std_postreset); -} - -/* Welcome to ACPI, bring a bucket */ -static const unsigned int pio_cycle[7] = { - 600, 383, 240, 180, 120, 100, 80 -}; -static const unsigned int mwdma_cycle[5] = { - 480, 150, 120, 100, 80 -}; -static const unsigned int udma_cycle[7] = { - 120, 80, 60, 45, 30, 20, 15 -}; - -/** * pacpi_discover_modes - filter non ACPI modes * @adev: ATA device * @mask: proposed modes @@ -103,56 +78,20 @@ static const unsigned int udma_cycle[7] = { static unsigned long pacpi_discover_modes(struct ata_port *ap, struct ata_device *adev) { - int unit = adev->devno; struct pata_acpi *acpi = ap->private_data; - int i; - u32 t; - unsigned long mask = (0x7f << ATA_SHIFT_UDMA) | (0x7 << ATA_SHIFT_MWDMA) | (0x1F << ATA_SHIFT_PIO); - struct ata_acpi_gtm probe; + unsigned int xfer_mask; probe = acpi->gtm; - /* We always use the 0 slot for crap hardware */ - if (!(probe.flags & 0x10)) - unit = 0; - ata_acpi_gtm(ap, &probe); - /* Start by scanning for PIO modes */ - for (i = 0; i < 7; i++) { - t = probe.drive[unit].pio; - if (t <= pio_cycle[i]) { - mask |= (2 << (ATA_SHIFT_PIO + i)) - 1; - break; - } - } + xfer_mask = ata_acpi_gtm_xfermask(adev, &probe); - /* See if we have MWDMA or UDMA data. We don't bother with MWDMA - if UDMA is availabe as this means the BIOS set UDMA and our - error changedown if it works is UDMA to PIO anyway */ - if (probe.flags & (1 << (2 * unit))) { - /* MWDMA */ - for (i = 0; i < 5; i++) { - t = probe.drive[unit].dma; - if (t <= mwdma_cycle[i]) { - mask |= (2 << (ATA_SHIFT_MWDMA + i)) - 1; - break; - } - } - } else { - /* UDMA */ - for (i = 0; i < 7; i++) { - t = probe.drive[unit].dma; - if (t <= udma_cycle[i]) { - mask |= (2 << (ATA_SHIFT_UDMA + i)) - 1; - break; - } - } - } - if (mask & (0xF8 << ATA_SHIFT_UDMA)) + if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA)) ap->cbl = ATA_CBL_PATA80; - return mask; + + return xfer_mask; } /** @@ -167,7 +106,7 @@ static unsigned long pacpi_discover_modes(struct ata_port *ap, struct ata_device static unsigned long pacpi_mode_filter(struct ata_device *adev, unsigned long mask) { struct pata_acpi *acpi = adev->link->ap->private_data; - return ata_pci_default_filter(adev, mask & acpi->mask[adev->devno]); + return ata_bmdma_mode_filter(adev, mask & acpi->mask[adev->devno]); } /** @@ -180,12 +119,14 @@ static void pacpi_set_piomode(struct ata_port *ap, struct ata_device *adev) { int unit = adev->devno; struct pata_acpi *acpi = ap->private_data; + const struct ata_timing *t; if (!(acpi->gtm.flags & 0x10)) unit = 0; /* Now stuff the nS values into the structure */ - acpi->gtm.drive[unit].pio = pio_cycle[adev->pio_mode - XFER_PIO_0]; + t = ata_timing_find_mode(adev->pio_mode); + acpi->gtm.drive[unit].pio = t->cycle; ata_acpi_stm(ap, &acpi->gtm); /* See what mode we actually got */ ata_acpi_gtm(ap, &acpi->gtm); @@ -201,16 +142,18 @@ static void pacpi_set_dmamode(struct ata_port *ap, struct ata_device *adev) { int unit = adev->devno; struct pata_acpi *acpi = ap->private_data; + const struct ata_timing *t; if (!(acpi->gtm.flags & 0x10)) unit = 0; /* Now stuff the nS values into the structure */ + t = ata_timing_find_mode(adev->dma_mode); if (adev->dma_mode >= XFER_UDMA_0) { - acpi->gtm.drive[unit].dma = udma_cycle[adev->dma_mode - XFER_UDMA_0]; + acpi->gtm.drive[unit].dma = t->udma; acpi->gtm.flags |= (1 << (2 * unit)); } else { - acpi->gtm.drive[unit].dma = mwdma_cycle[adev->dma_mode - XFER_MW_DMA_0]; + acpi->gtm.drive[unit].dma = t->cycle; acpi->gtm.flags &= ~(1 << (2 * unit)); } ata_acpi_stm(ap, &acpi->gtm); @@ -219,7 +162,7 @@ static void pacpi_set_dmamode(struct ata_port *ap, struct ata_device *adev) } /** - * pacpi_qc_issue_prot - command issue + * pacpi_qc_issue - command issue * @qc: command pending * * Called when the libata layer is about to issue a command. We wrap @@ -227,14 +170,14 @@ static void pacpi_set_dmamode(struct ata_port *ap, struct ata_device *adev) * neccessary. */ -static unsigned int pacpi_qc_issue_prot(struct ata_queued_cmd *qc) +static unsigned int pacpi_qc_issue(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct ata_device *adev = qc->dev; struct pata_acpi *acpi = ap->private_data; if (acpi->gtm.flags & 0x10) - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); if (adev != acpi->last) { pacpi_set_piomode(ap, adev); @@ -242,7 +185,7 @@ static unsigned int pacpi_qc_issue_prot(struct ata_queued_cmd *qc) pacpi_set_dmamode(ap, adev); acpi->last = adev; } - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } /** @@ -275,57 +218,17 @@ static int pacpi_port_start(struct ata_port *ap) } static struct scsi_host_template pacpi_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - /* Use standard CHS mapping rules */ - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations pacpi_ops = { +static struct ata_port_operations pacpi_ops = { + .inherits = &ata_bmdma_port_ops, + .qc_issue = pacpi_qc_issue, + .cable_detect = pacpi_cable_detect, + .mode_filter = pacpi_mode_filter, .set_piomode = pacpi_set_piomode, .set_dmamode = pacpi_set_dmamode, - .mode_filter = pacpi_mode_filter, - - /* Task file is PCI ATA format, use helpers */ - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = pacpi_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = pacpi_cable_detect, - - /* BMDMA handling is PCI ATA format, use helpers */ - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = pacpi_qc_issue_prot, - .data_xfer = ata_data_xfer, - - /* Timeout handling */ - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - /* Generic PATA PCI ATA helpers */ + .prereset = pacpi_pre_reset, .port_start = pacpi_port_start, }; @@ -347,7 +250,6 @@ static const struct ata_port_operations pacpi_ops = { static int pacpi_init_one (struct pci_dev *pdev, const struct pci_device_id *id) { static const struct ata_port_info info = { - .sht = &pacpi_sht, .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, .pio_mask = 0x1f, @@ -357,7 +259,13 @@ static int pacpi_init_one (struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &pacpi_ops, }; const struct ata_port_info *ppi[] = { &info, NULL }; - return ata_pci_init_one(pdev, ppi); + if (pdev->vendor == PCI_VENDOR_ID_ATI) { + int rc = pcim_enable_device(pdev); + if (rc < 0) + return rc; + pcim_pin_device(pdev); + } + return ata_pci_sff_init_one(pdev, ppi, &pacpi_sht, NULL); } static const struct pci_device_id pacpi_pci_tbl[] = { diff --git a/drivers/ata/pata_ali.c b/drivers/ata/pata_ali.c index 756f5b0..0f3e659 100644 --- a/drivers/ata/pata_ali.c +++ b/drivers/ata/pata_ali.c @@ -36,11 +36,15 @@ #define DRV_NAME "pata_ali" #define DRV_VERSION "0.7.5" +static int ali_atapi_dma = 0; +module_param_named(atapi_dma, ali_atapi_dma, int, 0644); +MODULE_PARM_DESC(atapi_dma, "Enable ATAPI DMA (0=disable, 1=enable)"); + /* * Cable special cases */ -static struct dmi_system_id cable_dmi_table[] = { +static const struct dmi_system_id cable_dmi_table[] = { { .ident = "HP Pavilion N5430", .matches = { @@ -64,7 +68,7 @@ static int ali_cable_override(struct pci_dev *pdev) if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF) return 1; /* Mitac 8317 (Winbook-A) and relatives */ - if (pdev->subsystem_vendor == 0x1071 && pdev->subsystem_device == 0x8317) + if (pdev->subsystem_vendor == 0x1071 && pdev->subsystem_device == 0x8317) return 1; /* Systems by DMI */ if (dmi_check_system(cable_dmi_table)) @@ -117,7 +121,7 @@ static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask) ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); if (strstr(model_num, "WDC")) return mask &= ~ATA_MASK_UDMA; - return ata_pci_default_filter(adev, mask); + return ata_bmdma_mode_filter(adev, mask); } /** @@ -173,11 +177,11 @@ static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, stru u8 udma; if (t != NULL) { - t->setup = FIT(t->setup, 1, 8) & 7; - t->act8b = FIT(t->act8b, 1, 8) & 7; - t->rec8b = FIT(t->rec8b, 1, 16) & 15; - t->active = FIT(t->active, 1, 8) & 7; - t->recover = FIT(t->recover, 1, 16) & 15; + t->setup = clamp_val(t->setup, 1, 8) & 7; + t->act8b = clamp_val(t->act8b, 1, 8) & 7; + t->rec8b = clamp_val(t->rec8b, 1, 16) & 15; + t->active = clamp_val(t->active, 1, 8) & 7; + t->recover = clamp_val(t->recover, 1, 16) & 15; pci_write_config_byte(pdev, cas, t->setup); pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b); @@ -270,6 +274,27 @@ static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev) } /** + * ali_warn_atapi_dma - Warn about ATAPI DMA disablement + * @adev: Device + * + * Whine about ATAPI DMA disablement if @adev is an ATAPI device. + * Can be used as ->dev_config. + */ + +static void ali_warn_atapi_dma(struct ata_device *adev) +{ + struct ata_eh_context *ehc = &adev->link->eh_context; + int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; + + if (print_info && adev->class == ATA_DEV_ATAPI && !ali_atapi_dma) { + ata_dev_printk(adev, KERN_WARNING, + "WARNING: ATAPI DMA disabled for reliablity issues. It can be enabled\n"); + ata_dev_printk(adev, KERN_WARNING, + "WARNING: via pata_ali.atapi_dma modparam or corresponding sysfs node.\n"); + } +} + +/** * ali_lock_sectors - Keep older devices to 255 sector mode * @adev: Device * @@ -283,6 +308,7 @@ static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev) static void ali_lock_sectors(struct ata_device *adev) { adev->max_sectors = 255; + ali_warn_atapi_dma(adev); } /** @@ -294,28 +320,26 @@ static void ali_lock_sectors(struct ata_device *adev) static int ali_check_atapi_dma(struct ata_queued_cmd *qc) { + if (!ali_atapi_dma) { + /* FIXME: pata_ali can't do ATAPI DMA reliably but the + * IDE alim15x3 driver can. I tried lots of things + * but couldn't find what the actual difference was. + * If you got an idea, please write it to + * linux-ide@vger.kernel.org and cc htejun@gmail.com. + * + * Disable ATAPI DMA for now. + */ + return -EOPNOTSUPP; + } + /* If its not a media command, its not worth it */ - if (qc->nbytes < 2048) + if (atapi_cmd_type(qc->cdb[0]) == ATAPI_MISC) return -EOPNOTSUPP; return 0; } static struct scsi_host_template ali_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; /* @@ -323,29 +347,15 @@ static struct scsi_host_template ali_sht = { */ static struct ata_port_operations ali_early_port_ops = { - .set_piomode = ali_set_piomode, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, + .inherits = &ata_sff_port_ops, .cable_detect = ata_cable_40wire, + .set_piomode = ali_set_piomode, +}; - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, +static const struct ata_port_operations ali_dma_base_ops = { + .inherits = &ata_bmdma_port_ops, + .set_piomode = ali_set_piomode, + .set_dmamode = ali_set_dmamode, }; /* @@ -353,113 +363,31 @@ static struct ata_port_operations ali_early_port_ops = { * detect */ static struct ata_port_operations ali_20_port_ops = { - .set_piomode = ali_set_piomode, - .set_dmamode = ali_set_dmamode, + .inherits = &ali_dma_base_ops, + .cable_detect = ata_cable_40wire, .mode_filter = ali_20_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, + .check_atapi_dma = ali_check_atapi_dma, .dev_config = ali_lock_sectors, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; /* * Port operations for DMA capable ALi with cable detect */ static struct ata_port_operations ali_c2_port_ops = { - .set_piomode = ali_set_piomode, - .set_dmamode = ali_set_dmamode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, + .inherits = &ali_dma_base_ops, .check_atapi_dma = ali_check_atapi_dma, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - .dev_config = ali_lock_sectors, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, .cable_detect = ali_c2_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .dev_config = ali_lock_sectors, }; /* * Port operations for DMA capable ALi with cable detect and LBA48 */ static struct ata_port_operations ali_c5_port_ops = { - .set_piomode = ali_set_piomode, - .set_dmamode = ali_set_dmamode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, + .inherits = &ali_dma_base_ops, .check_atapi_dma = ali_check_atapi_dma, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, + .dev_config = ali_warn_atapi_dma, .cable_detect = ali_c2_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; @@ -475,22 +403,19 @@ static void ali_init_chipset(struct pci_dev *pdev) { u8 tmp; struct pci_dev *north, *isa_bridge; - u8 pdev_revision; /* * The chipset revision selects the driver operations and * mode data. */ - pci_read_config_byte(pdev, PCI_REVISION_ID, &pdev_revision); - - if (pdev_revision >= 0x20 && pdev_revision < 0xC2) { + if (pdev->revision >= 0x20 && pdev->revision < 0xC2) { /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */ pci_read_config_byte(pdev, 0x4B, &tmp); /* Clear CD-ROM DMA write bit */ tmp &= 0x7F; pci_write_config_byte(pdev, 0x4B, tmp); - } else if (pdev_revision >= 0xC2) { + } else if (pdev->revision >= 0xC2) { /* Enable cable detection logic */ pci_read_config_byte(pdev, 0x4B, &tmp); pci_write_config_byte(pdev, 0x4B, tmp | 0x08); @@ -502,21 +427,21 @@ static void ali_init_chipset(struct pci_dev *pdev) /* Configure the ALi bridge logic. For non ALi rely on BIOS. Set the south bridge enable bit */ pci_read_config_byte(isa_bridge, 0x79, &tmp); - if (pdev_revision == 0xC2) + if (pdev->revision == 0xC2) pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04); - else if (pdev_revision > 0xC2 && pdev_revision < 0xC5) + else if (pdev->revision > 0xC2 && pdev->revision < 0xC5) pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02); } - if (pdev_revision >= 0x20) { + if (pdev->revision >= 0x20) { /* * CD_ROM DMA on (0x53 bit 0). Enable this even if we want * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control * via 0x54/55. */ pci_read_config_byte(pdev, 0x53, &tmp); - if (pdev_revision <= 0x20) + if (pdev->revision <= 0x20) tmp &= ~0x02; - if (pdev_revision >= 0xc7) + if (pdev->revision >= 0xc7) tmp |= 0x03; else tmp |= 0x01; /* CD_ROM enable for DMA */ @@ -524,7 +449,7 @@ static void ali_init_chipset(struct pci_dev *pdev) } pci_dev_put(isa_bridge); pci_dev_put(north); - ata_pci_clear_simplex(pdev); + ata_pci_bmdma_clear_simplex(pdev); } /** * ali_init_one - discovery callback @@ -537,16 +462,13 @@ static void ali_init_chipset(struct pci_dev *pdev) static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) { - u8 pdev_revision; static const struct ata_port_info info_early = { - .sht = &ali_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .port_ops = &ali_early_port_ops }; /* Revision 0x20 added DMA */ static const struct ata_port_info info_20 = { - .sht = &ali_sht, .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -554,7 +476,6 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) }; /* Revision 0x20 with support logic added UDMA */ static const struct ata_port_info info_20_udma = { - .sht = &ali_sht, .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -563,7 +484,6 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) }; /* Revision 0xC2 adds UDMA66 */ static const struct ata_port_info info_c2 = { - .sht = &ali_sht, .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -572,7 +492,6 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) }; /* Revision 0xC3 is UDMA66 for now */ static const struct ata_port_info info_c3 = { - .sht = &ali_sht, .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -581,7 +500,6 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) }; /* Revision 0xC4 is UDMA100 */ static const struct ata_port_info info_c4 = { - .sht = &ali_sht, .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -590,7 +508,6 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) }; /* Revision 0xC5 is UDMA133 with LBA48 DMA */ static const struct ata_port_info info_c5 = { - .sht = &ali_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -601,21 +518,26 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) const struct ata_port_info *ppi[] = { NULL, NULL }; u8 tmp; struct pci_dev *isa_bridge; + int rc; + + rc = pcim_enable_device(pdev); + if (rc) + return rc; /* * The chipset revision selects the driver operations and * mode data. */ - pci_read_config_byte(pdev, PCI_REVISION_ID, &pdev_revision); - if (pdev_revision < 0x20) { + + if (pdev->revision < 0x20) { ppi[0] = &info_early; - } else if (pdev_revision < 0xC2) { + } else if (pdev->revision < 0xC2) { ppi[0] = &info_20; - } else if (pdev_revision == 0xC2) { + } else if (pdev->revision == 0xC2) { ppi[0] = &info_c2; - } else if (pdev_revision == 0xC3) { + } else if (pdev->revision == 0xC3) { ppi[0] = &info_c3; - } else if (pdev_revision == 0xC4) { + } else if (pdev->revision == 0xC4) { ppi[0] = &info_c4; } else ppi[0] = &info_c5; @@ -623,21 +545,28 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) ali_init_chipset(pdev); isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); - if (isa_bridge && pdev_revision >= 0x20 && pdev_revision < 0xC2) { + if (isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) { /* Are we paired with a UDMA capable chip */ pci_read_config_byte(isa_bridge, 0x5E, &tmp); if ((tmp & 0x1E) == 0x12) ppi[0] = &info_20_udma; pci_dev_put(isa_bridge); } - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &ali_sht, NULL); } #ifdef CONFIG_PM static int ali_reinit_one(struct pci_dev *pdev) { + struct ata_host *host = dev_get_drvdata(&pdev->dev); + int rc; + + rc = ata_pci_device_do_resume(pdev); + if (rc) + return rc; ali_init_chipset(pdev); - return ata_pci_device_resume(pdev); + ata_host_resume(host); + return 0; } #endif diff --git a/drivers/ata/pata_amd.c b/drivers/ata/pata_amd.c index f1cd18e..57dd00f 100644 --- a/drivers/ata/pata_amd.c +++ b/drivers/ata/pata_amd.c @@ -56,7 +56,9 @@ static void timing_setup(struct ata_port *ap, struct ata_device *adev, int offse u8 t; T = 1000000000 / amd_clock; - UT = T / min_t(int, max_t(int, clock, 1), 2); + UT = T; + if (clock >= 2) + UT = T / 2; if (ata_timing_compute(adev, speed, &at, T, UT) < 0) { dev_printk(KERN_ERR, &pdev->dev, "unknown mode %d.\n", speed); @@ -82,32 +84,32 @@ static void timing_setup(struct ata_port *ap, struct ata_device *adev, int offse /* Configure the address set up timing */ pci_read_config_byte(pdev, offset + 0x0C, &t); - t = (t & ~(3 << ((3 - dn) << 1))) | ((FIT(at.setup, 1, 4) - 1) << ((3 - dn) << 1)); + t = (t & ~(3 << ((3 - dn) << 1))) | ((clamp_val(at.setup, 1, 4) - 1) << ((3 - dn) << 1)); pci_write_config_byte(pdev, offset + 0x0C , t); /* Configure the 8bit I/O timing */ pci_write_config_byte(pdev, offset + 0x0E + (1 - (dn >> 1)), - ((FIT(at.act8b, 1, 16) - 1) << 4) | (FIT(at.rec8b, 1, 16) - 1)); + ((clamp_val(at.act8b, 1, 16) - 1) << 4) | (clamp_val(at.rec8b, 1, 16) - 1)); /* Drive timing */ pci_write_config_byte(pdev, offset + 0x08 + (3 - dn), - ((FIT(at.active, 1, 16) - 1) << 4) | (FIT(at.recover, 1, 16) - 1)); + ((clamp_val(at.active, 1, 16) - 1) << 4) | (clamp_val(at.recover, 1, 16) - 1)); switch (clock) { case 1: - t = at.udma ? (0xc0 | (FIT(at.udma, 2, 5) - 2)) : 0x03; + t = at.udma ? (0xc0 | (clamp_val(at.udma, 2, 5) - 2)) : 0x03; break; case 2: - t = at.udma ? (0xc0 | amd_cyc2udma[FIT(at.udma, 2, 10)]) : 0x03; + t = at.udma ? (0xc0 | amd_cyc2udma[clamp_val(at.udma, 2, 10)]) : 0x03; break; case 3: - t = at.udma ? (0xc0 | amd_cyc2udma[FIT(at.udma, 1, 10)]) : 0x03; + t = at.udma ? (0xc0 | amd_cyc2udma[clamp_val(at.udma, 1, 10)]) : 0x03; break; case 4: - t = at.udma ? (0xc0 | amd_cyc2udma[FIT(at.udma, 1, 15)]) : 0x03; + t = at.udma ? (0xc0 | amd_cyc2udma[clamp_val(at.udma, 1, 15)]) : 0x03; break; default: @@ -141,14 +143,7 @@ static int amd_pre_reset(struct ata_link *link, unsigned long deadline) if (!pci_test_config_bits(pdev, &amd_enable_bits[ap->port_no])) return -ENOENT; - return ata_std_prereset(link, deadline); -} - -static void amd_error_handler(struct ata_port *ap) -{ - return ata_bmdma_drive_eh(ap, amd_pre_reset, - ata_std_softreset, NULL, - ata_std_postreset); + return ata_sff_prereset(link, deadline); } static int amd_cable_detect(struct ata_port *ap) @@ -220,6 +215,62 @@ static void amd133_set_dmamode(struct ata_port *ap, struct ata_device *adev) timing_setup(ap, adev, 0x40, adev->dma_mode, 4); } +/* Both host-side and drive-side detection results are worthless on NV + * PATAs. Ignore them and just follow what BIOS configured. Both the + * current configuration in PCI config reg and ACPI GTM result are + * cached during driver attach and are consulted to select transfer + * mode. + */ +static unsigned long nv_mode_filter(struct ata_device *dev, + unsigned long xfer_mask) +{ + static const unsigned int udma_mask_map[] = + { ATA_UDMA2, ATA_UDMA1, ATA_UDMA0, 0, + ATA_UDMA3, ATA_UDMA4, ATA_UDMA5, ATA_UDMA6 }; + struct ata_port *ap = dev->link->ap; + char acpi_str[32] = ""; + u32 saved_udma, udma; + const struct ata_acpi_gtm *gtm; + unsigned long bios_limit = 0, acpi_limit = 0, limit; + + /* find out what BIOS configured */ + udma = saved_udma = (unsigned long)ap->host->private_data; + + if (ap->port_no == 0) + udma >>= 16; + if (dev->devno == 0) + udma >>= 8; + + if ((udma & 0xc0) == 0xc0) + bios_limit = ata_pack_xfermask(0, 0, udma_mask_map[udma & 0x7]); + + /* consult ACPI GTM too */ + gtm = ata_acpi_init_gtm(ap); + if (gtm) { + acpi_limit = ata_acpi_gtm_xfermask(dev, gtm); + + snprintf(acpi_str, sizeof(acpi_str), " (%u:%u:0x%x)", + gtm->drive[0].dma, gtm->drive[1].dma, gtm->flags); + } + + /* be optimistic, EH can take care of things if something goes wrong */ + limit = bios_limit | acpi_limit; + + /* If PIO or DMA isn't configured at all, don't limit. Let EH + * handle it. + */ + if (!(limit & ATA_MASK_PIO)) + limit |= ATA_MASK_PIO; + if (!(limit & (ATA_MASK_MWDMA | ATA_MASK_UDMA))) + limit |= ATA_MASK_MWDMA | ATA_MASK_UDMA; + + ata_port_printk(ap, KERN_DEBUG, "nv_mode_filter: 0x%lx&0x%lx->0x%lx, " + "BIOS=0x%lx (0x%x) ACPI=0x%lx%s\n", + xfer_mask, limit, xfer_mask & limit, bios_limit, + saved_udma, acpi_limit, acpi_str); + + return xfer_mask & limit; +} /** * nv_probe_init - cable detection @@ -242,39 +293,7 @@ static int nv_pre_reset(struct ata_link *link, unsigned long deadline) if (!pci_test_config_bits(pdev, &nv_enable_bits[ap->port_no])) return -ENOENT; - return ata_std_prereset(link, deadline); -} - -static void nv_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, nv_pre_reset, - ata_std_softreset, NULL, - ata_std_postreset); -} - -static int nv_cable_detect(struct ata_port *ap) -{ - static const u8 bitmask[2] = {0x03, 0x0C}; - struct pci_dev *pdev = to_pci_dev(ap->host->dev); - u8 ata66; - u16 udma; - int cbl; - - pci_read_config_byte(pdev, 0x52, &ata66); - if (ata66 & bitmask[ap->port_no]) - cbl = ATA_CBL_PATA80; - else - cbl = ATA_CBL_PATA40; - - /* We now have to double check because the Nvidia boxes BIOS - doesn't always set the cable bits but does set mode bits */ - pci_read_config_word(pdev, 0x62 - 2 * ap->port_no, &udma); - if ((udma & 0xC4) == 0xC4 || (udma & 0xC400) == 0xC400) - cbl = ATA_CBL_PATA80; - /* And a triple check across suspend/resume with ACPI around */ - if (ata_acpi_cbl_80wire(ap)) - cbl = ATA_CBL_PATA80; - return cbl; + return ata_sff_prereset(link, deadline); } /** @@ -314,228 +333,75 @@ static void nv133_set_dmamode(struct ata_port *ap, struct ata_device *adev) timing_setup(ap, adev, 0x50, adev->dma_mode, 4); } +static void nv_host_stop(struct ata_host *host) +{ + u32 udma = (unsigned long)host->private_data; + + /* restore PCI config register 0x60 */ + pci_write_config_dword(to_pci_dev(host->dev), 0x60, udma); +} + static struct scsi_host_template amd_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), +}; + +static const struct ata_port_operations amd_base_port_ops = { + .inherits = &ata_bmdma_port_ops, + .prereset = amd_pre_reset, }; static struct ata_port_operations amd33_port_ops = { + .inherits = &amd_base_port_ops, + .cable_detect = ata_cable_40wire, .set_piomode = amd33_set_piomode, .set_dmamode = amd33_set_dmamode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = amd_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; static struct ata_port_operations amd66_port_ops = { + .inherits = &amd_base_port_ops, + .cable_detect = ata_cable_unknown, .set_piomode = amd66_set_piomode, .set_dmamode = amd66_set_dmamode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = amd_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_unknown, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; static struct ata_port_operations amd100_port_ops = { + .inherits = &amd_base_port_ops, + .cable_detect = ata_cable_unknown, .set_piomode = amd100_set_piomode, .set_dmamode = amd100_set_dmamode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = amd_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_unknown, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; static struct ata_port_operations amd133_port_ops = { + .inherits = &amd_base_port_ops, + .cable_detect = amd_cable_detect, .set_piomode = amd133_set_piomode, .set_dmamode = amd133_set_dmamode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = amd_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = amd_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, +}; - .port_start = ata_sff_port_start, +static const struct ata_port_operations nv_base_port_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = ata_cable_ignore, + .mode_filter = nv_mode_filter, + .prereset = nv_pre_reset, + .host_stop = nv_host_stop, }; static struct ata_port_operations nv100_port_ops = { + .inherits = &nv_base_port_ops, .set_piomode = nv100_set_piomode, .set_dmamode = nv100_set_dmamode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = nv_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = nv_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; static struct ata_port_operations nv133_port_ops = { + .inherits = &nv_base_port_ops, .set_piomode = nv133_set_piomode, .set_dmamode = nv133_set_dmamode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = nv_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = nv_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id) { - u8 pdev_revision; static const struct ata_port_info info[10] = { { /* 0: AMD 7401 */ - .sht = &amd_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, /* No SWDMA */ @@ -543,7 +409,6 @@ static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &amd33_port_ops }, { /* 1: Early AMD7409 - no swdma */ - .sht = &amd_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -551,7 +416,6 @@ static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &amd66_port_ops }, { /* 2: AMD 7409, no swdma errata */ - .sht = &amd_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -559,7 +423,6 @@ static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &amd66_port_ops }, { /* 3: AMD 7411 */ - .sht = &amd_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -567,7 +430,6 @@ static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &amd100_port_ops }, { /* 4: AMD 7441 */ - .sht = &amd_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -575,7 +437,6 @@ static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &amd100_port_ops }, { /* 5: AMD 8111*/ - .sht = &amd_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -583,7 +444,6 @@ static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &amd133_port_ops }, { /* 6: AMD 8111 UDMA 100 (Serenade) */ - .sht = &amd_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -591,7 +451,6 @@ static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &amd133_port_ops }, { /* 7: Nvidia Nforce */ - .sht = &amd_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -599,7 +458,6 @@ static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &nv100_port_ops }, { /* 8: Nvidia Nforce2 and later */ - .sht = &amd_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -607,7 +465,6 @@ static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &nv133_port_ops }, { /* 9: AMD CS5536 (Geode companion) */ - .sht = &amd_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -618,18 +475,36 @@ static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id) const struct ata_port_info *ppi[] = { NULL, NULL }; static int printed_version; int type = id->driver_data; + void *hpriv = NULL; u8 fifo; + int rc; if (!printed_version++) dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); + rc = pcim_enable_device(pdev); + if (rc) + return rc; + pci_read_config_byte(pdev, 0x41, &fifo); /* Check for AMD7409 without swdma errata and if found adjust type */ - pci_read_config_byte(pdev, PCI_REVISION_ID, &pdev_revision); - if (type == 1 && pdev_revision > 0x7) + if (type == 1 && pdev->revision > 0x7) type = 2; + /* Serenade ? */ + if (type == 5 && pdev->subsystem_vendor == PCI_VENDOR_ID_AMD && + pdev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE) + type = 6; /* UDMA 100 only */ + + /* + * Okay, type is determined now. Apply type-specific workarounds. + */ + ppi[0] = &info[type]; + + if (type < 3) + ata_pci_bmdma_clear_simplex(pdev); + /* Check for AMD7411 */ if (type == 3) /* FIFO is broken */ @@ -637,22 +512,30 @@ static int amd_init_one(struct pci_dev *pdev, const struct pci_device_id *id) else pci_write_config_byte(pdev, 0x41, fifo | 0xF0); - /* Serenade ? */ - if (type == 5 && pdev->subsystem_vendor == PCI_VENDOR_ID_AMD && - pdev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE) - type = 6; /* UDMA 100 only */ + /* Cable detection on Nvidia chips doesn't work too well, + * cache BIOS programmed UDMA mode. + */ + if (type == 7 || type == 8) { + u32 udma; - if (type < 3) - ata_pci_clear_simplex(pdev); + pci_read_config_dword(pdev, 0x60, &udma); + hpriv = (void *)(unsigned long)udma; + } /* And fire it up */ - ppi[0] = &info[type]; - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &amd_sht, hpriv); } #ifdef CONFIG_PM static int amd_reinit_one(struct pci_dev *pdev) { + struct ata_host *host = dev_get_drvdata(&pdev->dev); + int rc; + + rc = ata_pci_device_do_resume(pdev); + if (rc) + return rc; + if (pdev->vendor == PCI_VENDOR_ID_AMD) { u8 fifo; pci_read_config_byte(pdev, 0x41, &fifo); @@ -663,9 +546,11 @@ static int amd_reinit_one(struct pci_dev *pdev) pci_write_config_byte(pdev, 0x41, fifo | 0xF0); if (pdev->device == PCI_DEVICE_ID_AMD_VIPER_7409 || pdev->device == PCI_DEVICE_ID_AMD_COBRA_7401) - ata_pci_clear_simplex(pdev); + ata_pci_bmdma_clear_simplex(pdev); } - return ata_pci_device_resume(pdev); + + ata_host_resume(host); + return 0; } #endif @@ -716,7 +601,7 @@ static void __exit amd_exit(void) } MODULE_AUTHOR("Alan Cox"); -MODULE_DESCRIPTION("low-level driver for AMD PATA IDE"); +MODULE_DESCRIPTION("low-level driver for AMD and Nvidia PATA IDE"); MODULE_LICENSE("GPL"); MODULE_DEVICE_TABLE(pci, amd); MODULE_VERSION(DRV_VERSION); diff --git a/drivers/ata/pata_artop.c b/drivers/ata/pata_artop.c index d421831..0f513bc 100644 --- a/drivers/ata/pata_artop.c +++ b/drivers/ata/pata_artop.c @@ -52,22 +52,7 @@ static int artop6210_pre_reset(struct ata_link *link, unsigned long deadline) if (!pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no])) return -ENOENT; - return ata_std_prereset(link, deadline); -} - -/** - * artop6210_error_handler - Probe specified port on PATA host controller - * @ap: Port to probe - * - * LOCKING: - * None (inherited from caller). - */ - -static void artop6210_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, artop6210_pre_reset, - ata_std_softreset, NULL, - ata_std_postreset); + return ata_sff_prereset(link, deadline); } /** @@ -93,7 +78,7 @@ static int artop6260_pre_reset(struct ata_link *link, unsigned long deadline) if (pdev->device % 1 && !pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no])) return -ENOENT; - return ata_std_prereset(link, deadline); + return ata_sff_prereset(link, deadline); } /** @@ -114,21 +99,6 @@ static int artop6260_cable_detect(struct ata_port *ap) } /** - * artop6260_error_handler - Probe specified port on PATA host controller - * @ap: Port to probe - * - * LOCKING: - * None (inherited from caller). - */ - -static void artop6260_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, artop6260_pre_reset, - ata_std_softreset, NULL, - ata_std_postreset); -} - -/** * artop6210_load_piomode - Load a set of PATA PIO timings * @ap: Port whose timings we are configuring * @adev: Device @@ -314,85 +284,23 @@ static void artop6260_set_dmamode (struct ata_port *ap, struct ata_device *adev) } static struct scsi_host_template artop_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations artop6210_ops = { +static struct ata_port_operations artop6210_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = ata_cable_40wire, .set_piomode = artop6210_set_piomode, .set_dmamode = artop6210_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = artop6210_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .prereset = artop6210_pre_reset, }; -static const struct ata_port_operations artop6260_ops = { +static struct ata_port_operations artop6260_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = artop6260_cable_detect, .set_piomode = artop6260_set_piomode, .set_dmamode = artop6260_set_dmamode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = artop6260_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = artop6260_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .prereset = artop6260_pre_reset, }; @@ -414,7 +322,6 @@ static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id) { static int printed_version; static const struct ata_port_info info_6210 = { - .sht = &artop_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ @@ -422,7 +329,6 @@ static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &artop6210_ops, }; static const struct ata_port_info info_626x = { - .sht = &artop_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ @@ -430,7 +336,6 @@ static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &artop6260_ops, }; static const struct ata_port_info info_628x = { - .sht = &artop_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ @@ -438,7 +343,6 @@ static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &artop6260_ops, }; static const struct ata_port_info info_628x_fast = { - .sht = &artop_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ @@ -446,11 +350,16 @@ static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &artop6260_ops, }; const struct ata_port_info *ppi[] = { NULL, NULL }; + int rc; if (!printed_version++) dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); + rc = pcim_enable_device(pdev); + if (rc) + return rc; + if (id->driver_data == 0) { /* 6210 variant */ ppi[0] = &info_6210; ppi[1] = &ata_dummy_port_info; @@ -491,7 +400,7 @@ static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id) BUG_ON(ppi[0] == NULL); - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &artop_sht, NULL); } static const struct pci_device_id artop_pci_tbl[] = { diff --git a/drivers/ata/pata_at32.c b/drivers/ata/pata_at32.c index 67e574d..82fb6e2 100644 --- a/drivers/ata/pata_at32.c +++ b/drivers/ata/pata_at32.c @@ -166,52 +166,14 @@ static void pata_at32_set_piomode(struct ata_port *ap, struct ata_device *adev) } } -static void pata_at32_irq_clear(struct ata_port *ap) -{ - /* No DMA controller yet */ -} - static struct scsi_host_template at32_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_PIO_SHT(DRV_NAME), }; static struct ata_port_operations at32_port_ops = { - .set_piomode = pata_at32_set_piomode, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .exec_command = ata_exec_command, - .check_status = ata_check_status, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, + .inherits = &ata_sff_port_ops, .cable_detect = ata_cable_40wire, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_clear = pata_at32_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .set_piomode = pata_at32_set_piomode, }; static int __init pata_at32_init_one(struct device *dev, @@ -261,7 +223,7 @@ static int __init pata_at32_init_one(struct device *dev, host->private_data = info; /* Register ATA device and return */ - return ata_host_activate(host, info->irq, ata_interrupt, + return ata_host_activate(host, info->irq, ata_sff_interrupt, IRQF_SHARED | IRQF_TRIGGER_RISING, &at32_sht); } @@ -324,13 +286,11 @@ static int __init pata_at32_probe(struct platform_device *pdev) if (irq < 0) return irq; - /* Setup struct containing private infomation */ + /* Setup struct containing private information */ info = kzalloc(sizeof(struct at32_ide_info), GFP_KERNEL); if (!info) return -ENOMEM; - memset(info, 0, sizeof(struct at32_ide_info)); - info->irq = irq; info->cs = board->cs; @@ -419,6 +379,9 @@ static int __exit pata_at32_remove(struct platform_device *pdev) return 0; } +/* work with hotplug and coldplug */ +MODULE_ALIAS("platform:at32_ide"); + static struct platform_driver pata_at32_driver = { .remove = __exit_p(pata_at32_remove), .driver = { diff --git a/drivers/ata/pata_atiixp.c b/drivers/ata/pata_atiixp.c index 9623f52..d7de7ba 100644 --- a/drivers/ata/pata_atiixp.c +++ b/drivers/ata/pata_atiixp.c @@ -45,12 +45,7 @@ static int atiixp_pre_reset(struct ata_link *link, unsigned long deadline) if (!pci_test_config_bits(pdev, &atiixp_enable_bits[ap->port_no])) return -ENOENT; - return ata_std_prereset(link, deadline); -} - -static void atiixp_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, atiixp_pre_reset, ata_std_softreset, NULL, ata_std_postreset); + return ata_sff_prereset(link, deadline); } static int atiixp_cable_detect(struct ata_port *ap) @@ -93,8 +88,8 @@ static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev, pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data); pci_read_config_word(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data); - pio_mode_data &= ~(0xFF << timing_shift); - pio_mode_data |= (pio_timings[pio] << timing_shift); + pio_timing_data &= ~(0xFF << timing_shift); + pio_timing_data |= (pio_timings[pio] << timing_shift); pci_write_config_word(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data); } @@ -221,60 +216,26 @@ static void atiixp_bmdma_stop(struct ata_queued_cmd *qc) } static struct scsi_host_template atiixp_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), + .sg_tablesize = LIBATA_DUMB_MAX_PRD, }; static struct ata_port_operations atiixp_port_ops = { - .set_piomode = atiixp_set_piomode, - .set_dmamode = atiixp_set_dmamode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = atiixp_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = atiixp_cable_detect, + .inherits = &ata_bmdma_port_ops, - .bmdma_setup = ata_bmdma_setup, + .qc_prep = ata_sff_dumb_qc_prep, .bmdma_start = atiixp_bmdma_start, .bmdma_stop = atiixp_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .cable_detect = atiixp_cable_detect, + .set_piomode = atiixp_set_piomode, + .set_dmamode = atiixp_set_dmamode, + .prereset = atiixp_pre_reset, }; static int atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id) { static const struct ata_port_info info = { - .sht = &atiixp_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x06, /* No MWDMA0 support */ @@ -282,7 +243,7 @@ static int atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id) .port_ops = &atiixp_port_ops }; const struct ata_port_info *ppi[] = { &info, NULL }; - return ata_pci_init_one(dev, ppi); + return ata_pci_sff_init_one(dev, ppi, &atiixp_sht, NULL); } static const struct pci_device_id atiixp[] = { diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c index 088a41f..81ffb31 100644 --- a/drivers/ata/pata_bf54x.c +++ b/drivers/ata/pata_bf54x.c @@ -299,7 +299,7 @@ static void bfin_set_piomode(struct ata_port *ap, struct ata_device *adev) */ n6 = num_clocks_min(t6min, fsclk); if (mode >= 0 && mode <= 4 && n6 >= 1) { - pr_debug("set piomode: mode=%d, fsclk=%ud\n", mode, fsclk); + dev_dbg(adev->link->ap->dev, "set piomode: mode=%d, fsclk=%ud\n", mode, fsclk); /* calculate the timing values for register transfers. */ while (mode > 0 && pio_fsclk[mode] > fsclk) mode--; @@ -376,7 +376,7 @@ static void bfin_set_dmamode(struct ata_port *ap, struct ata_device *adev) mode = adev->dma_mode - XFER_UDMA_0; if (mode >= 0 && mode <= 5) { - pr_debug("set udmamode: mode=%d\n", mode); + dev_dbg(adev->link->ap->dev, "set udmamode: mode=%d\n", mode); /* the most restrictive timing value is t6 and tc, * the DIOW - data hold. If one SCLK pulse is longer * than this minimum value then register @@ -433,7 +433,7 @@ static void bfin_set_dmamode(struct ata_port *ap, struct ata_device *adev) mode = adev->dma_mode - XFER_MW_DMA_0; if (mode >= 0 && mode <= 2) { - pr_debug("set mdmamode: mode=%d\n", mode); + dev_dbg(adev->link->ap->dev, "set mdmamode: mode=%d\n", mode); /* the most restrictive timing value is tf, the DMACK to * read data released. If one SCLK pulse is longer than * this maximum value then the MDMA mode @@ -674,7 +674,7 @@ static void read_atapi_data(void __iomem *base, * @ap: Port to which output is sent * @tf: ATA taskfile register set * - * Note: Original code is ata_tf_load(). + * Note: Original code is ata_sff_tf_load(). */ static void bfin_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) @@ -697,7 +697,7 @@ static void bfin_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) write_atapi_register(base, ATA_REG_LBAL, tf->hob_lbal); write_atapi_register(base, ATA_REG_LBAM, tf->hob_lbam); write_atapi_register(base, ATA_REG_LBAH, tf->hob_lbah); - pr_debug("hob: feat 0x%X nsect 0x%X, lba 0x%X " + dev_dbg(ap->dev, "hob: feat 0x%X nsect 0x%X, lba 0x%X " "0x%X 0x%X\n", tf->hob_feature, tf->hob_nsect, @@ -711,7 +711,7 @@ static void bfin_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) write_atapi_register(base, ATA_REG_LBAL, tf->lbal); write_atapi_register(base, ATA_REG_LBAM, tf->lbam); write_atapi_register(base, ATA_REG_LBAH, tf->lbah); - pr_debug("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", + dev_dbg(ap->dev, "feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n", tf->feature, tf->nsect, tf->lbal, @@ -721,7 +721,7 @@ static void bfin_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) if (tf->flags & ATA_TFLAG_DEVICE) { write_atapi_register(base, ATA_REG_DEVICE, tf->device); - pr_debug("device 0x%X\n", tf->device); + dev_dbg(ap->dev, "device 0x%X\n", tf->device); } ata_wait_idle(ap); @@ -745,7 +745,7 @@ static u8 bfin_check_status(struct ata_port *ap) * @ap: Port from which input is read * @tf: ATA taskfile register set for storing input * - * Note: Original code is ata_tf_read(). + * Note: Original code is ata_sff_tf_read(). */ static void bfin_tf_read(struct ata_port *ap, struct ata_taskfile *tf) @@ -775,17 +775,17 @@ static void bfin_tf_read(struct ata_port *ap, struct ata_taskfile *tf) * @ap: port to which command is being issued * @tf: ATA taskfile register set * - * Note: Original code is ata_exec_command(). + * Note: Original code is ata_sff_exec_command(). */ static void bfin_exec_command(struct ata_port *ap, const struct ata_taskfile *tf) { void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr; - pr_debug("ata%u: cmd 0x%X\n", ap->print_id, tf->command); + dev_dbg(ap->dev, "ata%u: cmd 0x%X\n", ap->print_id, tf->command); write_atapi_register(base, ATA_REG_CMD, tf->command); - ata_pause(ap); + ata_sff_pause(ap); } /** @@ -800,14 +800,14 @@ static u8 bfin_check_altstatus(struct ata_port *ap) } /** - * bfin_std_dev_select - Select device 0/1 on ATA bus + * bfin_dev_select - Select device 0/1 on ATA bus * @ap: ATA channel to manipulate * @device: ATA device (numbered from zero) to select * - * Note: Original code is ata_std_dev_select(). + * Note: Original code is ata_sff_dev_select(). */ -static void bfin_std_dev_select(struct ata_port *ap, unsigned int device) +static void bfin_dev_select(struct ata_port *ap, unsigned int device) { void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr; u8 tmp; @@ -818,7 +818,7 @@ static void bfin_std_dev_select(struct ata_port *ap, unsigned int device) tmp = ATA_DEVICE_OBS | ATA_DEV1; write_atapi_register(base, ATA_REG_DEVICE, tmp); - ata_pause(ap); + ata_sff_pause(ap); } /** @@ -833,7 +833,7 @@ static void bfin_bmdma_setup(struct ata_queued_cmd *qc) unsigned short config = WDSIZE_16; struct scatterlist *sg; - pr_debug("in atapi dma setup\n"); + dev_dbg(qc->ap->dev, "in atapi dma setup\n"); /* Program the ATA_CTRL register with dir */ if (qc->tf.flags & ATA_TFLAG_WRITE) { /* fill the ATAPI DMA controller */ @@ -868,7 +868,7 @@ static void bfin_bmdma_start(struct ata_queued_cmd *qc) void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr; struct scatterlist *sg; - pr_debug("in atapi dma start\n"); + dev_dbg(qc->ap->dev, "in atapi dma start\n"); if (!(ap->udma_mask || ap->mwdma_mask)) return; @@ -886,7 +886,7 @@ static void bfin_bmdma_start(struct ata_queued_cmd *qc) sg_dma_address(sg) + sg_dma_len(sg)); } enable_dma(CH_ATAPI_TX); - pr_debug("enable udma write\n"); + dev_dbg(qc->ap->dev, "enable udma write\n"); /* Send ATA DMA write command */ bfin_exec_command(ap, &qc->tf); @@ -896,7 +896,7 @@ static void bfin_bmdma_start(struct ata_queued_cmd *qc) | XFER_DIR)); } else { enable_dma(CH_ATAPI_RX); - pr_debug("enable udma read\n"); + dev_dbg(qc->ap->dev, "enable udma read\n"); /* Send ATA DMA read command */ bfin_exec_command(ap, &qc->tf); @@ -909,7 +909,10 @@ static void bfin_bmdma_start(struct ata_queued_cmd *qc) /* Reset all transfer count */ ATAPI_SET_CONTROL(base, ATAPI_GET_CONTROL(base) | TFRCNT_RST); - /* Set transfer length to buffer len */ + /* Set ATAPI state machine contorl in terminate sequence */ + ATAPI_SET_CONTROL(base, ATAPI_GET_CONTROL(base) | END_ON_TERM); + + /* Set transfer length to buffer len */ ata_for_each_sg(sg, qc) { ATAPI_SET_XFER_LEN(base, (sg_dma_len(sg) >> 1)); } @@ -933,7 +936,7 @@ static void bfin_bmdma_stop(struct ata_queued_cmd *qc) struct ata_port *ap = qc->ap; struct scatterlist *sg; - pr_debug("in atapi dma stop\n"); + dev_dbg(qc->ap->dev, "in atapi dma stop\n"); if (!(ap->udma_mask || ap->mwdma_mask)) return; @@ -974,7 +977,7 @@ static unsigned int bfin_devchk(struct ata_port *ap, void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr; u8 nsect, lbal; - bfin_std_dev_select(ap, device); + bfin_dev_select(ap, device); write_atapi_register(base, ATA_REG_NSECT, 0x55); write_atapi_register(base, ATA_REG_LBAL, 0xaa); @@ -1011,7 +1014,7 @@ static void bfin_bus_post_reset(struct ata_port *ap, unsigned int devmask) * BSY bit to clear */ if (dev0) - ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); + ata_sff_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); /* if device 1 was found in ata_devchk, wait for * register access, then wait for BSY to clear @@ -1020,7 +1023,7 @@ static void bfin_bus_post_reset(struct ata_port *ap, unsigned int devmask) while (dev1) { u8 nsect, lbal; - bfin_std_dev_select(ap, 1); + bfin_dev_select(ap, 1); nsect = read_atapi_register(base, ATA_REG_NSECT); lbal = read_atapi_register(base, ATA_REG_LBAL); if ((nsect == 1) && (lbal == 1)) @@ -1032,14 +1035,14 @@ static void bfin_bus_post_reset(struct ata_port *ap, unsigned int devmask) msleep(50); /* give drive a breather */ } if (dev1) - ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); + ata_sff_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); /* is all this really necessary? */ - bfin_std_dev_select(ap, 0); + bfin_dev_select(ap, 0); if (dev1) - bfin_std_dev_select(ap, 1); + bfin_dev_select(ap, 1); if (dev0) - bfin_std_dev_select(ap, 0); + bfin_dev_select(ap, 0); } /** @@ -1085,26 +1088,21 @@ static unsigned int bfin_bus_softreset(struct ata_port *ap, } /** - * bfin_std_softreset - reset host port via ATA SRST + * bfin_softreset - reset host port via ATA SRST * @ap: port to reset * @classes: resulting classes of attached devices * - * Note: Original code is ata_std_softreset(). + * Note: Original code is ata_sff_softreset(). */ -static int bfin_std_softreset(struct ata_link *link, unsigned int *classes, - unsigned long deadline) +static int bfin_softreset(struct ata_link *link, unsigned int *classes, + unsigned long deadline) { struct ata_port *ap = link->ap; unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; unsigned int devmask = 0, err_mask; u8 err; - if (ata_link_offline(link)) { - classes[0] = ATA_DEV_NONE; - goto out; - } - /* determine if device 0/1 are present */ if (bfin_devchk(ap, 0)) devmask |= (1 << 0); @@ -1112,7 +1110,7 @@ static int bfin_std_softreset(struct ata_link *link, unsigned int *classes, devmask |= (1 << 1); /* select device 0 again */ - bfin_std_dev_select(ap, 0); + bfin_dev_select(ap, 0); /* issue bus reset */ err_mask = bfin_bus_softreset(ap, devmask); @@ -1123,13 +1121,12 @@ static int bfin_std_softreset(struct ata_link *link, unsigned int *classes, } /* determine by signature whether we have ATA or ATAPI devices */ - classes[0] = ata_dev_try_classify(&ap->link.device[0], + classes[0] = ata_sff_dev_classify(&ap->link.device[0], devmask & (1 << 0), &err); if (slave_possible && err != 0x81) - classes[1] = ata_dev_try_classify(&ap->link.device[1], + classes[1] = ata_sff_dev_classify(&ap->link.device[1], devmask & (1 << 1), &err); - out: return 0; } @@ -1144,15 +1141,15 @@ static unsigned char bfin_bmdma_status(struct ata_port *ap) void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr; unsigned short int_status = ATAPI_GET_INT_STATUS(base); - if (ATAPI_GET_STATUS(base) & (MULTI_XFER_ON|ULTRA_XFER_ON)) { + if (ATAPI_GET_STATUS(base) & (MULTI_XFER_ON|ULTRA_XFER_ON)) host_stat |= ATA_DMA_ACTIVE; - } - if (int_status & (MULTI_DONE_INT|UDMAIN_DONE_INT|UDMAOUT_DONE_INT)) { + if (int_status & (MULTI_DONE_INT|UDMAIN_DONE_INT|UDMAOUT_DONE_INT| + ATAPI_DEV_INT)) host_stat |= ATA_DMA_INTR; - } - if (int_status & (MULTI_TERM_INT|UDMAIN_TERM_INT|UDMAOUT_TERM_INT)) { - host_stat |= ATA_DMA_ERR; - } + if (int_status & (MULTI_TERM_INT|UDMAIN_TERM_INT|UDMAOUT_TERM_INT)) + host_stat |= ATA_DMA_ERR|ATA_DMA_INTR; + + dev_dbg(ap->dev, "ATAPI: host_stat=0x%x\n", host_stat); return host_stat; } @@ -1164,52 +1161,53 @@ static unsigned char bfin_bmdma_status(struct ata_port *ap) * @buflen: buffer length * @write_data: read/write * - * Note: Original code is ata_data_xfer(). + * Note: Original code is ata_sff_data_xfer(). */ -static void bfin_data_xfer(struct ata_device *adev, unsigned char *buf, - unsigned int buflen, int write_data) +static unsigned int bfin_data_xfer(struct ata_device *dev, unsigned char *buf, + unsigned int buflen, int rw) { - struct ata_port *ap = adev->link->ap; - unsigned int words = buflen >> 1; - unsigned short *buf16 = (u16 *) buf; + struct ata_port *ap = dev->link->ap; void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr; + unsigned int words = buflen >> 1; + unsigned short *buf16 = (u16 *)buf; /* Transfer multiple of 2 bytes */ - if (write_data) { - write_atapi_data(base, words, buf16); - } else { + if (rw == READ) read_atapi_data(base, words, buf16); - } + else + write_atapi_data(base, words, buf16); /* Transfer trailing 1 byte, if any. */ if (unlikely(buflen & 0x01)) { unsigned short align_buf[1] = { 0 }; unsigned char *trailing_buf = buf + buflen - 1; - if (write_data) { - memcpy(align_buf, trailing_buf, 1); - write_atapi_data(base, 1, align_buf); - } else { + if (rw == READ) { read_atapi_data(base, 1, align_buf); memcpy(trailing_buf, align_buf, 1); + } else { + memcpy(align_buf, trailing_buf, 1); + write_atapi_data(base, 1, align_buf); } + words++; } + + return words << 1; } /** * bfin_irq_clear - Clear ATAPI interrupt. * @ap: Port associated with this ATA transaction. * - * Note: Original code is ata_bmdma_irq_clear(). + * Note: Original code is ata_sff_irq_clear(). */ static void bfin_irq_clear(struct ata_port *ap) { void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr; - pr_debug("in atapi irq clear\n"); - + dev_dbg(ap->dev, "in atapi irq clear\n"); ATAPI_SET_INT_STATUS(base, ATAPI_GET_INT_STATUS(base)|ATAPI_DEV_INT | MULTI_DONE_INT | UDMAIN_DONE_INT | UDMAOUT_DONE_INT | MULTI_TERM_INT | UDMAIN_TERM_INT | UDMAOUT_TERM_INT); @@ -1219,7 +1217,7 @@ static void bfin_irq_clear(struct ata_port *ap) * bfin_irq_on - Enable interrupts on a port. * @ap: Port on which interrupts are enabled. * - * Note: Original code is ata_irq_on(). + * Note: Original code is ata_sff_irq_on(). */ static unsigned char bfin_irq_on(struct ata_port *ap) @@ -1227,7 +1225,7 @@ static unsigned char bfin_irq_on(struct ata_port *ap) void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr; u8 tmp; - pr_debug("in atapi irq on\n"); + dev_dbg(ap->dev, "in atapi irq on\n"); ap->ctl &= ~ATA_NIEN; ap->last_ctl = ap->ctl; @@ -1240,17 +1238,17 @@ static unsigned char bfin_irq_on(struct ata_port *ap) } /** - * bfin_bmdma_freeze - Freeze DMA controller port + * bfin_freeze - Freeze DMA controller port * @ap: port to freeze * - * Note: Original code is ata_bmdma_freeze(). + * Note: Original code is ata_sff_freeze(). */ -static void bfin_bmdma_freeze(struct ata_port *ap) +static void bfin_freeze(struct ata_port *ap) { void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr; - pr_debug("in atapi dma freeze\n"); + dev_dbg(ap->dev, "in atapi dma freeze\n"); ap->ctl |= ATA_NIEN; ap->last_ctl = ap->ctl; @@ -1260,34 +1258,34 @@ static void bfin_bmdma_freeze(struct ata_port *ap) * ATA_NIEN manipulation. Also, many controllers fail to mask * previously pending IRQ on ATA_NIEN assertion. Clear it. */ - ata_chk_status(ap); + ap->ops->sff_check_status(ap); bfin_irq_clear(ap); } /** - * bfin_bmdma_thaw - Thaw DMA controller port + * bfin_thaw - Thaw DMA controller port * @ap: port to thaw * - * Note: Original code is ata_bmdma_thaw(). + * Note: Original code is ata_sff_thaw(). */ -void bfin_bmdma_thaw(struct ata_port *ap) +void bfin_thaw(struct ata_port *ap) { + dev_dbg(ap->dev, "in atapi dma thaw\n"); bfin_check_status(ap); - bfin_irq_clear(ap); bfin_irq_on(ap); } /** - * bfin_std_postreset - standard postreset callback + * bfin_postreset - standard postreset callback * @ap: the target ata_port * @classes: classes of attached devices * - * Note: Original code is ata_std_postreset(). + * Note: Original code is ata_sff_postreset(). */ -static void bfin_std_postreset(struct ata_link *link, unsigned int *classes) +static void bfin_postreset(struct ata_link *link, unsigned int *classes) { struct ata_port *ap = link->ap; void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr; @@ -1297,9 +1295,9 @@ static void bfin_std_postreset(struct ata_link *link, unsigned int *classes) /* is double-select really necessary? */ if (classes[0] != ATA_DEV_NONE) - bfin_std_dev_select(ap, 1); + bfin_dev_select(ap, 1); if (classes[1] != ATA_DEV_NONE) - bfin_std_dev_select(ap, 0); + bfin_dev_select(ap, 0); /* bail out if no device is present */ if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { @@ -1310,20 +1308,9 @@ static void bfin_std_postreset(struct ata_link *link, unsigned int *classes) write_atapi_register(base, ATA_REG_CTRL, ap->ctl); } -/** - * bfin_error_handler - Stock error handler for DMA controller - * @ap: port to handle error for - */ - -static void bfin_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, ata_std_prereset, bfin_std_softreset, NULL, - bfin_std_postreset); -} - static void bfin_port_stop(struct ata_port *ap) { - pr_debug("in atapi port stop\n"); + dev_dbg(ap->dev, "in atapi port stop\n"); if (ap->udma_mask != 0 || ap->mwdma_mask != 0) { free_dma(CH_ATAPI_RX); free_dma(CH_ATAPI_TX); @@ -1332,7 +1319,7 @@ static void bfin_port_stop(struct ata_port *ap) static int bfin_port_start(struct ata_port *ap) { - pr_debug("in atapi port start\n"); + dev_dbg(ap->dev, "in atapi port start\n"); if (!(ap->udma_mask || ap->mwdma_mask)) return 0; @@ -1352,56 +1339,157 @@ static int bfin_port_start(struct ata_port *ap) return 0; } +static unsigned int bfin_ata_host_intr(struct ata_port *ap, + struct ata_queued_cmd *qc) +{ + struct ata_eh_info *ehi = &ap->link.eh_info; + u8 status, host_stat = 0; + + VPRINTK("ata%u: protocol %d task_state %d\n", + ap->print_id, qc->tf.protocol, ap->hsm_task_state); + + /* Check whether we are expecting interrupt in this state */ + switch (ap->hsm_task_state) { + case HSM_ST_FIRST: + /* Some pre-ATAPI-4 devices assert INTRQ + * at this state when ready to receive CDB. + */ + + /* Check the ATA_DFLAG_CDB_INTR flag is enough here. + * The flag was turned on only for atapi devices. + * No need to check is_atapi_taskfile(&qc->tf) again. + */ + if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) + goto idle_irq; + break; + case HSM_ST_LAST: + if (qc->tf.protocol == ATA_PROT_DMA || + qc->tf.protocol == ATAPI_PROT_DMA) { + /* check status of DMA engine */ + host_stat = ap->ops->bmdma_status(ap); + VPRINTK("ata%u: host_stat 0x%X\n", + ap->print_id, host_stat); + + /* if it's not our irq... */ + if (!(host_stat & ATA_DMA_INTR)) + goto idle_irq; + + /* before we do anything else, clear DMA-Start bit */ + ap->ops->bmdma_stop(qc); + + if (unlikely(host_stat & ATA_DMA_ERR)) { + /* error when transfering data to/from memory */ + qc->err_mask |= AC_ERR_HOST_BUS; + ap->hsm_task_state = HSM_ST_ERR; + } + } + break; + case HSM_ST: + break; + default: + goto idle_irq; + } + + /* check altstatus */ + status = ap->ops->sff_check_altstatus(ap); + if (status & ATA_BUSY) + goto busy_ata; + + /* check main status, clearing INTRQ */ + status = ap->ops->sff_check_status(ap); + if (unlikely(status & ATA_BUSY)) + goto busy_ata; + + /* ack bmdma irq events */ + ap->ops->sff_irq_clear(ap); + + ata_sff_hsm_move(ap, qc, status, 0); + + if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || + qc->tf.protocol == ATAPI_PROT_DMA)) + ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); + +busy_ata: + return 1; /* irq handled */ + +idle_irq: + ap->stats.idle_irq++; + +#ifdef ATA_IRQ_TRAP + if ((ap->stats.idle_irq % 1000) == 0) { + ap->ops->irq_ack(ap, 0); /* debug trap */ + ata_port_printk(ap, KERN_WARNING, "irq trap\n"); + return 1; + } +#endif + return 0; /* irq not handled */ +} + +static irqreturn_t bfin_ata_interrupt(int irq, void *dev_instance) +{ + struct ata_host *host = dev_instance; + unsigned int i; + unsigned int handled = 0; + unsigned long flags; + + /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ + spin_lock_irqsave(&host->lock, flags); + + for (i = 0; i < host->n_ports; i++) { + struct ata_port *ap; + + ap = host->ports[i]; + if (ap && + !(ap->flags & ATA_FLAG_DISABLED)) { + struct ata_queued_cmd *qc; + + qc = ata_qc_from_tag(ap, ap->link.active_tag); + if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && + (qc->flags & ATA_QCFLAG_ACTIVE)) + handled |= bfin_ata_host_intr(ap, qc); + } + } + + spin_unlock_irqrestore(&host->lock, flags); + + return IRQ_RETVAL(handled); +} + + static struct scsi_host_template bfin_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, + ATA_BASE_SHT(DRV_NAME), .sg_tablesize = SG_NONE, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, -#ifdef CONFIG_PM - .resume = ata_scsi_device_resume, - .suspend = ata_scsi_device_suspend, -#endif }; -static const struct ata_port_operations bfin_pata_ops = { +static struct ata_port_operations bfin_pata_ops = { + .inherits = &ata_sff_port_ops, + .set_piomode = bfin_set_piomode, .set_dmamode = bfin_set_dmamode, - .tf_load = bfin_tf_load, - .tf_read = bfin_tf_read, - .exec_command = bfin_exec_command, - .check_status = bfin_check_status, - .check_altstatus = bfin_check_altstatus, - .dev_select = bfin_std_dev_select, + .sff_tf_load = bfin_tf_load, + .sff_tf_read = bfin_tf_read, + .sff_exec_command = bfin_exec_command, + .sff_check_status = bfin_check_status, + .sff_check_altstatus = bfin_check_altstatus, + .sff_dev_select = bfin_dev_select, .bmdma_setup = bfin_bmdma_setup, .bmdma_start = bfin_bmdma_start, .bmdma_stop = bfin_bmdma_stop, .bmdma_status = bfin_bmdma_status, - .data_xfer = bfin_data_xfer, + .sff_data_xfer = bfin_data_xfer, .qc_prep = ata_noop_qc_prep, - .qc_issue = ata_qc_issue_prot, - .freeze = bfin_bmdma_freeze, - .thaw = bfin_bmdma_thaw, - .error_handler = bfin_error_handler, - .post_internal_cmd = bfin_bmdma_stop, + .freeze = bfin_freeze, + .thaw = bfin_thaw, + .softreset = bfin_softreset, + .postreset = bfin_postreset, - .irq_handler = ata_interrupt, - .irq_clear = bfin_irq_clear, - .irq_on = bfin_irq_on, + .sff_irq_clear = bfin_irq_clear, + .sff_irq_on = bfin_irq_on, .port_start = bfin_port_start, .port_stop = bfin_port_stop, @@ -1409,7 +1497,6 @@ static const struct ata_port_operations bfin_pata_ops = { static struct ata_port_info bfin_port_info[] = { { - .sht = &bfin_sht, .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_MMIO | ATA_FLAG_NO_LEGACY, @@ -1446,7 +1533,7 @@ static int bfin_reset_controller(struct ata_host *host) count = 10000000; do { status = read_atapi_register(base, ATA_REG_STATUS); - } while (count-- && (status & ATA_BUSY)); + } while (--count && (status & ATA_BUSY)); /* Enable only ATAPI Device interrupt */ ATAPI_SET_INT_MASK(base, 1); @@ -1509,7 +1596,8 @@ static int __devinit bfin_atapi_probe(struct platform_device *pdev) if (res == NULL) return -EINVAL; - while (bfin_port_info[board_idx].udma_mask>0 && udma_fsclk[udma_mode] > fsclk) { + while (bfin_port_info[board_idx].udma_mask > 0 && + udma_fsclk[udma_mode] > fsclk) { udma_mode--; bfin_port_info[board_idx].udma_mask >>= 1; } @@ -1535,7 +1623,7 @@ static int __devinit bfin_atapi_probe(struct platform_device *pdev) } if (ata_host_activate(host, platform_get_irq(pdev, 0), - ata_interrupt, IRQF_SHARED, &bfin_sht) != 0) { + bfin_ata_interrupt, IRQF_SHARED, &bfin_sht) != 0) { peripheral_free_list(atapi_io_port); dev_err(&pdev->dev, "Fail to attach ATAPI device\n"); return -ENODEV; @@ -1629,3 +1717,4 @@ MODULE_AUTHOR("Sonic Zhang <sonic.zhang@analog.com>"); MODULE_DESCRIPTION("PATA driver for blackfin 54x ATAPI controller"); MODULE_LICENSE("GPL"); MODULE_VERSION(DRV_VERSION); +MODULE_ALIAS("platform:" DRV_NAME); diff --git a/drivers/ata/pata_cmd640.c b/drivers/ata/pata_cmd640.c index 43d198f..2de30b9 100644 --- a/drivers/ata/pata_cmd640.c +++ b/drivers/ata/pata_cmd640.c @@ -107,8 +107,8 @@ static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev) pci_write_config_byte(pdev, arttim + 1, (t.active << 4) | t.recover); } else { /* Save the shared timings for channel, they will be loaded - by qc_issue_prot. Reloading the setup time is expensive - so we keep a merged one loaded */ + by qc_issue. Reloading the setup time is expensive so we + keep a merged one loaded */ pci_read_config_byte(pdev, ARTIM23, ®); reg &= 0x3F; reg |= t.setup; @@ -119,14 +119,14 @@ static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev) /** - * cmd640_qc_issue_prot - command preparation hook + * cmd640_qc_issue - command preparation hook * @qc: Command to be issued * * Channel 1 has shared timings. We must reprogram the * clock each drive 2/3 switch we do. */ -static unsigned int cmd640_qc_issue_prot(struct ata_queued_cmd *qc) +static unsigned int cmd640_qc_issue(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct ata_device *adev = qc->dev; @@ -137,7 +137,7 @@ static unsigned int cmd640_qc_issue_prot(struct ata_queued_cmd *qc) pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]); timing->last = adev->devno; } - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } /** @@ -166,53 +166,16 @@ static int cmd640_port_start(struct ata_port *ap) } static struct scsi_host_template cmd640_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct ata_port_operations cmd640_port_ops = { - .set_piomode = cmd640_set_piomode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, + .inherits = &ata_bmdma_port_ops, + /* In theory xfer_noirq is not needed once we kill the prefetcher */ + .sff_data_xfer = ata_sff_data_xfer_noirq, + .qc_issue = cmd640_qc_issue, .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = cmd640_qc_issue_prot, - - /* In theory this is not needed once we kill the prefetcher */ - .data_xfer = ata_data_xfer_noirq, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - + .set_piomode = cmd640_set_piomode, .port_start = cmd640_port_start, }; @@ -248,26 +211,36 @@ static void cmd640_hardware_init(struct pci_dev *pdev) static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id) { static const struct ata_port_info info = { - .sht = &cmd640_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .port_ops = &cmd640_port_ops }; const struct ata_port_info *ppi[] = { &info, NULL }; + int rc; + + rc = pcim_enable_device(pdev); + if (rc) + return rc; cmd640_hardware_init(pdev); - return ata_pci_init_one(pdev, ppi); + + return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL); } +#ifdef CONFIG_PM static int cmd640_reinit_one(struct pci_dev *pdev) { + struct ata_host *host = dev_get_drvdata(&pdev->dev); + int rc; + + rc = ata_pci_device_do_resume(pdev); + if (rc) + return rc; cmd640_hardware_init(pdev); -#ifdef CONFIG_PM - return ata_pci_device_resume(pdev); -#else + ata_host_resume(host); return 0; -#endif } +#endif static const struct pci_device_id cmd640[] = { { PCI_VDEVICE(CMD, 0x640), 0 }, @@ -281,8 +254,8 @@ static struct pci_driver cmd640_pci_driver = { .remove = ata_pci_remove_one, #ifdef CONFIG_PM .suspend = ata_pci_device_suspend, -#endif .resume = cmd640_reinit_one, +#endif }; static int __init cmd640_init(void) diff --git a/drivers/ata/pata_cmd64x.c b/drivers/ata/pata_cmd64x.c index 7acbbd9..ddd09b7 100644 --- a/drivers/ata/pata_cmd64x.c +++ b/drivers/ata/pata_cmd64x.c @@ -266,120 +266,30 @@ static void cmd646r1_bmdma_stop(struct ata_queued_cmd *qc) } static struct scsi_host_template cmd64x_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static struct ata_port_operations cmd64x_port_ops = { +static const struct ata_port_operations cmd64x_base_ops = { + .inherits = &ata_bmdma_port_ops, .set_piomode = cmd64x_set_piomode, .set_dmamode = cmd64x_set_dmamode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_port_start, }; -static struct ata_port_operations cmd646r1_port_ops = { - .set_piomode = cmd64x_set_piomode, - .set_dmamode = cmd64x_set_dmamode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, +static struct ata_port_operations cmd64x_port_ops = { + .inherits = &cmd64x_base_ops, .cable_detect = ata_cable_40wire, +}; - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, +static struct ata_port_operations cmd646r1_port_ops = { + .inherits = &cmd64x_base_ops, .bmdma_stop = cmd646r1_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_port_start, + .cable_detect = ata_cable_40wire, }; static struct ata_port_operations cmd648_port_ops = { - .set_piomode = cmd64x_set_piomode, - .set_dmamode = cmd64x_set_dmamode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = cmd648_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, + .inherits = &cmd64x_base_ops, .bmdma_stop = cmd648_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_port_start, + .cable_detect = cmd648_cable_detect, }; static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) @@ -388,21 +298,18 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) static const struct ata_port_info cmd_info[6] = { { /* CMD 643 - no UDMA */ - .sht = &cmd64x_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, .port_ops = &cmd64x_port_ops }, { /* CMD 646 with broken UDMA */ - .sht = &cmd64x_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, .port_ops = &cmd64x_port_ops }, { /* CMD 646 with working UDMA */ - .sht = &cmd64x_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -410,14 +317,12 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &cmd64x_port_ops }, { /* CMD 646 rev 1 */ - .sht = &cmd64x_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, .port_ops = &cmd646r1_port_ops }, { /* CMD 648 */ - .sht = &cmd64x_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -425,7 +330,6 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) .port_ops = &cmd648_port_ops }, { /* CMD 649 */ - .sht = &cmd64x_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -435,12 +339,17 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) }; const struct ata_port_info *ppi[] = { &cmd_info[id->driver_data], NULL }; u8 mrdmode; + int rc; + + rc = pcim_enable_device(pdev); + if (rc) + return rc; pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev); class_rev &= 0xFF; if (id->driver_data == 0) /* 643 */ - ata_pci_clear_simplex(pdev); + ata_pci_bmdma_clear_simplex(pdev); if (pdev->device == PCI_DEVICE_ID_CMD_646) { /* Does UDMA work ? */ @@ -464,13 +373,20 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) pci_write_config_byte(pdev, UDIDETCR0, 0xF0); #endif - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &cmd64x_sht, NULL); } #ifdef CONFIG_PM static int cmd64x_reinit_one(struct pci_dev *pdev) { + struct ata_host *host = dev_get_drvdata(&pdev->dev); u8 mrdmode; + int rc; + + rc = ata_pci_device_do_resume(pdev); + if (rc) + return rc; + pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64); pci_read_config_byte(pdev, MRDMODE, &mrdmode); mrdmode &= ~ 0x30; /* IRQ set up */ @@ -479,7 +395,8 @@ static int cmd64x_reinit_one(struct pci_dev *pdev) #ifdef CONFIG_PPC pci_write_config_byte(pdev, UDIDETCR0, 0xF0); #endif - return ata_pci_device_resume(pdev); + ata_host_resume(host); + return 0; } #endif diff --git a/drivers/ata/pata_cs5520.c b/drivers/ata/pata_cs5520.c index 33f7f08..2bc8156 100644 --- a/drivers/ata/pata_cs5520.c +++ b/drivers/ata/pata_cs5520.c @@ -140,51 +140,16 @@ static void cs5520_set_piomode(struct ata_port *ap, struct ata_device *adev) } static struct scsi_host_template cs5520_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, + ATA_BMDMA_SHT(DRV_NAME), .sg_tablesize = LIBATA_DUMB_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, }; static struct ata_port_operations cs5520_port_ops = { + .inherits = &ata_bmdma_port_ops, + .qc_prep = ata_sff_dumb_qc_prep, + .cable_detect = ata_cable_40wire, .set_piomode = cs5520_set_piomode, .set_dmamode = cs5520_set_dmamode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_dumb_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; static int __devinit cs5520_init_one(struct pci_dev *pdev, const struct pci_device_id *id) @@ -198,11 +163,15 @@ static int __devinit cs5520_init_one(struct pci_dev *pdev, const struct pci_devi }; const struct ata_port_info *ppi[2]; u8 pcicfg; - void *iomap[5]; + void __iomem *iomap[5]; struct ata_host *host; struct ata_ioports *ioaddr; int i, rc; + rc = pcim_enable_device(pdev); + if (rc) + return rc; + /* IDE port enable bits */ pci_read_config_byte(pdev, 0x60, &pcicfg); @@ -258,7 +227,7 @@ static int __devinit cs5520_init_one(struct pci_dev *pdev, const struct pci_devi ioaddr->ctl_addr = iomap[1]; ioaddr->altstatus_addr = iomap[1]; ioaddr->bmdma_addr = iomap[4]; - ata_std_ports(ioaddr); + ata_sff_std_ports(ioaddr); ata_port_desc(host->ports[0], "cmd 0x%x ctl 0x%x", cmd_port[0], ctl_port[0]); @@ -269,7 +238,7 @@ static int __devinit cs5520_init_one(struct pci_dev *pdev, const struct pci_devi ioaddr->ctl_addr = iomap[3]; ioaddr->altstatus_addr = iomap[3]; ioaddr->bmdma_addr = iomap[4] + 8; - ata_std_ports(ioaddr); + ata_sff_std_ports(ioaddr); ata_port_desc(host->ports[1], "cmd 0x%x ctl 0x%x", cmd_port[1], ctl_port[1]); @@ -289,7 +258,7 @@ static int __devinit cs5520_init_one(struct pci_dev *pdev, const struct pci_devi continue; rc = devm_request_irq(&pdev->dev, irq[ap->port_no], - ata_interrupt, 0, DRV_NAME, host); + ata_sff_interrupt, 0, DRV_NAME, host); if (rc) return rc; @@ -310,11 +279,20 @@ static int __devinit cs5520_init_one(struct pci_dev *pdev, const struct pci_devi static int cs5520_reinit_one(struct pci_dev *pdev) { + struct ata_host *host = dev_get_drvdata(&pdev->dev); u8 pcicfg; + int rc; + + rc = ata_pci_device_do_resume(pdev); + if (rc) + return rc; + pci_read_config_byte(pdev, 0x60, &pcicfg); if ((pcicfg & 0x40) == 0) pci_write_config_byte(pdev, 0x60, pcicfg | 0x40); - return ata_pci_device_resume(pdev); + + ata_host_resume(host); + return 0; } /** diff --git a/drivers/ata/pata_cs5530.c b/drivers/ata/pata_cs5530.c index c168893..744beeb 100644 --- a/drivers/ata/pata_cs5530.c +++ b/drivers/ata/pata_cs5530.c @@ -133,7 +133,7 @@ static void cs5530_set_dmamode(struct ata_port *ap, struct ata_device *adev) } /** - * cs5530_qc_issue_prot - command issue + * cs5530_qc_issue - command issue * @qc: command pending * * Called when the libata layer is about to issue a command. We wrap @@ -142,7 +142,7 @@ static void cs5530_set_dmamode(struct ata_port *ap, struct ata_device *adev) * one MWDMA/UDMA bit. */ -static unsigned int cs5530_qc_issue_prot(struct ata_queued_cmd *qc) +static unsigned int cs5530_qc_issue(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct ata_device *adev = qc->dev; @@ -157,62 +157,26 @@ static unsigned int cs5530_qc_issue_prot(struct ata_queued_cmd *qc) cs5530_set_dmamode(ap, adev); } - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } static struct scsi_host_template cs5530_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_DUMB_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), + .sg_tablesize = LIBATA_DUMB_MAX_PRD, }; static struct ata_port_operations cs5530_port_ops = { - .set_piomode = cs5530_set_piomode, - .set_dmamode = cs5530_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .qc_prep = ata_dumb_qc_prep, - .qc_issue = cs5530_qc_issue_prot, + .inherits = &ata_bmdma_port_ops, - .data_xfer = ata_data_xfer, + .qc_prep = ata_sff_dumb_qc_prep, + .qc_issue = cs5530_qc_issue, - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .cable_detect = ata_cable_40wire, + .set_piomode = cs5530_set_piomode, + .set_dmamode = cs5530_set_dmamode, }; -static struct dmi_system_id palmax_dmi_table[] = { +static const struct dmi_system_id palmax_dmi_table[] = { { .ident = "Palmax PD1100", .matches = { @@ -334,7 +298,6 @@ fail_put: static int cs5530_init_one(struct pci_dev *pdev, const struct pci_device_id *id) { static const struct ata_port_info info = { - .sht = &cs5530_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -343,12 +306,16 @@ static int cs5530_init_one(struct pci_dev *pdev, const struct pci_device_id *id) }; /* The docking connector doesn't do UDMA, and it seems not MWDMA */ static const struct ata_port_info info_palmax_secondary = { - .sht = &cs5530_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .port_ops = &cs5530_port_ops }; const struct ata_port_info *ppi[] = { &info, NULL }; + int rc; + + rc = pcim_enable_device(pdev); + if (rc) + return rc; /* Chip initialisation */ if (cs5530_init_chip()) @@ -358,16 +325,25 @@ static int cs5530_init_one(struct pci_dev *pdev, const struct pci_device_id *id) ppi[1] = &info_palmax_secondary; /* Now kick off ATA set up */ - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &cs5530_sht, NULL); } #ifdef CONFIG_PM static int cs5530_reinit_one(struct pci_dev *pdev) { + struct ata_host *host = dev_get_drvdata(&pdev->dev); + int rc; + + rc = ata_pci_device_do_resume(pdev); + if (rc) + return rc; + /* If we fail on resume we are doomed */ if (cs5530_init_chip()) - BUG(); - return ata_pci_device_resume(pdev); + return -EIO; + + ata_host_resume(host); + return 0; } #endif /* CONFIG_PM */ diff --git a/drivers/ata/pata_cs5535.c b/drivers/ata/pata_cs5535.c index 0132453..f1b6556 100644 --- a/drivers/ata/pata_cs5535.c +++ b/drivers/ata/pata_cs5535.c @@ -158,55 +158,14 @@ static void cs5535_set_dmamode(struct ata_port *ap, struct ata_device *adev) } static struct scsi_host_template cs5535_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct ata_port_operations cs5535_port_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = cs5535_cable_detect, .set_piomode = cs5535_set_piomode, .set_dmamode = cs5535_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = cs5535_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; /** @@ -222,7 +181,6 @@ static struct ata_port_operations cs5535_port_ops = { static int cs5535_init_one(struct pci_dev *dev, const struct pci_device_id *id) { static const struct ata_port_info info = { - .sht = &cs5535_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -241,7 +199,7 @@ static int cs5535_init_one(struct pci_dev *dev, const struct pci_device_id *id) rdmsr(ATAC_CH0D1_PIO, timings, dummy); if (CS5535_BAD_PIO(timings)) wrmsr(ATAC_CH0D1_PIO, 0xF7F4F7F4UL, 0); - return ata_pci_init_one(dev, ppi); + return ata_pci_sff_init_one(dev, ppi, &cs5535_sht, NULL); } static const struct pci_device_id cs5535[] = { diff --git a/drivers/ata/pata_cs5536.c b/drivers/ata/pata_cs5536.c index d753e56..73f8332 100644 --- a/drivers/ata/pata_cs5536.c +++ b/drivers/ata/pata_cs5536.c @@ -40,7 +40,7 @@ #include <asm/msr.h> #define DRV_NAME "pata_cs5536" -#define DRV_VERSION "0.0.6" +#define DRV_VERSION "0.0.7" enum { CFG = 0, @@ -85,7 +85,7 @@ static const u8 pci_reg[4] = { PCI_IDE_CFG, PCI_IDE_DTC, PCI_IDE_CAST, PCI_IDE_ETC, }; -static inline int cs5536_read(struct pci_dev *pdev, int reg, int *val) +static inline int cs5536_read(struct pci_dev *pdev, int reg, u32 *val) { if (unlikely(use_msr)) { u32 dummy; @@ -153,8 +153,8 @@ static void cs5536_set_piomode(struct ata_port *ap, struct ata_device *adev) struct ata_device *pair = ata_dev_pair(adev); int mode = adev->pio_mode - XFER_PIO_0; int cmdmode = mode; - int dshift = ap->port_no ? IDE_D1_SHIFT : IDE_D0_SHIFT; - int cshift = ap->port_no ? IDE_CAST_D1_SHIFT : IDE_CAST_D0_SHIFT; + int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT; + int cshift = adev->devno ? IDE_CAST_D1_SHIFT : IDE_CAST_D0_SHIFT; u32 dtc, cast, etc; if (pair) @@ -201,7 +201,7 @@ static void cs5536_set_dmamode(struct ata_port *ap, struct ata_device *adev) struct pci_dev *pdev = to_pci_dev(ap->host->dev); u32 dtc, etc; int mode = adev->dma_mode; - int dshift = ap->port_no ? IDE_D1_SHIFT : IDE_D0_SHIFT; + int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT; if (mode >= XFER_UDMA_0) { cs5536_read(pdev, ETC, &etc); @@ -221,55 +221,14 @@ static void cs5536_set_dmamode(struct ata_port *ap, struct ata_device *adev) } static struct scsi_host_template cs5536_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct ata_port_operations cs5536_port_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = cs5536_cable_detect, .set_piomode = cs5536_set_piomode, .set_dmamode = cs5536_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = cs5536_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_port_start, }; /** @@ -282,7 +241,6 @@ static struct ata_port_operations cs5536_port_ops = { static int cs5536_init_one(struct pci_dev *dev, const struct pci_device_id *id) { static const struct ata_port_info info = { - .sht = &cs5536_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -303,7 +261,7 @@ static int cs5536_init_one(struct pci_dev *dev, const struct pci_device_id *id) return -ENODEV; } - return ata_pci_init_one(dev, ppi); + return ata_pci_sff_init_one(dev, ppi, &cs5536_sht, NULL); } static const struct pci_device_id cs5536[] = { diff --git a/drivers/ata/pata_cypress.c b/drivers/ata/pata_cypress.c index fc5f9c4..2ff6260 100644 --- a/drivers/ata/pata_cypress.c +++ b/drivers/ata/pata_cypress.c @@ -62,14 +62,14 @@ static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev) return; } - time_16 = FIT(t.recover, 0, 15) | (FIT(t.active, 0, 15) << 4); - time_8 = FIT(t.act8b, 0, 15) | (FIT(t.rec8b, 0, 15) << 4); + time_16 = clamp_val(t.recover, 0, 15) | (clamp_val(t.active, 0, 15) << 4); + time_8 = clamp_val(t.act8b, 0, 15) | (clamp_val(t.rec8b, 0, 15) << 4); if (adev->devno == 0) { pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); addr &= ~0x0F; /* Mask bits */ - addr |= FIT(t.setup, 0, 15); + addr |= clamp_val(t.setup, 0, 15); pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16); @@ -79,7 +79,7 @@ static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev) pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); addr &= ~0xF0; /* Mask bits */ - addr |= (FIT(t.setup, 0, 15) << 4); + addr |= (clamp_val(t.setup, 0, 15) << 4); pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16); @@ -110,61 +110,19 @@ static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev) } static struct scsi_host_template cy82c693_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct ata_port_operations cy82c693_port_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = ata_cable_40wire, .set_piomode = cy82c693_set_piomode, .set_dmamode = cy82c693_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *id) { static const struct ata_port_info info = { - .sht = &cy82c693_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -178,7 +136,7 @@ static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *i if (PCI_FUNC(pdev->devfn) != 1) return -ENODEV; - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &cy82c693_sht, NULL); } static const struct pci_device_id cy82c693[] = { diff --git a/drivers/ata/pata_efar.c b/drivers/ata/pata_efar.c index 043dcd3..9fba829 100644 --- a/drivers/ata/pata_efar.c +++ b/drivers/ata/pata_efar.c @@ -45,20 +45,7 @@ static int efar_pre_reset(struct ata_link *link, unsigned long deadline) if (!pci_test_config_bits(pdev, &efar_enable_bits[ap->port_no])) return -ENOENT; - return ata_std_prereset(link, deadline); -} - -/** - * efar_probe_reset - Probe specified port on PATA host controller - * @ap: Port to probe - * - * LOCKING: - * None (inherited from caller). - */ - -static void efar_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, efar_pre_reset, ata_std_softreset, NULL, ata_std_postreset); + return ata_sff_prereset(link, deadline); } /** @@ -135,7 +122,7 @@ static void efar_set_piomode (struct ata_port *ap, struct ata_device *adev) idetm_data &= 0xCC0F; idetm_data |= (control << 4); - /* Slave timing in seperate register */ + /* Slave timing in separate register */ pci_read_config_byte(dev, 0x44, &slave_data); slave_data &= 0x0F << shift; slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift; @@ -233,53 +220,15 @@ static void efar_set_dmamode (struct ata_port *ap, struct ata_device *adev) } static struct scsi_host_template efar_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations efar_ops = { +static struct ata_port_operations efar_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = efar_cable_detect, .set_piomode = efar_set_piomode, .set_dmamode = efar_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = efar_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = efar_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .prereset = efar_pre_reset, }; @@ -301,7 +250,6 @@ static int efar_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) { static int printed_version; static const struct ata_port_info info = { - .sht = &efar_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma1-2 */ @@ -314,7 +262,7 @@ static int efar_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &efar_sht, NULL); } static const struct pci_device_id efar_pci_tbl[] = { diff --git a/drivers/ata/pata_hpt366.c b/drivers/ata/pata_hpt366.c index 0713872..f2b83ea 100644 --- a/drivers/ata/pata_hpt366.c +++ b/drivers/ata/pata_hpt366.c @@ -27,7 +27,7 @@ #include <linux/libata.h> #define DRV_NAME "pata_hpt366" -#define DRV_VERSION "0.6.1" +#define DRV_VERSION "0.6.2" struct hpt_clock { u8 xfer_speed; @@ -180,11 +180,11 @@ static unsigned long hpt366_filter(struct ata_device *adev, unsigned long mask) if (hpt_dma_blacklisted(adev, "UDMA", bad_ata33)) mask &= ~ATA_MASK_UDMA; if (hpt_dma_blacklisted(adev, "UDMA3", bad_ata66_3)) - mask &= ~(0x07 << ATA_SHIFT_UDMA); + mask &= ~(0xF8 << ATA_SHIFT_UDMA); if (hpt_dma_blacklisted(adev, "UDMA4", bad_ata66_4)) - mask &= ~(0x0F << ATA_SHIFT_UDMA); + mask &= ~(0xF0 << ATA_SHIFT_UDMA); } - return ata_pci_default_filter(adev, mask); + return ata_bmdma_mode_filter(adev, mask); } /** @@ -290,21 +290,7 @@ static void hpt366_set_dmamode(struct ata_port *ap, struct ata_device *adev) } static struct scsi_host_template hpt36x_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; /* @@ -312,37 +298,11 @@ static struct scsi_host_template hpt36x_sht = { */ static struct ata_port_operations hpt366_port_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = hpt36x_cable_detect, + .mode_filter = hpt366_filter, .set_piomode = hpt366_set_piomode, .set_dmamode = hpt366_set_dmamode, - .mode_filter = hpt366_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = hpt36x_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; /** @@ -390,18 +350,22 @@ static void hpt36x_init_chipset(struct pci_dev *dev) static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id) { static const struct ata_port_info info_hpt366 = { - .sht = &hpt36x_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, .udma_mask = ATA_UDMA4, .port_ops = &hpt366_port_ops }; - struct ata_port_info info = info_hpt366; - const struct ata_port_info *ppi[] = { &info, NULL }; + const struct ata_port_info *ppi[] = { &info_hpt366, NULL }; + void *hpriv = NULL; u32 class_rev; u32 reg1; + int rc; + + rc = pcim_enable_device(dev); + if (rc) + return rc; pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); class_rev &= 0xFF; @@ -419,24 +383,31 @@ static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id) /* info_hpt366 is safe against re-entry so we can scribble on it */ switch((reg1 & 0x700) >> 8) { case 5: - info.private_data = &hpt366_40; + hpriv = &hpt366_40; break; case 9: - info.private_data = &hpt366_25; + hpriv = &hpt366_25; break; default: - info.private_data = &hpt366_33; + hpriv = &hpt366_33; break; } /* Now kick off ATA set up */ - return ata_pci_init_one(dev, ppi); + return ata_pci_sff_init_one(dev, ppi, &hpt36x_sht, hpriv); } #ifdef CONFIG_PM static int hpt36x_reinit_one(struct pci_dev *dev) { + struct ata_host *host = dev_get_drvdata(&dev->dev); + int rc; + + rc = ata_pci_device_do_resume(dev); + if (rc) + return rc; hpt36x_init_chipset(dev); - return ata_pci_device_resume(dev); + ata_host_resume(host); + return 0; } #endif diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c index 46dc70e..4216399 100644 --- a/drivers/ata/pata_hpt37x.c +++ b/drivers/ata/pata_hpt37x.c @@ -24,7 +24,7 @@ #include <linux/libata.h> #define DRV_NAME "pata_hpt37x" -#define DRV_VERSION "0.6.9" +#define DRV_VERSION "0.6.11" struct hpt_clock { u8 xfer_speed; @@ -281,9 +281,9 @@ static unsigned long hpt370_filter(struct ata_device *adev, unsigned long mask) if (hpt_dma_blacklisted(adev, "UDMA", bad_ata33)) mask &= ~ATA_MASK_UDMA; if (hpt_dma_blacklisted(adev, "UDMA100", bad_ata100_5)) - mask &= ~(0x1F << ATA_SHIFT_UDMA); + mask &= ~(0xE0 << ATA_SHIFT_UDMA); } - return ata_pci_default_filter(adev, mask); + return ata_bmdma_mode_filter(adev, mask); } /** @@ -297,9 +297,9 @@ static unsigned long hpt370a_filter(struct ata_device *adev, unsigned long mask) { if (adev->class == ATA_DEV_ATA) { if (hpt_dma_blacklisted(adev, "UDMA100", bad_ata100_5)) - mask &= ~ (0x1F << ATA_SHIFT_UDMA); + mask &= ~(0xE0 << ATA_SHIFT_UDMA); } - return ata_pci_default_filter(adev, mask); + return ata_bmdma_mode_filter(adev, mask); } /** @@ -338,22 +338,10 @@ static int hpt37x_pre_reset(struct ata_link *link, unsigned long deadline) pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37); udelay(100); - return ata_std_prereset(link, deadline); + return ata_sff_prereset(link, deadline); } -/** - * hpt37x_error_handler - reset the hpt374 - * @ap: ATA port to reset - * - * Perform probe for HPT37x, except for HPT374 channel 2 - */ - -static void hpt37x_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, hpt37x_pre_reset, ata_std_softreset, NULL, ata_std_postreset); -} - -static int hpt374_pre_reset(struct ata_link *link, unsigned long deadline) +static int hpt374_fn1_pre_reset(struct ata_link *link, unsigned long deadline) { static const struct pci_bits hpt37x_enable_bits[] = { { 0x50, 1, 0x04, 0x04 }, @@ -375,7 +363,7 @@ static int hpt374_pre_reset(struct ata_link *link, unsigned long deadline) pci_write_config_word(pdev, mcrbase + 2, mcr3 | 0x8000); pci_read_config_byte(pdev, 0x5A, &ata66); /* Reset TCBLID/FCBLID to output */ - pci_write_config_word(pdev, 0x52, mcr3); + pci_write_config_word(pdev, mcrbase + 2, mcr3); if (ata66 & (2 >> ap->port_no)) ap->cbl = ATA_CBL_PATA40; @@ -386,26 +374,7 @@ static int hpt374_pre_reset(struct ata_link *link, unsigned long deadline) pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37); udelay(100); - return ata_std_prereset(link, deadline); -} - -/** - * hpt374_error_handler - reset the hpt374 - * @classes: - * - * The 374 cable detect is a little different due to the extra - * channels. The function 0 channels work like usual but function 1 - * is special - */ - -static void hpt374_error_handler(struct ata_port *ap) -{ - struct pci_dev *pdev = to_pci_dev(ap->host->dev); - - if (!(PCI_FUNC(pdev->devfn) & 1)) - hpt37x_error_handler(ap); - else - ata_bmdma_drive_eh(ap, hpt374_pre_reset, ata_std_softreset, NULL, ata_std_postreset); + return ata_sff_prereset(link, deadline); } /** @@ -619,21 +588,7 @@ static void hpt37x_bmdma_stop(struct ata_queued_cmd *qc) static struct scsi_host_template hpt37x_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; /* @@ -641,36 +596,15 @@ static struct scsi_host_template hpt37x_sht = { */ static struct ata_port_operations hpt370_port_ops = { - .set_piomode = hpt370_set_piomode, - .set_dmamode = hpt370_set_dmamode, - .mode_filter = hpt370_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, + .inherits = &ata_bmdma_port_ops, - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = hpt37x_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - - .bmdma_setup = ata_bmdma_setup, .bmdma_start = hpt370_bmdma_start, .bmdma_stop = hpt370_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .mode_filter = hpt370_filter, + .set_piomode = hpt370_set_piomode, + .set_dmamode = hpt370_set_dmamode, + .prereset = hpt37x_pre_reset, }; /* @@ -678,36 +612,8 @@ static struct ata_port_operations hpt370_port_ops = { */ static struct ata_port_operations hpt370a_port_ops = { - .set_piomode = hpt370_set_piomode, - .set_dmamode = hpt370_set_dmamode, + .inherits = &hpt370_port_ops, .mode_filter = hpt370a_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = hpt37x_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = hpt370_bmdma_start, - .bmdma_stop = hpt370_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; /* @@ -716,74 +622,23 @@ static struct ata_port_operations hpt370a_port_ops = { */ static struct ata_port_operations hpt372_port_ops = { - .set_piomode = hpt372_set_piomode, - .set_dmamode = hpt372_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, + .inherits = &ata_bmdma_port_ops, - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = hpt37x_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, .bmdma_stop = hpt37x_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .set_piomode = hpt372_set_piomode, + .set_dmamode = hpt372_set_dmamode, + .prereset = hpt37x_pre_reset, }; /* * Configuration for HPT374. Mode setting works like 372 and friends - * but we have a different cable detection procedure. + * but we have a different cable detection procedure for function 1. */ -static struct ata_port_operations hpt374_port_ops = { - .set_piomode = hpt372_set_piomode, - .set_dmamode = hpt372_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = hpt374_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = hpt37x_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, +static struct ata_port_operations hpt374_fn1_port_ops = { + .inherits = &hpt372_port_ops, + .prereset = hpt374_fn1_pre_reset, }; /** @@ -847,15 +702,16 @@ static u32 hpt374_read_freq(struct pci_dev *pdev) u32 freq; unsigned long io_base = pci_resource_start(pdev, 4); if (PCI_FUNC(pdev->devfn) & 1) { - struct pci_dev *pdev_0 = pci_get_slot(pdev->bus, pdev->devfn - 1); + struct pci_dev *pdev_0; + + pdev_0 = pci_get_slot(pdev->bus, pdev->devfn - 1); /* Someone hot plugged the controller on us ? */ if (pdev_0 == NULL) return 0; io_base = pci_resource_start(pdev_0, 4); freq = inl(io_base + 0x90); pci_dev_put(pdev_0); - } - else + } else freq = inl(io_base + 0x90); return freq; } @@ -896,7 +752,6 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) { /* HPT370 - UDMA100 */ static const struct ata_port_info info_hpt370 = { - .sht = &hpt37x_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -905,7 +760,6 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) }; /* HPT370A - UDMA100 */ static const struct ata_port_info info_hpt370a = { - .sht = &hpt37x_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -914,7 +768,6 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) }; /* HPT370 - UDMA100 */ static const struct ata_port_info info_hpt370_33 = { - .sht = &hpt37x_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -923,7 +776,6 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) }; /* HPT370A - UDMA100 */ static const struct ata_port_info info_hpt370a_33 = { - .sht = &hpt37x_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -932,28 +784,31 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) }; /* HPT371, 372 and friends - UDMA133 */ static const struct ata_port_info info_hpt372 = { - .sht = &hpt37x_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, .udma_mask = ATA_UDMA6, .port_ops = &hpt372_port_ops }; - /* HPT374 - UDMA100 */ - static const struct ata_port_info info_hpt374 = { - .sht = &hpt37x_sht, + /* HPT374 - UDMA100, function 1 uses different prereset method */ + static const struct ata_port_info info_hpt374_fn0 = { .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, .udma_mask = ATA_UDMA5, - .port_ops = &hpt374_port_ops + .port_ops = &hpt372_port_ops + }; + static const struct ata_port_info info_hpt374_fn1 = { + .flags = ATA_FLAG_SLAVE_POSS, + .pio_mask = 0x1f, + .mwdma_mask = 0x07, + .udma_mask = ATA_UDMA5, + .port_ops = &hpt374_fn1_port_ops }; static const int MHz[4] = { 33, 40, 50, 66 }; - const struct ata_port_info *port; void *private_data = NULL; - struct ata_port_info port_info; - const struct ata_port_info *ppi[] = { &port_info, NULL }; + const struct ata_port_info *ppi[] = { NULL, NULL }; u8 irqmask; u32 class_rev; @@ -965,6 +820,11 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) const struct hpt_chip *chip_table; int clock_slot; + int rc; + + rc = pcim_enable_device(dev); + if (rc) + return rc; pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); class_rev &= 0xFF; @@ -980,17 +840,17 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) switch(class_rev) { case 3: - port = &info_hpt370; + ppi[0] = &info_hpt370; chip_table = &hpt370; prefer_dpll = 0; break; case 4: - port = &info_hpt370a; + ppi[0] = &info_hpt370a; chip_table = &hpt370a; prefer_dpll = 0; break; case 5: - port = &info_hpt372; + ppi[0] = &info_hpt372; chip_table = &hpt372; break; default: @@ -1003,21 +863,21 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) /* 372N if rev >= 2*/ if (class_rev >= 2) return -ENODEV; - port = &info_hpt372; + ppi[0] = &info_hpt372; chip_table = &hpt372a; break; case PCI_DEVICE_ID_TTI_HPT302: /* 302N if rev > 1 */ if (class_rev > 1) return -ENODEV; - port = &info_hpt372; + ppi[0] = &info_hpt372; /* Check this */ chip_table = &hpt302; break; case PCI_DEVICE_ID_TTI_HPT371: if (class_rev > 1) return -ENODEV; - port = &info_hpt372; + ppi[0] = &info_hpt372; chip_table = &hpt371; /* Single channel device, master is not present but the BIOS (or us for non x86) must mark it @@ -1028,7 +888,10 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) break; case PCI_DEVICE_ID_TTI_HPT374: chip_table = &hpt374; - port = &info_hpt374; + if (!(PCI_FUNC(dev->devfn) & 1)) + *ppi = &info_hpt374_fn0; + else + *ppi = &info_hpt374_fn1; break; default: printk(KERN_ERR "pata_hpt37x: PCI table is bogus please report (%d).\n", dev->device); @@ -1107,7 +970,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) int dpll, adjust; /* Compute DPLL */ - dpll = (port->udma_mask & 0xC0) ? 3 : 2; + dpll = (ppi[0]->udma_mask & 0xC0) ? 3 : 2; f_low = (MHz[clock_slot] * 48) / MHz[dpll]; f_high = f_low + 2; @@ -1147,19 +1010,16 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) * about lack of UDMA133 support on lower clocks */ - if (clock_slot < 2 && port == &info_hpt370) - port = &info_hpt370_33; - if (clock_slot < 2 && port == &info_hpt370a) - port = &info_hpt370a_33; + if (clock_slot < 2 && ppi[0] == &info_hpt370) + ppi[0] = &info_hpt370_33; + if (clock_slot < 2 && ppi[0] == &info_hpt370a) + ppi[0] = &info_hpt370a_33; printk(KERN_INFO "pata_hpt37x: %s using %dMHz bus clock.\n", chip_table->name, MHz[clock_slot]); } /* Now kick off ATA set up */ - port_info = *port; - port_info.private_data = private_data; - - return ata_pci_init_one(dev, ppi); + return ata_pci_sff_init_one(dev, ppi, &hpt37x_sht, private_data); } static const struct pci_device_id hpt37x[] = { diff --git a/drivers/ata/pata_hpt3x2n.c b/drivers/ata/pata_hpt3x2n.c index 9f1c084..d5c9fd7 100644 --- a/drivers/ata/pata_hpt3x2n.c +++ b/drivers/ata/pata_hpt3x2n.c @@ -148,7 +148,7 @@ static int hpt3x2n_cable_detect(struct ata_port *ap) * Reset the hardware and state machine, */ -static int hpt3xn_pre_reset(struct ata_link *link, unsigned long deadline) +static int hpt3x2n_pre_reset(struct ata_link *link, unsigned long deadline) { struct ata_port *ap = link->ap; struct pci_dev *pdev = to_pci_dev(ap->host->dev); @@ -156,19 +156,7 @@ static int hpt3xn_pre_reset(struct ata_link *link, unsigned long deadline) pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37); udelay(100); - return ata_std_prereset(link, deadline); -} - -/** - * hpt3x2n_error_handler - probe the hpt3x2n bus - * @ap: ATA port to reset - * - * Perform the probe reset handling for the 3x2N - */ - -static void hpt3x2n_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, hpt3xn_pre_reset, ata_std_softreset, NULL, ata_std_postreset); + return ata_sff_prereset(link, deadline); } /** @@ -320,7 +308,7 @@ static int hpt3x2n_use_dpll(struct ata_port *ap, int writing) return 0; } -static unsigned int hpt3x2n_qc_issue_prot(struct ata_queued_cmd *qc) +static unsigned int hpt3x2n_qc_issue(struct ata_queued_cmd *qc) { struct ata_taskfile *tf = &qc->tf; struct ata_port *ap = qc->ap; @@ -335,25 +323,11 @@ static unsigned int hpt3x2n_qc_issue_prot(struct ata_queued_cmd *qc) hpt3x2n_set_clock(ap, 0x23); } } - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } static struct scsi_host_template hpt3x2n_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; /* @@ -361,37 +335,15 @@ static struct scsi_host_template hpt3x2n_sht = { */ static struct ata_port_operations hpt3x2n_port_ops = { - .set_piomode = hpt3x2n_set_piomode, - .set_dmamode = hpt3x2n_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = hpt3x2n_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = hpt3x2n_cable_detect, + .inherits = &ata_bmdma_port_ops, - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, .bmdma_stop = hpt3x2n_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = hpt3x2n_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, + .qc_issue = hpt3x2n_qc_issue, - .port_start = ata_sff_port_start, + .cable_detect = hpt3x2n_cable_detect, + .set_piomode = hpt3x2n_set_piomode, + .set_dmamode = hpt3x2n_set_dmamode, + .prereset = hpt3x2n_pre_reset, }; /** @@ -488,15 +440,13 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id) { /* HPT372N and friends - UDMA133 */ static const struct ata_port_info info = { - .sht = &hpt3x2n_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, .udma_mask = ATA_UDMA6, .port_ops = &hpt3x2n_port_ops }; - struct ata_port_info port = info; - const struct ata_port_info *ppi[] = { &port, NULL }; + const struct ata_port_info *ppi[] = { &info, NULL }; u8 irqmask; u32 class_rev; @@ -505,6 +455,12 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id) unsigned int f_low, f_high; int adjust; unsigned long iobase = pci_resource_start(dev, 4); + void *hpriv = NULL; + int rc; + + rc = pcim_enable_device(dev); + if (rc) + return rc; pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); class_rev &= 0xFF; @@ -586,9 +542,8 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id) pci_mhz); /* Set our private data up. We only need a few flags so we use it directly */ - port.private_data = NULL; if (pci_mhz > 60) { - port.private_data = (void *)PCI66; + hpriv = (void *)PCI66; /* * On HPT371N, if ATA clock is 66 MHz we must set bit 2 in * the MISC. register to stretch the UltraDMA Tss timing. @@ -599,7 +554,7 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id) } /* Now kick off ATA set up */ - return ata_pci_init_one(dev, ppi); + return ata_pci_sff_init_one(dev, ppi, &hpt3x2n_sht, hpriv); } static const struct pci_device_id hpt3x2n[] = { diff --git a/drivers/ata/pata_hpt3x3.c b/drivers/ata/pata_hpt3x3.c index cb8bdb6..f11a320 100644 --- a/drivers/ata/pata_hpt3x3.c +++ b/drivers/ata/pata_hpt3x3.c @@ -102,58 +102,17 @@ static int hpt3x3_atapi_dma(struct ata_queued_cmd *qc) } static struct scsi_host_template hpt3x3_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct ata_port_operations hpt3x3_port_ops = { + .inherits = &ata_bmdma_port_ops, + .check_atapi_dma= hpt3x3_atapi_dma, + .cable_detect = ata_cable_40wire, .set_piomode = hpt3x3_set_piomode, #if defined(CONFIG_PATA_HPT3X3_DMA) .set_dmamode = hpt3x3_set_dmamode, #endif - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .check_atapi_dma= hpt3x3_atapi_dma, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; /** @@ -189,7 +148,6 @@ static int hpt3x3_init_one(struct pci_dev *pdev, const struct pci_device_id *id) { static int printed_version; static const struct ata_port_info info = { - .sht = &hpt3x3_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, #if defined(CONFIG_PATA_HPT3X3_DMA) @@ -244,15 +202,15 @@ static int hpt3x3_init_one(struct pci_dev *pdev, const struct pci_device_id *id) ioaddr->altstatus_addr = ioaddr->ctl_addr = base + offset_ctl[i]; ioaddr->scr_addr = NULL; - ata_std_ports(ioaddr); + ata_sff_std_ports(ioaddr); ioaddr->bmdma_addr = base + 8 * i; ata_port_pbar_desc(ap, 4, -1, "ioport"); ata_port_pbar_desc(ap, 4, offset_cmd[i], "cmd"); } pci_set_master(pdev); - return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED, - &hpt3x3_sht); + return ata_host_activate(host, pdev->irq, ata_sff_interrupt, + IRQF_SHARED, &hpt3x3_sht); } #ifdef CONFIG_PM diff --git a/drivers/ata/pata_icside.c b/drivers/ata/pata_icside.c index 842fe08..a1e9352 100644 --- a/drivers/ata/pata_icside.c +++ b/drivers/ata/pata_icside.c @@ -249,7 +249,7 @@ static void pata_icside_bmdma_setup(struct ata_queued_cmd *qc) set_dma_mode(state->dma, write ? DMA_MODE_WRITE : DMA_MODE_READ); /* issue r/w command */ - ap->ops->exec_command(ap, &qc->tf); + ap->ops->sff_exec_command(ap, &qc->tf); } static void pata_icside_bmdma_start(struct ata_queued_cmd *qc) @@ -269,7 +269,7 @@ static void pata_icside_bmdma_stop(struct ata_queued_cmd *qc) disable_dma(state->dma); /* see ata_bmdma_stop */ - ata_altstatus(ap); + ata_sff_dma_pause(ap); } static u8 pata_icside_bmdma_status(struct ata_port *ap) @@ -303,42 +303,19 @@ static int icside_dma_init(struct pata_icside_info *info) } -static int pata_icside_port_start(struct ata_port *ap) -{ - /* No PRD to alloc */ - return ata_pad_alloc(ap, ap->dev); -} - static struct scsi_host_template pata_icside_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, + ATA_BASE_SHT(DRV_NAME), .sg_tablesize = PATA_ICSIDE_MAX_SG, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, .dma_boundary = ~0, /* no dma boundaries */ - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, }; -/* wish this was exported from libata-core */ -static void ata_dummy_noret(struct ata_port *port) -{ -} - static void pata_icside_postreset(struct ata_link *link, unsigned int *classes) { struct ata_port *ap = link->ap; struct pata_icside_state *state = ap->host->private_data; if (classes[0] != ATA_DEV_NONE || classes[1] != ATA_DEV_NONE) - return ata_std_postreset(link, classes); + return ata_sff_postreset(link, classes); state->port[ap->port_no].disabled = 1; @@ -354,44 +331,20 @@ static void pata_icside_postreset(struct ata_link *link, unsigned int *classes) } } -static void pata_icside_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, ata_std_prereset, ata_std_softreset, NULL, - pata_icside_postreset); -} - static struct ata_port_operations pata_icside_port_ops = { - .set_dmamode = pata_icside_set_dmamode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .exec_command = ata_exec_command, - .check_status = ata_check_status, - .dev_select = ata_std_dev_select, - - .cable_detect = ata_cable_40wire, - - .bmdma_setup = pata_icside_bmdma_setup, - .bmdma_start = pata_icside_bmdma_start, - - .data_xfer = ata_data_xfer_noirq, - + .inherits = &ata_sff_port_ops, /* no need to build any PRD tables for DMA */ .qc_prep = ata_noop_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = pata_icside_error_handler, - .post_internal_cmd = pata_icside_bmdma_stop, - - .irq_clear = ata_dummy_noret, - .irq_on = ata_irq_on, - - .port_start = pata_icside_port_start, - + .sff_data_xfer = ata_sff_data_xfer_noirq, + .bmdma_setup = pata_icside_bmdma_setup, + .bmdma_start = pata_icside_bmdma_start, .bmdma_stop = pata_icside_bmdma_stop, .bmdma_status = pata_icside_bmdma_status, + + .cable_detect = ata_cable_40wire, + .set_dmamode = pata_icside_set_dmamode, + .postreset = pata_icside_postreset, + .post_internal_cmd = pata_icside_bmdma_stop, }; static void __devinit @@ -527,7 +480,7 @@ static int __devinit pata_icside_add_ports(struct pata_icside_info *info) pata_icside_setup_ioaddr(ap, info->base, info, info->port[i]); } - return ata_host_activate(host, ec->irq, ata_interrupt, 0, + return ata_host_activate(host, ec->irq, ata_sff_interrupt, 0, &pata_icside_sht); } diff --git a/drivers/ata/pata_isapnp.c b/drivers/ata/pata_isapnp.c index 4320e79..6a111ba 100644 --- a/drivers/ata/pata_isapnp.c +++ b/drivers/ata/pata_isapnp.c @@ -20,45 +20,12 @@ #define DRV_VERSION "0.2.2" static struct scsi_host_template isapnp_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_PIO_SHT(DRV_NAME), }; static struct ata_port_operations isapnp_port_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, + .inherits = &ata_sff_port_ops, .cable_detect = ata_cable_40wire, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; /** @@ -83,7 +50,7 @@ static int isapnp_init_one(struct pnp_dev *idev, const struct pnp_device_id *dev if (pnp_irq_valid(idev, 0)) { irq = pnp_irq(idev, 0); - handler = ata_interrupt; + handler = ata_sff_interrupt; } /* allocate host */ @@ -111,7 +78,7 @@ static int isapnp_init_one(struct pnp_dev *idev, const struct pnp_device_id *dev ap->ioaddr.ctl_addr = ctl_addr; } - ata_std_ports(&ap->ioaddr); + ata_sff_std_ports(&ap->ioaddr); ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx", (unsigned long long)pnp_port_start(idev, 0), diff --git a/drivers/ata/pata_it8213.c b/drivers/ata/pata_it8213.c index 1eda821..c113d7c 100644 --- a/drivers/ata/pata_it8213.c +++ b/drivers/ata/pata_it8213.c @@ -40,20 +40,7 @@ static int it8213_pre_reset(struct ata_link *link, unsigned long deadline) if (!pci_test_config_bits(pdev, &it8213_enable_bits[ap->port_no])) return -ENOENT; - return ata_std_prereset(link, deadline); -} - -/** - * it8213_error_handler - Probe specified port on PATA host controller - * @ap: Port to probe - * - * LOCKING: - * None (inherited from caller). - */ - -static void it8213_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, it8213_pre_reset, ata_std_softreset, NULL, ata_std_postreset); + return ata_sff_prereset(link, deadline); } /** @@ -128,7 +115,7 @@ static void it8213_set_piomode (struct ata_port *ap, struct ata_device *adev) idetm_data &= 0xCC0F; idetm_data |= (control << 4); - /* Slave timing in seperate register */ + /* Slave timing in separate register */ pci_read_config_byte(dev, 0x44, &slave_data); slave_data &= 0xF0; slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << 4; @@ -243,53 +230,16 @@ static void it8213_set_dmamode (struct ata_port *ap, struct ata_device *adev) } static struct scsi_host_template it8213_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .max_sectors = ATA_MAX_SECTORS, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations it8213_ops = { + +static struct ata_port_operations it8213_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = it8213_cable_detect, .set_piomode = it8213_set_piomode, .set_dmamode = it8213_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = it8213_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = it8213_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .prereset = it8213_pre_reset, }; @@ -311,7 +261,6 @@ static int it8213_init_one (struct pci_dev *pdev, const struct pci_device_id *en { static int printed_version; static const struct ata_port_info info = { - .sht = &it8213_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ @@ -325,7 +274,7 @@ static int it8213_init_one (struct pci_dev *pdev, const struct pci_device_id *en dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &it8213_sht, NULL); } static const struct pci_device_id it8213_pci_tbl[] = { diff --git a/drivers/ata/pata_it821x.c b/drivers/ata/pata_it821x.c index d8c4f4e..e108169 100644 --- a/drivers/ata/pata_it821x.c +++ b/drivers/ata/pata_it821x.c @@ -395,11 +395,11 @@ static void it821x_passthru_dev_select(struct ata_port *ap, it821x_program(ap, adev, itdev->pio[adev->devno]); itdev->last_device = device; } - ata_std_dev_select(ap, device); + ata_sff_dev_select(ap, device); } /** - * it821x_smart_qc_issue_prot - wrap qc issue prot + * it821x_smart_qc_issue - wrap qc issue prot * @qc: command * * Wrap the command issue sequence for the IT821x. We need to @@ -407,7 +407,7 @@ static void it821x_passthru_dev_select(struct ata_port *ap, * usual happenings kick off */ -static unsigned int it821x_smart_qc_issue_prot(struct ata_queued_cmd *qc) +static unsigned int it821x_smart_qc_issue(struct ata_queued_cmd *qc) { switch(qc->tf.command) { @@ -427,14 +427,14 @@ static unsigned int it821x_smart_qc_issue_prot(struct ata_queued_cmd *qc) case ATA_CMD_ID_ATA: /* Arguably should just no-op this one */ case ATA_CMD_SET_FEATURES: - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } printk(KERN_DEBUG "it821x: can't process command 0x%02X\n", qc->tf.command); - return AC_ERR_INVALID; + return AC_ERR_DEV; } /** - * it821x_passthru_qc_issue_prot - wrap qc issue prot + * it821x_passthru_qc_issue - wrap qc issue prot * @qc: command * * Wrap the command issue sequence for the IT821x. We need to @@ -442,10 +442,10 @@ static unsigned int it821x_smart_qc_issue_prot(struct ata_queued_cmd *qc) * usual happenings kick off */ -static unsigned int it821x_passthru_qc_issue_prot(struct ata_queued_cmd *qc) +static unsigned int it821x_passthru_qc_issue(struct ata_queued_cmd *qc) { it821x_passthru_dev_select(qc->ap, qc->dev->devno); - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } /** @@ -516,6 +516,37 @@ static void it821x_dev_config(struct ata_device *adev) printk("(%dK stripe)", adev->id[146]); printk(".\n"); } + /* This is a controller firmware triggered funny, don't + report the drive faulty! */ + adev->horkage &= ~ATA_HORKAGE_DIAGNOSTIC; +} + +/** + * it821x_ident_hack - Hack identify data up + * @ap: Port + * + * Walk the devices on this firmware driven port and slightly + * mash the identify data to stop us and common tools trying to + * use features not firmware supported. The firmware itself does + * some masking (eg SMART) but not enough. + * + * This is a bit of an abuse of the cable method, but it is the + * only method called at the right time. We could modify the libata + * core specifically for ident hacking but while we have one offender + * it seems better to keep the fallout localised. + */ + +static int it821x_ident_hack(struct ata_port *ap) +{ + struct ata_device *adev; + ata_link_for_each_dev(adev, &ap->link) { + if (ata_dev_enabled(adev)) { + adev->id[84] &= ~(1 << 6); /* No FUA */ + adev->id[85] &= ~(1 << 10); /* No HPA */ + adev->id[76] = 0; /* No NCQ/AN etc */ + } + } + return ata_cable_unknown(ap); } @@ -533,7 +564,7 @@ static int it821x_check_atapi_dma(struct ata_queued_cmd *qc) struct it821x_dev *itdev = ap->private_data; /* Only use dma for transfers to/from the media. */ - if (qc->nbytes < 2048) + if (ata_qc_raw_nbytes(qc) < 2048) return -EOPNOTSUPP; /* No ATAPI DMA in smart mode */ @@ -562,7 +593,6 @@ static int it821x_port_start(struct ata_port *ap) struct pci_dev *pdev = to_pci_dev(ap->host->dev); struct it821x_dev *itdev; u8 conf; - u8 pdev_revision; int ret = ata_sff_port_start(ap); if (ret < 0) @@ -591,8 +621,7 @@ static int it821x_port_start(struct ata_port *ap) itdev->want[1][1] = ATA_ANY; itdev->last_device = -1; - pci_read_config_byte(pdev, PCI_REVISION_ID, &pdev_revision); - if (pdev_revision == 0x10) { + if (pdev->revision == 0x10) { itdev->timing10 = 1; /* Need to disable ATAPI DMA for this case */ if (!itdev->smart) @@ -603,89 +632,34 @@ static int it821x_port_start(struct ata_port *ap) } static struct scsi_host_template it821x_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct ata_port_operations it821x_smart_port_ops = { - .set_mode = it821x_smart_set_mode, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .mode_filter = ata_pci_default_filter, + .inherits = &ata_bmdma_port_ops, - .check_status = ata_check_status, .check_atapi_dma= it821x_check_atapi_dma, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - .dev_config = it821x_dev_config, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_unknown, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = it821x_smart_qc_issue_prot, + .qc_issue = it821x_smart_qc_issue, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, + .cable_detect = it821x_ident_hack, + .set_mode = it821x_smart_set_mode, + .dev_config = it821x_dev_config, .port_start = it821x_port_start, }; static struct ata_port_operations it821x_passthru_port_ops = { - .set_piomode = it821x_passthru_set_piomode, - .set_dmamode = it821x_passthru_set_dmamode, - .mode_filter = ata_pci_default_filter, + .inherits = &ata_bmdma_port_ops, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, .check_atapi_dma= it821x_check_atapi_dma, - .dev_select = it821x_passthru_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_unknown, - - .bmdma_setup = ata_bmdma_setup, + .sff_dev_select = it821x_passthru_dev_select, .bmdma_start = it821x_passthru_bmdma_start, .bmdma_stop = it821x_passthru_bmdma_stop, - .bmdma_status = ata_bmdma_status, + .qc_issue = it821x_passthru_qc_issue, - .qc_prep = ata_qc_prep, - .qc_issue = it821x_passthru_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_clear = ata_bmdma_irq_clear, - .irq_handler = ata_interrupt, - .irq_on = ata_irq_on, + .cable_detect = ata_cable_unknown, + .set_piomode = it821x_passthru_set_piomode, + .set_dmamode = it821x_passthru_set_dmamode, .port_start = it821x_port_start, }; @@ -713,14 +687,12 @@ static int it821x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) u8 conf; static const struct ata_port_info info_smart = { - .sht = &it821x_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, .port_ops = &it821x_smart_port_ops }; static const struct ata_port_info info_passthru = { - .sht = &it821x_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -730,6 +702,11 @@ static int it821x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) const struct ata_port_info *ppi[] = { NULL, NULL }; static char *mode[2] = { "pass through", "smart" }; + int rc; + + rc = pcim_enable_device(pdev); + if (rc) + return rc; /* Force the card into bypass mode if so requested */ if (it8212_noraid) { @@ -745,16 +722,23 @@ static int it821x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) else ppi[0] = &info_smart; - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &it821x_sht, NULL); } #ifdef CONFIG_PM static int it821x_reinit_one(struct pci_dev *pdev) { + struct ata_host *host = dev_get_drvdata(&pdev->dev); + int rc; + + rc = ata_pci_device_do_resume(pdev); + if (rc) + return rc; /* Resume - turn raid back off if need be */ if (it8212_noraid) it821x_disable_raid(pdev); - return ata_pci_device_resume(pdev); + ata_host_resume(host); + return rc; } #endif diff --git a/drivers/ata/pata_ixp4xx_cf.c b/drivers/ata/pata_ixp4xx_cf.c index fcd532a..de8d186 100644 --- a/drivers/ata/pata_ixp4xx_cf.c +++ b/drivers/ata/pata_ixp4xx_cf.c @@ -42,13 +42,13 @@ static int ixp4xx_set_mode(struct ata_link *link, struct ata_device **error) return 0; } -static void ixp4xx_mmio_data_xfer(struct ata_device *adev, unsigned char *buf, - unsigned int buflen, int write_data) +static unsigned int ixp4xx_mmio_data_xfer(struct ata_device *dev, + unsigned char *buf, unsigned int buflen, int rw) { unsigned int i; unsigned int words = buflen >> 1; u16 *buf16 = (u16 *) buf; - struct ata_port *ap = adev->link->ap; + struct ata_port *ap = dev->link->ap; void __iomem *mmio = ap->ioaddr.data_addr; struct ixp4xx_pata_data *data = ap->host->dev->platform_data; @@ -59,81 +59,50 @@ static void ixp4xx_mmio_data_xfer(struct ata_device *adev, unsigned char *buf, udelay(100); /* Transfer multiple of 2 bytes */ - if (write_data) { - for (i = 0; i < words; i++) - writew(buf16[i], mmio); - } else { + if (rw == READ) for (i = 0; i < words; i++) buf16[i] = readw(mmio); - } + else + for (i = 0; i < words; i++) + writew(buf16[i], mmio); /* Transfer trailing 1 byte, if any. */ if (unlikely(buflen & 0x01)) { u16 align_buf[1] = { 0 }; unsigned char *trailing_buf = buf + buflen - 1; - if (write_data) { - memcpy(align_buf, trailing_buf, 1); - writew(align_buf[0], mmio); - } else { + if (rw == READ) { align_buf[0] = readw(mmio); memcpy(trailing_buf, align_buf, 1); + } else { + memcpy(align_buf, trailing_buf, 1); + writew(align_buf[0], mmio); } + words++; } udelay(100); *data->cs0_cfg |= 0x01; + + return words << 1; } static struct scsi_host_template ixp4xx_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_PIO_SHT(DRV_NAME), }; static struct ata_port_operations ixp4xx_port_ops = { - .set_mode = ixp4xx_set_mode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .exec_command = ata_exec_command, - .check_status = ata_check_status, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ixp4xx_mmio_data_xfer, + .inherits = &ata_sff_port_ops, + .sff_data_xfer = ixp4xx_mmio_data_xfer, .cable_detect = ata_cable_40wire, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_port_start, + .set_mode = ixp4xx_set_mode, }; -static void ixp4xx_setup_port(struct ata_ioports *ioaddr, +static void ixp4xx_setup_port(struct ata_port *ap, struct ixp4xx_pata_data *data, unsigned long raw_cs0, unsigned long raw_cs1) { + struct ata_ioports *ioaddr = &ap->ioaddr; unsigned long raw_cmd = raw_cs0; unsigned long raw_ctl = raw_cs1 + 0x06; @@ -141,7 +110,7 @@ static void ixp4xx_setup_port(struct ata_ioports *ioaddr, ioaddr->altstatus_addr = data->cs1 + 0x06; ioaddr->ctl_addr = data->cs1 + 0x06; - ata_std_ports(ioaddr); + ata_sff_std_ports(ioaddr); #ifndef __ARMEB__ @@ -217,7 +186,7 @@ static __devinit int ixp4xx_pata_probe(struct platform_device *pdev) dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); /* activate host */ - return ata_host_activate(host, irq, ata_interrupt, 0, &ixp4xx_sht); + return ata_host_activate(host, irq, ata_sff_interrupt, 0, &ixp4xx_sht); } static __devexit int ixp4xx_pata_remove(struct platform_device *dev) @@ -252,6 +221,7 @@ MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>"); MODULE_DESCRIPTION("low-level driver for ixp4xx Compact Flash PATA"); MODULE_LICENSE("GPL"); MODULE_VERSION(DRV_VERSION); +MODULE_ALIAS("platform:" DRV_NAME); module_init(ixp4xx_pata_init); module_exit(ixp4xx_pata_exit); diff --git a/drivers/ata/pata_jmicron.c b/drivers/ata/pata_jmicron.c index 5b8174d..73b7596 100644 --- a/drivers/ata/pata_jmicron.c +++ b/drivers/ata/pata_jmicron.c @@ -102,72 +102,18 @@ static int jmicron_pre_reset(struct ata_link *link, unsigned long deadline) ap->cbl = ATA_CBL_SATA; break; } - return ata_std_prereset(link, deadline); -} - -/** - * jmicron_error_handler - Setup and error handler - * @ap: Port to handle - * - * LOCKING: - * None (inherited from caller). - */ - -static void jmicron_error_handler(struct ata_port *ap) -{ - return ata_bmdma_drive_eh(ap, jmicron_pre_reset, ata_std_softreset, NULL, ata_std_postreset); + return ata_sff_prereset(link, deadline); } /* No PIO or DMA methods needed for this device */ static struct scsi_host_template jmicron_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - /* Use standard CHS mapping rules */ - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations jmicron_ops = { - /* Task file is PCI ATA format, use helpers */ - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = jmicron_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - - /* BMDMA handling is PCI ATA format, use helpers */ - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - /* IRQ-related hooks */ - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - /* Generic PATA PCI ATA helpers */ - .port_start = ata_port_start, +static struct ata_port_operations jmicron_ops = { + .inherits = &ata_bmdma_port_ops, + .prereset = jmicron_pre_reset, }; @@ -188,7 +134,6 @@ static const struct ata_port_operations jmicron_ops = { static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *id) { static const struct ata_port_info info = { - .sht = &jmicron_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, @@ -199,7 +144,7 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i }; const struct ata_port_info *ppi[] = { &info, NULL }; - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &jmicron_sht, NULL); } static const struct pci_device_id jmicron_pci_tbl[] = { diff --git a/drivers/ata/pata_legacy.c b/drivers/ata/pata_legacy.c index 7bed8d8..fe7cc8e 100644 --- a/drivers/ata/pata_legacy.c +++ b/drivers/ata/pata_legacy.c @@ -28,7 +28,6 @@ * * Unsupported but docs exist: * Appian/Adaptec AIC25VL01/Cirrus Logic PD7220 - * Winbond W83759A * * This driver handles legacy (that is "ISA/VLB side") IDE ports found * on PC class systems. There are three hybrid devices that are exceptions @@ -36,7 +35,7 @@ * the MPIIX where the tuning is PCI side but the IDE is "ISA side". * * Specific support is included for the ht6560a/ht6560b/opti82c611a/ - * opti82c465mv/promise 20230c/20630 + * opti82c465mv/promise 20230c/20630/winbond83759A * * Use the autospeed and pio_mask options with: * Appian ADI/2 aka CLPD7220 or AIC25VL01. @@ -47,9 +46,6 @@ * For now use autospeed and pio_mask as above with the W83759A. This may * change. * - * TODO - * Merge existing pata_qdi driver - * */ #include <linux/kernel.h> @@ -64,12 +60,13 @@ #include <linux/platform_device.h> #define DRV_NAME "pata_legacy" -#define DRV_VERSION "0.5.5" +#define DRV_VERSION "0.6.5" #define NR_HOST 6 -static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 }; -static int legacy_irq[NR_HOST] = { 14, 15, 11, 10, 8, 12 }; +static int all; +module_param(all, int, 0444); +MODULE_PARM_DESC(all, "Grab all legacy port devices, even if PCI(0=off, 1=on)"); struct legacy_data { unsigned long timing; @@ -80,21 +77,107 @@ struct legacy_data { }; +enum controller { + BIOS = 0, + SNOOP = 1, + PDC20230 = 2, + HT6560A = 3, + HT6560B = 4, + OPTI611A = 5, + OPTI46X = 6, + QDI6500 = 7, + QDI6580 = 8, + QDI6580DP = 9, /* Dual channel mode is different */ + W83759A = 10, + + UNKNOWN = -1 +}; + + +struct legacy_probe { + unsigned char *name; + unsigned long port; + unsigned int irq; + unsigned int slot; + enum controller type; + unsigned long private; +}; + +struct legacy_controller { + const char *name; + struct ata_port_operations *ops; + unsigned int pio_mask; + unsigned int flags; + int (*setup)(struct platform_device *, struct legacy_probe *probe, + struct legacy_data *data); +}; + +static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 }; + +static struct legacy_probe probe_list[NR_HOST]; static struct legacy_data legacy_data[NR_HOST]; static struct ata_host *legacy_host[NR_HOST]; static int nr_legacy_host; -static int probe_all; /* Set to check all ISA port ranges */ -static int ht6560a; /* HT 6560A on primary 1, secondary 2, both 3 */ -static int ht6560b; /* HT 6560A on primary 1, secondary 2, both 3 */ -static int opti82c611a; /* Opti82c611A on primary 1, secondary 2, both 3 */ -static int opti82c46x; /* Opti 82c465MV present (pri/sec autodetect) */ -static int autospeed; /* Chip present which snoops speed changes */ -static int pio_mask = 0x1F; /* PIO range for autospeed devices */ +static int probe_all; /* Set to check all ISA port ranges */ +static int ht6560a; /* HT 6560A on primary 1, second 2, both 3 */ +static int ht6560b; /* HT 6560A on primary 1, second 2, both 3 */ +static int opti82c611a; /* Opti82c611A on primary 1, sec 2, both 3 */ +static int opti82c46x; /* Opti 82c465MV present(pri/sec autodetect) */ +static int qdi; /* Set to probe QDI controllers */ +static int winbond; /* Set to probe Winbond controllers, + give I/O port if non standard */ +static int autospeed; /* Chip present which snoops speed changes */ +static int pio_mask = 0x1F; /* PIO range for autospeed devices */ static int iordy_mask = 0xFFFFFFFF; /* Use iordy if available */ /** + * legacy_probe_add - Add interface to probe list + * @port: Controller port + * @irq: IRQ number + * @type: Controller type + * @private: Controller specific info + * + * Add an entry into the probe list for ATA controllers. This is used + * to add the default ISA slots and then to build up the table + * further according to other ISA/VLB/Weird device scans + * + * An I/O port list is used to keep ordering stable and sane, as we + * don't have any good way to talk about ordering otherwise + */ + +static int legacy_probe_add(unsigned long port, unsigned int irq, + enum controller type, unsigned long private) +{ + struct legacy_probe *lp = &probe_list[0]; + int i; + struct legacy_probe *free = NULL; + + for (i = 0; i < NR_HOST; i++) { + if (lp->port == 0 && free == NULL) + free = lp; + /* Matching port, or the correct slot for ordering */ + if (lp->port == port || legacy_port[i] == port) { + free = lp; + break; + } + lp++; + } + if (free == NULL) { + printk(KERN_ERR "pata_legacy: Too many interfaces.\n"); + return -1; + } + /* Fill in the entry for later probing */ + free->port = port; + free->irq = irq; + free->type = type; + free->private = private; + return 0; +} + + +/** * legacy_set_mode - mode setting * @link: IDE link * @unused: Device that failed when error is returned @@ -113,7 +196,8 @@ static int legacy_set_mode(struct ata_link *link, struct ata_device **unused) ata_link_for_each_dev(dev, link) { if (ata_dev_enabled(dev)) { - ata_dev_printk(dev, KERN_INFO, "configured for PIO\n"); + ata_dev_printk(dev, KERN_INFO, + "configured for PIO\n"); dev->pio_mode = XFER_PIO_0; dev->xfer_mode = XFER_PIO_0; dev->xfer_shift = ATA_SHIFT_PIO; @@ -124,21 +208,12 @@ static int legacy_set_mode(struct ata_link *link, struct ata_device **unused) } static struct scsi_host_template legacy_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_PIO_SHT(DRV_NAME), +}; + +static const struct ata_port_operations legacy_base_port_ops = { + .inherits = &ata_sff_port_ops, + .cable_detect = ata_cable_40wire, }; /* @@ -150,63 +225,23 @@ static struct scsi_host_template legacy_sht = { */ static struct ata_port_operations simple_port_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer_noirq, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_port_start, + .inherits = &legacy_base_port_ops, + .sff_data_xfer = ata_sff_data_xfer_noirq, }; static struct ata_port_operations legacy_port_ops = { + .inherits = &legacy_base_port_ops, + .sff_data_xfer = ata_sff_data_xfer_noirq, .set_mode = legacy_set_mode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - .cable_detect = ata_cable_40wire, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer_noirq, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_port_start, }; /* * Promise 20230C and 20620 support * - * This controller supports PIO0 to PIO2. We set PIO timings conservatively to - * allow for 50MHz Vesa Local Bus. The 20620 DMA support is weird being DMA to - * controller and PIO'd to the host and not supported. + * This controller supports PIO0 to PIO2. We set PIO timings + * conservatively to allow for 50MHz Vesa Local Bus. The 20620 DMA + * support is weird being DMA to controller and PIO'd to the host + * and not supported. */ static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev) @@ -221,8 +256,7 @@ static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev) local_irq_save(flags); /* Unlock the control interface */ - do - { + do { inb(0x1F5); outb(inb(0x1F2) | 0x80, 0x1F2); inb(0x1F2); @@ -231,7 +265,7 @@ static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev) inb(0x1F2); inb(0x1F2); } - while((inb(0x1F2) & 0x80) && --tries); + while ((inb(0x1F2) & 0x80) && --tries); local_irq_restore(flags); @@ -249,13 +283,14 @@ static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev) } -static void pdc_data_xfer_vlb(struct ata_device *adev, unsigned char *buf, unsigned int buflen, int write_data) +static unsigned int pdc_data_xfer_vlb(struct ata_device *dev, + unsigned char *buf, unsigned int buflen, int rw) { - struct ata_port *ap = adev->link->ap; - int slop = buflen & 3; - unsigned long flags; + if (ata_id_has_dword_io(dev->id)) { + struct ata_port *ap = dev->link->ap; + int slop = buflen & 3; + unsigned long flags; - if (ata_id_has_dword_io(adev->id)) { local_irq_save(flags); /* Perform the 32bit I/O synchronization sequence */ @@ -264,62 +299,40 @@ static void pdc_data_xfer_vlb(struct ata_device *adev, unsigned char *buf, unsig ioread8(ap->ioaddr.nsect_addr); /* Now the data */ - - if (write_data) - iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); - else + if (rw == READ) ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); + else + iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); if (unlikely(slop)) { u32 pad; - if (write_data) { - memcpy(&pad, buf + buflen - slop, slop); - pad = le32_to_cpu(pad); - iowrite32(pad, ap->ioaddr.data_addr); - } else { - pad = ioread32(ap->ioaddr.data_addr); - pad = cpu_to_le16(pad); + if (rw == READ) { + pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr)); memcpy(buf + buflen - slop, &pad, slop); + } else { + memcpy(&pad, buf + buflen - slop, slop); + iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr); } + buflen += 4 - slop; } local_irq_restore(flags); - } - else - ata_data_xfer_noirq(adev, buf, buflen, write_data); + } else + buflen = ata_sff_data_xfer_noirq(dev, buf, buflen, rw); + + return buflen; } static struct ata_port_operations pdc20230_port_ops = { + .inherits = &legacy_base_port_ops, .set_piomode = pdc20230_set_piomode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = pdc_data_xfer_vlb, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_port_start, + .sff_data_xfer = pdc_data_xfer_vlb, }; /* * Holtek 6560A support * - * This controller supports PIO0 to PIO2 (no IORDY even though higher timings - * can be loaded). + * This controller supports PIO0 to PIO2 (no IORDY even though higher + * timings can be loaded). */ static void ht6560a_set_piomode(struct ata_port *ap, struct ata_device *adev) @@ -330,8 +343,8 @@ static void ht6560a_set_piomode(struct ata_port *ap, struct ata_device *adev) /* Get the timing data in cycles. For now play safe at 50Mhz */ ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000); - active = FIT(t.active, 2, 15); - recover = FIT(t.recover, 4, 15); + active = clamp_val(t.active, 2, 15); + recover = clamp_val(t.recover, 4, 15); inb(0x3E6); inb(0x3E6); @@ -343,37 +356,15 @@ static void ht6560a_set_piomode(struct ata_port *ap, struct ata_device *adev) } static struct ata_port_operations ht6560a_port_ops = { + .inherits = &legacy_base_port_ops, .set_piomode = ht6560a_set_piomode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, /* Check vlb/noirq */ - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_port_start, }; /* * Holtek 6560B support * - * This controller supports PIO0 to PIO4. We honour the BIOS/jumper FIFO setting - * unless we see an ATAPI device in which case we force it off. + * This controller supports PIO0 to PIO4. We honour the BIOS/jumper FIFO + * setting unless we see an ATAPI device in which case we force it off. * * FIXME: need to implement 2nd channel support. */ @@ -386,8 +377,8 @@ static void ht6560b_set_piomode(struct ata_port *ap, struct ata_device *adev) /* Get the timing data in cycles. For now play safe at 50Mhz */ ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000); - active = FIT(t.active, 2, 15); - recover = FIT(t.recover, 2, 16); + active = clamp_val(t.active, 2, 15); + recover = clamp_val(t.recover, 2, 16); recover &= 0x15; inb(0x3E6); @@ -400,7 +391,7 @@ static void ht6560b_set_piomode(struct ata_port *ap, struct ata_device *adev) if (adev->class != ATA_DEV_ATA) { u8 rconf = inb(0x3E6); if (rconf & 0x24) { - rconf &= ~ 0x24; + rconf &= ~0x24; outb(rconf, 0x3E6); } } @@ -408,30 +399,8 @@ static void ht6560b_set_piomode(struct ata_port *ap, struct ata_device *adev) } static struct ata_port_operations ht6560b_port_ops = { + .inherits = &legacy_base_port_ops, .set_piomode = ht6560b_set_piomode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, /* FIXME: Check 32bit and noirq */ - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_port_start, }; /* @@ -464,7 +433,8 @@ static u8 opti_syscfg(u8 reg) * This controller supports PIO0 to PIO3. */ -static void opti82c611a_set_piomode(struct ata_port *ap, struct ata_device *adev) +static void opti82c611a_set_piomode(struct ata_port *ap, + struct ata_device *adev) { u8 active, recover, setup; struct ata_timing t; @@ -492,9 +462,9 @@ static void opti82c611a_set_piomode(struct ata_port *ap, struct ata_device *adev ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP); } - active = FIT(t.active, 2, 17) - 2; - recover = FIT(t.recover, 1, 16) - 1; - setup = FIT(t.setup, 1, 4) - 1; + active = clamp_val(t.active, 2, 17) - 2; + recover = clamp_val(t.recover, 1, 16) - 1; + setup = clamp_val(t.setup, 1, 4) - 1; /* Select the right timing bank for write timing */ rc = ioread8(ap->ioaddr.lbal_addr); @@ -528,30 +498,8 @@ static void opti82c611a_set_piomode(struct ata_port *ap, struct ata_device *adev static struct ata_port_operations opti82c611a_port_ops = { + .inherits = &legacy_base_port_ops, .set_piomode = opti82c611a_set_piomode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_port_start, }; /* @@ -593,9 +541,9 @@ static void opti82c46x_set_piomode(struct ata_port *ap, struct ata_device *adev) ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP); } - active = FIT(t.active, 2, 17) - 2; - recover = FIT(t.recover, 1, 16) - 1; - setup = FIT(t.setup, 1, 4) - 1; + active = clamp_val(t.active, 2, 17) - 2; + recover = clamp_val(t.recover, 1, 16) - 1; + setup = clamp_val(t.setup, 1, 4) - 1; /* Select the right timing bank for write timing */ rc = ioread8(ap->ioaddr.lbal_addr); @@ -631,7 +579,7 @@ static void opti82c46x_set_piomode(struct ata_port *ap, struct ata_device *adev) } /** - * opt82c465mv_qc_issue_prot - command issue + * opt82c465mv_qc_issue - command issue * @qc: command pending * * Called when the libata layer is about to issue a command. We wrap @@ -645,7 +593,7 @@ static void opti82c46x_set_piomode(struct ata_port *ap, struct ata_device *adev) * FIXME: dual channel needs ->serialize support */ -static unsigned int opti82c46x_qc_issue_prot(struct ata_queued_cmd *qc) +static unsigned int opti82c46x_qc_issue(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct ata_device *adev = qc->dev; @@ -656,104 +604,322 @@ static unsigned int opti82c46x_qc_issue_prot(struct ata_queued_cmd *qc) && ap->host->private_data != NULL) opti82c46x_set_piomode(ap, adev); - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } static struct ata_port_operations opti82c46x_port_ops = { + .inherits = &legacy_base_port_ops, .set_piomode = opti82c46x_set_piomode, + .qc_issue = opti82c46x_qc_issue, +}; - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, +static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev) +{ + struct ata_timing t; + struct legacy_data *ld_qdi = ap->host->private_data; + int active, recovery; + u8 timing; - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, + /* Get the timing data in cycles */ + ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); + + if (ld_qdi->fast) { + active = 8 - clamp_val(t.active, 1, 8); + recovery = 18 - clamp_val(t.recover, 3, 18); + } else { + active = 9 - clamp_val(t.active, 2, 9); + recovery = 15 - clamp_val(t.recover, 0, 15); + } + timing = (recovery << 4) | active | 0x08; - .qc_prep = ata_qc_prep, - .qc_issue = opti82c46x_qc_issue_prot, + ld_qdi->clock[adev->devno] = timing; - .data_xfer = ata_data_xfer, + outb(timing, ld_qdi->timing); +} - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, +/** + * qdi6580dp_set_piomode - PIO setup for dual channel + * @ap: Port + * @adev: Device + * @irq: interrupt line + * + * In dual channel mode the 6580 has one clock per channel and we have + * to software clockswitch in qc_issue. + */ - .port_start = ata_port_start, -}; +static void qdi6580dp_set_piomode(struct ata_port *ap, struct ata_device *adev) +{ + struct ata_timing t; + struct legacy_data *ld_qdi = ap->host->private_data; + int active, recovery; + u8 timing; + /* Get the timing data in cycles */ + ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); + + if (ld_qdi->fast) { + active = 8 - clamp_val(t.active, 1, 8); + recovery = 18 - clamp_val(t.recover, 3, 18); + } else { + active = 9 - clamp_val(t.active, 2, 9); + recovery = 15 - clamp_val(t.recover, 0, 15); + } + timing = (recovery << 4) | active | 0x08; + + ld_qdi->clock[adev->devno] = timing; + + outb(timing, ld_qdi->timing + 2 * ap->port_no); + /* Clear the FIFO */ + if (adev->class != ATA_DEV_ATA) + outb(0x5F, ld_qdi->timing + 3); +} /** - * legacy_init_one - attach a legacy interface - * @port: port number - * @io: I/O port start - * @ctrl: control port - * @irq: interrupt line + * qdi6580_set_piomode - PIO setup for single channel + * @ap: Port + * @adev: Device * - * Register an ISA bus IDE interface. Such interfaces are PIO and we - * assume do not support IRQ sharing. + * In single channel mode the 6580 has one clock per device and we can + * avoid the requirement to clock switch. We also have to load the timing + * into the right clock according to whether we are master or slave. */ -static __init int legacy_init_one(int port, unsigned long io, unsigned long ctrl, int irq) +static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev) { - struct legacy_data *ld = &legacy_data[nr_legacy_host]; - struct ata_host *host; - struct ata_port *ap; - struct platform_device *pdev; - struct ata_port_operations *ops = &legacy_port_ops; - void __iomem *io_addr, *ctrl_addr; - int pio_modes = pio_mask; - u32 mask = (1 << port); - u32 iordy = (iordy_mask & mask) ? 0: ATA_FLAG_NO_IORDY; - int ret; + struct ata_timing t; + struct legacy_data *ld_qdi = ap->host->private_data; + int active, recovery; + u8 timing; - pdev = platform_device_register_simple(DRV_NAME, nr_legacy_host, NULL, 0); - if (IS_ERR(pdev)) - return PTR_ERR(pdev); + /* Get the timing data in cycles */ + ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); + + if (ld_qdi->fast) { + active = 8 - clamp_val(t.active, 1, 8); + recovery = 18 - clamp_val(t.recover, 3, 18); + } else { + active = 9 - clamp_val(t.active, 2, 9); + recovery = 15 - clamp_val(t.recover, 0, 15); + } + timing = (recovery << 4) | active | 0x08; + ld_qdi->clock[adev->devno] = timing; + outb(timing, ld_qdi->timing + 2 * adev->devno); + /* Clear the FIFO */ + if (adev->class != ATA_DEV_ATA) + outb(0x5F, ld_qdi->timing + 3); +} - ret = -EBUSY; - if (devm_request_region(&pdev->dev, io, 8, "pata_legacy") == NULL || - devm_request_region(&pdev->dev, ctrl, 1, "pata_legacy") == NULL) - goto fail; +/** + * qdi_qc_issue - command issue + * @qc: command pending + * + * Called when the libata layer is about to issue a command. We wrap + * this interface so that we can load the correct ATA timings. + */ - ret = -ENOMEM; - io_addr = devm_ioport_map(&pdev->dev, io, 8); - ctrl_addr = devm_ioport_map(&pdev->dev, ctrl, 1); - if (!io_addr || !ctrl_addr) - goto fail; +static unsigned int qdi_qc_issue(struct ata_queued_cmd *qc) +{ + struct ata_port *ap = qc->ap; + struct ata_device *adev = qc->dev; + struct legacy_data *ld_qdi = ap->host->private_data; - if (ht6560a & mask) { - ops = &ht6560a_port_ops; - pio_modes = 0x07; - iordy = ATA_FLAG_NO_IORDY; - } - if (ht6560b & mask) { - ops = &ht6560b_port_ops; - pio_modes = 0x1F; - } - if (opti82c611a & mask) { - ops = &opti82c611a_port_ops; - pio_modes = 0x0F; - } - if (opti82c46x & mask) { - ops = &opti82c46x_port_ops; - pio_modes = 0x0F; + if (ld_qdi->clock[adev->devno] != ld_qdi->last) { + if (adev->pio_mode) { + ld_qdi->last = ld_qdi->clock[adev->devno]; + outb(ld_qdi->clock[adev->devno], ld_qdi->timing + + 2 * ap->port_no); + } } + return ata_sff_qc_issue(qc); +} - /* Probe for automatically detectable controllers */ +static unsigned int vlb32_data_xfer(struct ata_device *adev, unsigned char *buf, + unsigned int buflen, int rw) +{ + struct ata_port *ap = adev->link->ap; + int slop = buflen & 3; - if (io == 0x1F0 && ops == &legacy_port_ops) { - unsigned long flags; + if (ata_id_has_dword_io(adev->id)) { + if (rw == WRITE) + iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); + else + ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); - local_irq_save(flags); + if (unlikely(slop)) { + u32 pad; + if (rw == WRITE) { + memcpy(&pad, buf + buflen - slop, slop); + pad = le32_to_cpu(pad); + iowrite32(pad, ap->ioaddr.data_addr); + } else { + pad = ioread32(ap->ioaddr.data_addr); + pad = cpu_to_le32(pad); + memcpy(buf + buflen - slop, &pad, slop); + } + } + return (buflen + 3) & ~3; + } else + return ata_sff_data_xfer(adev, buf, buflen, rw); +} + +static int qdi_port(struct platform_device *dev, + struct legacy_probe *lp, struct legacy_data *ld) +{ + if (devm_request_region(&dev->dev, lp->private, 4, "qdi") == NULL) + return -EBUSY; + ld->timing = lp->private; + return 0; +} + +static struct ata_port_operations qdi6500_port_ops = { + .inherits = &legacy_base_port_ops, + .set_piomode = qdi6500_set_piomode, + .qc_issue = qdi_qc_issue, + .sff_data_xfer = vlb32_data_xfer, +}; + +static struct ata_port_operations qdi6580_port_ops = { + .inherits = &legacy_base_port_ops, + .set_piomode = qdi6580_set_piomode, + .sff_data_xfer = vlb32_data_xfer, +}; +static struct ata_port_operations qdi6580dp_port_ops = { + .inherits = &legacy_base_port_ops, + .set_piomode = qdi6580dp_set_piomode, + .sff_data_xfer = vlb32_data_xfer, +}; + +static DEFINE_SPINLOCK(winbond_lock); + +static void winbond_writecfg(unsigned long port, u8 reg, u8 val) +{ + unsigned long flags; + spin_lock_irqsave(&winbond_lock, flags); + outb(reg, port + 0x01); + outb(val, port + 0x02); + spin_unlock_irqrestore(&winbond_lock, flags); +} + +static u8 winbond_readcfg(unsigned long port, u8 reg) +{ + u8 val; + + unsigned long flags; + spin_lock_irqsave(&winbond_lock, flags); + outb(reg, port + 0x01); + val = inb(port + 0x02); + spin_unlock_irqrestore(&winbond_lock, flags); + + return val; +} + +static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev) +{ + struct ata_timing t; + struct legacy_data *ld_winbond = ap->host->private_data; + int active, recovery; + u8 reg; + int timing = 0x88 + (ap->port_no * 4) + (adev->devno * 2); + + reg = winbond_readcfg(ld_winbond->timing, 0x81); + + /* Get the timing data in cycles */ + if (reg & 0x40) /* Fast VLB bus, assume 50MHz */ + ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000); + else + ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); + + active = (clamp_val(t.active, 3, 17) - 1) & 0x0F; + recovery = (clamp_val(t.recover, 1, 15) + 1) & 0x0F; + timing = (active << 4) | recovery; + winbond_writecfg(ld_winbond->timing, timing, reg); + + /* Load the setup timing */ + + reg = 0x35; + if (adev->class != ATA_DEV_ATA) + reg |= 0x08; /* FIFO off */ + if (!ata_pio_need_iordy(adev)) + reg |= 0x02; /* IORDY off */ + reg |= (clamp_val(t.setup, 0, 3) << 6); + winbond_writecfg(ld_winbond->timing, timing + 1, reg); +} + +static int winbond_port(struct platform_device *dev, + struct legacy_probe *lp, struct legacy_data *ld) +{ + if (devm_request_region(&dev->dev, lp->private, 4, "winbond") == NULL) + return -EBUSY; + ld->timing = lp->private; + return 0; +} + +static struct ata_port_operations winbond_port_ops = { + .inherits = &legacy_base_port_ops, + .set_piomode = winbond_set_piomode, + .sff_data_xfer = vlb32_data_xfer, +}; + +static struct legacy_controller controllers[] = { + {"BIOS", &legacy_port_ops, 0x1F, + ATA_FLAG_NO_IORDY, NULL }, + {"Snooping", &simple_port_ops, 0x1F, + 0 , NULL }, + {"PDC20230", &pdc20230_port_ops, 0x7, + ATA_FLAG_NO_IORDY, NULL }, + {"HT6560A", &ht6560a_port_ops, 0x07, + ATA_FLAG_NO_IORDY, NULL }, + {"HT6560B", &ht6560b_port_ops, 0x1F, + ATA_FLAG_NO_IORDY, NULL }, + {"OPTI82C611A", &opti82c611a_port_ops, 0x0F, + 0 , NULL }, + {"OPTI82C46X", &opti82c46x_port_ops, 0x0F, + 0 , NULL }, + {"QDI6500", &qdi6500_port_ops, 0x07, + ATA_FLAG_NO_IORDY, qdi_port }, + {"QDI6580", &qdi6580_port_ops, 0x1F, + 0 , qdi_port }, + {"QDI6580DP", &qdi6580dp_port_ops, 0x1F, + 0 , qdi_port }, + {"W83759A", &winbond_port_ops, 0x1F, + 0 , winbond_port } +}; + +/** + * probe_chip_type - Discover controller + * @probe: Probe entry to check + * + * Probe an ATA port and identify the type of controller. We don't + * check if the controller appears to be driveless at this point. + */ + +static __init int probe_chip_type(struct legacy_probe *probe) +{ + int mask = 1 << probe->slot; + + if (winbond && (probe->port == 0x1F0 || probe->port == 0x170)) { + u8 reg = winbond_readcfg(winbond, 0x81); + reg |= 0x80; /* jumpered mode off */ + winbond_writecfg(winbond, 0x81, reg); + reg = winbond_readcfg(winbond, 0x83); + reg |= 0xF0; /* local control */ + winbond_writecfg(winbond, 0x83, reg); + reg = winbond_readcfg(winbond, 0x85); + reg |= 0xF0; /* programmable timing */ + winbond_writecfg(winbond, 0x85, reg); + + reg = winbond_readcfg(winbond, 0x81); + + if (reg & mask) + return W83759A; + } + if (probe->port == 0x1F0) { + unsigned long flags; + local_irq_save(flags); /* Probes */ - inb(0x1F5); outb(inb(0x1F2) | 0x80, 0x1F2); + inb(0x1F5); inb(0x1F2); inb(0x3F6); inb(0x3F6); @@ -762,29 +928,83 @@ static __init int legacy_init_one(int port, unsigned long io, unsigned long ctrl if ((inb(0x1F2) & 0x80) == 0) { /* PDC20230c or 20630 ? */ - printk(KERN_INFO "PDC20230-C/20630 VLB ATA controller detected.\n"); - pio_modes = 0x07; - ops = &pdc20230_port_ops; - iordy = ATA_FLAG_NO_IORDY; + printk(KERN_INFO "PDC20230-C/20630 VLB ATA controller" + " detected.\n"); udelay(100); inb(0x1F5); + local_irq_restore(flags); + return PDC20230; } else { outb(0x55, 0x1F2); inb(0x1F2); inb(0x1F2); - if (inb(0x1F2) == 0x00) { - printk(KERN_INFO "PDC20230-B VLB ATA controller detected.\n"); - } + if (inb(0x1F2) == 0x00) + printk(KERN_INFO "PDC20230-B VLB ATA " + "controller detected.\n"); + local_irq_restore(flags); + return BIOS; } local_irq_restore(flags); } + if (ht6560a & mask) + return HT6560A; + if (ht6560b & mask) + return HT6560B; + if (opti82c611a & mask) + return OPTI611A; + if (opti82c46x & mask) + return OPTI46X; + if (autospeed & mask) + return SNOOP; + return BIOS; +} + + +/** + * legacy_init_one - attach a legacy interface + * @pl: probe record + * + * Register an ISA bus IDE interface. Such interfaces are PIO and we + * assume do not support IRQ sharing. + */ + +static __init int legacy_init_one(struct legacy_probe *probe) +{ + struct legacy_controller *controller = &controllers[probe->type]; + int pio_modes = controller->pio_mask; + unsigned long io = probe->port; + u32 mask = (1 << probe->slot); + struct ata_port_operations *ops = controller->ops; + struct legacy_data *ld = &legacy_data[probe->slot]; + struct ata_host *host = NULL; + struct ata_port *ap; + struct platform_device *pdev; + struct ata_device *dev; + void __iomem *io_addr, *ctrl_addr; + u32 iordy = (iordy_mask & mask) ? 0: ATA_FLAG_NO_IORDY; + int ret; + + iordy |= controller->flags; - /* Chip does mode setting by command snooping */ - if (ops == &legacy_port_ops && (autospeed & mask)) - ops = &simple_port_ops; + pdev = platform_device_register_simple(DRV_NAME, probe->slot, NULL, 0); + if (IS_ERR(pdev)) + return PTR_ERR(pdev); + + ret = -EBUSY; + if (devm_request_region(&pdev->dev, io, 8, "pata_legacy") == NULL || + devm_request_region(&pdev->dev, io + 0x0206, 1, + "pata_legacy") == NULL) + goto fail; ret = -ENOMEM; + io_addr = devm_ioport_map(&pdev->dev, io, 8); + ctrl_addr = devm_ioport_map(&pdev->dev, io + 0x0206, 1); + if (!io_addr || !ctrl_addr) + goto fail; + if (controller->setup) + if (controller->setup(pdev, probe, ld) < 0) + goto fail; host = ata_host_alloc(&pdev->dev, 1); if (!host) goto fail; @@ -796,19 +1016,27 @@ static __init int legacy_init_one(int port, unsigned long io, unsigned long ctrl ap->ioaddr.cmd_addr = io_addr; ap->ioaddr.altstatus_addr = ctrl_addr; ap->ioaddr.ctl_addr = ctrl_addr; - ata_std_ports(&ap->ioaddr); - ap->private_data = ld; + ata_sff_std_ports(&ap->ioaddr); + ap->host->private_data = ld; - ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", io, ctrl); + ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", io, io + 0x0206); - ret = ata_host_activate(host, irq, ata_interrupt, 0, &legacy_sht); + ret = ata_host_activate(host, probe->irq, ata_sff_interrupt, 0, + &legacy_sht); if (ret) goto fail; - - legacy_host[nr_legacy_host++] = dev_get_drvdata(&pdev->dev); ld->platform_dev = pdev; - return 0; + /* Nothing found means we drop the port as its probably not there */ + + ret = -ENODEV; + ata_link_for_each_dev(dev, &ap->link) { + if (!ata_dev_absent(dev)) { + legacy_host[probe->slot] = host; + ld->platform_dev = pdev; + return 0; + } + } fail: platform_device_unregister(pdev); return ret; @@ -820,13 +1048,15 @@ fail: * @master: set this if we find an ATA master * @master: set this if we find an ATA secondary * - * A small number of vendors implemented early PCI ATA interfaces on bridge logic - * without the ATA interface being PCI visible. Where we have a matching PCI driver - * we must skip the relevant device here. If we don't know about it then the legacy - * driver is the right driver anyway. + * A small number of vendors implemented early PCI ATA interfaces + * on bridge logic without the ATA interface being PCI visible. + * Where we have a matching PCI driver we must skip the relevant + * device here. If we don't know about it then the legacy driver + * is the right driver anyway. */ -static void legacy_check_special_cases(struct pci_dev *p, int *primary, int *secondary) +static void __init legacy_check_special_cases(struct pci_dev *p, int *primary, + int *secondary) { /* Cyrix CS5510 pre SFF MWDMA ATA on the bridge */ if (p->vendor == 0x1078 && p->device == 0x0000) { @@ -842,7 +1072,8 @@ static void legacy_check_special_cases(struct pci_dev *p, int *primary, int *sec if (p->vendor == 0x8086 && p->device == 0x1234) { u16 r; pci_read_config_word(p, 0x6C, &r); - if (r & 0x8000) { /* ATA port enabled */ + if (r & 0x8000) { + /* ATA port enabled */ if (r & 0x4000) *secondary = 1; else @@ -852,6 +1083,114 @@ static void legacy_check_special_cases(struct pci_dev *p, int *primary, int *sec } } +static __init void probe_opti_vlb(void) +{ + /* If an OPTI 82C46X is present find out where the channels are */ + static const char *optis[4] = { + "3/463MV", "5MV", + "5MVA", "5MVB" + }; + u8 chans = 1; + u8 ctrl = (opti_syscfg(0x30) & 0xC0) >> 6; + + opti82c46x = 3; /* Assume master and slave first */ + printk(KERN_INFO DRV_NAME ": Opti 82C46%s chipset support.\n", + optis[ctrl]); + if (ctrl == 3) + chans = (opti_syscfg(0x3F) & 0x20) ? 2 : 1; + ctrl = opti_syscfg(0xAC); + /* Check enabled and this port is the 465MV port. On the + MVB we may have two channels */ + if (ctrl & 8) { + if (chans == 2) { + legacy_probe_add(0x1F0, 14, OPTI46X, 0); + legacy_probe_add(0x170, 15, OPTI46X, 0); + } + if (ctrl & 4) + legacy_probe_add(0x170, 15, OPTI46X, 0); + else + legacy_probe_add(0x1F0, 14, OPTI46X, 0); + } else + legacy_probe_add(0x1F0, 14, OPTI46X, 0); +} + +static __init void qdi65_identify_port(u8 r, u8 res, unsigned long port) +{ + static const unsigned long ide_port[2] = { 0x170, 0x1F0 }; + /* Check card type */ + if ((r & 0xF0) == 0xC0) { + /* QD6500: single channel */ + if (r & 8) + /* Disabled ? */ + return; + legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01), + QDI6500, port); + } + if (((r & 0xF0) == 0xA0) || (r & 0xF0) == 0x50) { + /* QD6580: dual channel */ + if (!request_region(port + 2 , 2, "pata_qdi")) { + release_region(port, 2); + return; + } + res = inb(port + 3); + /* Single channel mode ? */ + if (res & 1) + legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01), + QDI6580, port); + else { /* Dual channel mode */ + legacy_probe_add(0x1F0, 14, QDI6580DP, port); + /* port + 0x02, r & 0x04 */ + legacy_probe_add(0x170, 15, QDI6580DP, port + 2); + } + release_region(port + 2, 2); + } +} + +static __init void probe_qdi_vlb(void) +{ + unsigned long flags; + static const unsigned long qd_port[2] = { 0x30, 0xB0 }; + int i; + + /* + * Check each possible QD65xx base address + */ + + for (i = 0; i < 2; i++) { + unsigned long port = qd_port[i]; + u8 r, res; + + + if (request_region(port, 2, "pata_qdi")) { + /* Check for a card */ + local_irq_save(flags); + /* I have no h/w that needs this delay but it + is present in the historic code */ + r = inb(port); + udelay(1); + outb(0x19, port); + udelay(1); + res = inb(port); + udelay(1); + outb(r, port); + udelay(1); + local_irq_restore(flags); + + /* Fail */ + if (res == 0x19) { + release_region(port, 2); + continue; + } + /* Passes the presence test */ + r = inb(port + 1); + udelay(1); + /* Check port agrees with port set */ + if ((r & 2) >> 1 == i) + qdi65_identify_port(r, res, port); + release_region(port, 2); + } + } +} /** * legacy_init - attach legacy interfaces @@ -869,15 +1208,17 @@ static __init int legacy_init(void) int ct = 0; int primary = 0; int secondary = 0; - int last_port = NR_HOST; + int pci_present = 0; + struct legacy_probe *pl = &probe_list[0]; + int slot = 0; struct pci_dev *p = NULL; for_each_pci_dev(p) { int r; - /* Check for any overlap of the system ATA mappings. Native mode controllers - stuck on these addresses or some devices in 'raid' mode won't be found by - the storage class test */ + /* Check for any overlap of the system ATA mappings. Native + mode controllers stuck on these addresses or some devices + in 'raid' mode won't be found by the storage class test */ for (r = 0; r < 6; r++) { if (pci_resource_start(p, r) == 0x1f0) primary = 1; @@ -887,49 +1228,39 @@ static __init int legacy_init(void) /* Check for special cases */ legacy_check_special_cases(p, &primary, &secondary); - /* If PCI bus is present then don't probe for tertiary legacy ports */ - if (probe_all == 0) - last_port = 2; + /* If PCI bus is present then don't probe for tertiary + legacy ports */ + pci_present = 1; } - /* If an OPTI 82C46X is present find out where the channels are */ - if (opti82c46x) { - static const char *optis[4] = { - "3/463MV", "5MV", - "5MVA", "5MVB" - }; - u8 chans = 1; - u8 ctrl = (opti_syscfg(0x30) & 0xC0) >> 6; - - opti82c46x = 3; /* Assume master and slave first */ - printk(KERN_INFO DRV_NAME ": Opti 82C46%s chipset support.\n", optis[ctrl]); - if (ctrl == 3) - chans = (opti_syscfg(0x3F) & 0x20) ? 2 : 1; - ctrl = opti_syscfg(0xAC); - /* Check enabled and this port is the 465MV port. On the - MVB we may have two channels */ - if (ctrl & 8) { - if (ctrl & 4) - opti82c46x = 2; /* Slave */ - else - opti82c46x = 1; /* Master */ - if (chans == 2) - opti82c46x = 3; /* Master and Slave */ - } /* Slave only */ - else if (chans == 1) - opti82c46x = 1; + if (winbond == 1) + winbond = 0x130; /* Default port, alt is 1B0 */ + + if (primary == 0 || all) + legacy_probe_add(0x1F0, 14, UNKNOWN, 0); + if (secondary == 0 || all) + legacy_probe_add(0x170, 15, UNKNOWN, 0); + + if (probe_all || !pci_present) { + /* ISA/VLB extra ports */ + legacy_probe_add(0x1E8, 11, UNKNOWN, 0); + legacy_probe_add(0x168, 10, UNKNOWN, 0); + legacy_probe_add(0x1E0, 8, UNKNOWN, 0); + legacy_probe_add(0x160, 12, UNKNOWN, 0); } - for (i = 0; i < last_port; i++) { - /* Skip primary if we have seen a PCI one */ - if (i == 0 && primary == 1) - continue; - /* Skip secondary if we have seen a PCI one */ - if (i == 1 && secondary == 1) + if (opti82c46x) + probe_opti_vlb(); + if (qdi) + probe_qdi_vlb(); + + for (i = 0; i < NR_HOST; i++, pl++) { + if (pl->port == 0) continue; - if (legacy_init_one(i, legacy_port[i], - legacy_port[i] + 0x0206, - legacy_irq[i]) == 0) + if (pl->type == UNKNOWN) + pl->type = probe_chip_type(pl); + pl->slot = slot++; + if (legacy_init_one(pl) == 0) ct++; } if (ct != 0) @@ -943,11 +1274,8 @@ static __exit void legacy_exit(void) for (i = 0; i < nr_legacy_host; i++) { struct legacy_data *ld = &legacy_data[i]; - ata_host_detach(legacy_host[i]); platform_device_unregister(ld->platform_dev); - if (ld->timing) - release_region(ld->timing, 2); } } @@ -962,9 +1290,9 @@ module_param(ht6560a, int, 0); module_param(ht6560b, int, 0); module_param(opti82c611a, int, 0); module_param(opti82c46x, int, 0); +module_param(qdi, int, 0); module_param(pio_mask, int, 0); module_param(iordy_mask, int, 0); module_init(legacy_init); module_exit(legacy_exit); - diff --git a/drivers/ata/pata_marvell.c b/drivers/ata/pata_marvell.c index 9afc8a3..24a011b 100644 --- a/drivers/ata/pata_marvell.c +++ b/drivers/ata/pata_marvell.c @@ -55,7 +55,7 @@ static int marvell_pre_reset(struct ata_link *link, unsigned long deadline) (!(devices & 0x10))) /* PATA enable ? */ return -ENOENT; - return ata_std_prereset(link, deadline); + return ata_sff_prereset(link, deadline); } static int marvell_cable_detect(struct ata_port *ap) @@ -75,71 +75,16 @@ static int marvell_cable_detect(struct ata_port *ap) return 0; /* Our BUG macro needs the right markup */ } -/** - * marvell_error_handler - Setup and error handler - * @ap: Port to handle - * - * LOCKING: - * None (inherited from caller). - */ - -static void marvell_error_handler(struct ata_port *ap) -{ - return ata_bmdma_drive_eh(ap, marvell_pre_reset, ata_std_softreset, - NULL, ata_std_postreset); -} - /* No PIO or DMA methods needed for this device */ static struct scsi_host_template marvell_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - /* Use standard CHS mapping rules */ - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations marvell_ops = { - /* Task file is PCI ATA format, use helpers */ - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = marvell_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, +static struct ata_port_operations marvell_ops = { + .inherits = &ata_bmdma_port_ops, .cable_detect = marvell_cable_detect, - - /* BMDMA handling is PCI ATA format, use helpers */ - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - /* Timeout handling */ - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - /* Generic PATA PCI ATA helpers */ - .port_start = ata_sff_port_start, + .prereset = marvell_pre_reset, }; @@ -160,7 +105,6 @@ static const struct ata_port_operations marvell_ops = { static int marvell_init_one (struct pci_dev *pdev, const struct pci_device_id *id) { static const struct ata_port_info info = { - .sht = &marvell_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, @@ -170,7 +114,6 @@ static int marvell_init_one (struct pci_dev *pdev, const struct pci_device_id *i .port_ops = &marvell_ops, }; static const struct ata_port_info info_sata = { - .sht = &marvell_sht, /* Slave possible as its magically mapped not real */ .flags = ATA_FLAG_SLAVE_POSS, @@ -185,7 +128,7 @@ static int marvell_init_one (struct pci_dev *pdev, const struct pci_device_id *i if (pdev->device == 0x6101) ppi[1] = &ata_dummy_port_info; - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &marvell_sht, NULL); } static const struct pci_device_id marvell_pci_tbl[] = { diff --git a/drivers/ata/pata_mpc52xx.c b/drivers/ata/pata_mpc52xx.c index 50c56e2..bc79df6 100644 --- a/drivers/ata/pata_mpc52xx.c +++ b/drivers/ata/pata_mpc52xx.c @@ -252,53 +252,19 @@ mpc52xx_ata_dev_select(struct ata_port *ap, unsigned int device) if (device != priv->csel) mpc52xx_ata_apply_timings(priv, device); - ata_std_dev_select(ap,device); + ata_sff_dev_select(ap,device); } -static void -mpc52xx_ata_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, ata_std_prereset, ata_std_softreset, NULL, - ata_std_postreset); -} - - - static struct scsi_host_template mpc52xx_ata_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .max_sectors = ATA_MAX_SECTORS, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .bios_param = ata_std_bios_param, + ATA_PIO_SHT(DRV_NAME), }; static struct ata_port_operations mpc52xx_ata_port_ops = { - .set_piomode = mpc52xx_ata_set_piomode, - .dev_select = mpc52xx_ata_dev_select, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = mpc52xx_ata_error_handler, + .inherits = &ata_sff_port_ops, + .sff_dev_select = mpc52xx_ata_dev_select, .cable_detect = ata_cable_40wire, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - .port_start = ata_port_start, + .set_piomode = mpc52xx_ata_set_piomode, + .post_internal_cmd = ATA_OP_NULL, }; static int __devinit @@ -339,7 +305,7 @@ mpc52xx_ata_init_one(struct device *dev, struct mpc52xx_ata_priv *priv, ata_port_desc(ap, "ata_regs 0x%lx", raw_ata_regs); /* activate host */ - return ata_host_activate(host, priv->ata_irq, ata_interrupt, 0, + return ata_host_activate(host, priv->ata_irq, ata_sff_interrupt, 0, &mpc52xx_ata_sht); } @@ -364,7 +330,7 @@ mpc52xx_ata_probe(struct of_device *op, const struct of_device_id *match) { unsigned int ipb_freq; struct resource res_mem; - int ata_irq = NO_IRQ; + int ata_irq; struct mpc52xx_ata __iomem *ata_regs; struct mpc52xx_ata_priv *priv; int rv; @@ -494,10 +460,8 @@ mpc52xx_ata_resume(struct of_device *op) static struct of_device_id mpc52xx_ata_of_match[] = { - { - .type = "ata", - .compatible = "mpc5200-ata", - }, + { .compatible = "fsl,mpc5200-ata", }, + { .compatible = "mpc5200-ata", }, {}, }; diff --git a/drivers/ata/pata_mpiix.c b/drivers/ata/pata_mpiix.c index c0d9e0c..7d7e3fd 100644 --- a/drivers/ata/pata_mpiix.c +++ b/drivers/ata/pata_mpiix.c @@ -55,21 +55,7 @@ static int mpiix_pre_reset(struct ata_link *link, unsigned long deadline) if (!pci_test_config_bits(pdev, &mpiix_enable_bits)) return -ENOENT; - return ata_std_prereset(link, deadline); -} - -/** - * mpiix_error_handler - probe reset - * @ap: ATA port - * - * Perform the ATA probe and bus reset sequence plus specific handling - * for this hardware. The MPIIX has the enable bits in a different place - * to PIIX4 and friends. As a pure PIO device it has no cable detect - */ - -static void mpiix_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, mpiix_pre_reset, ata_std_softreset, NULL, ata_std_postreset); + return ata_sff_prereset(link, deadline); } /** @@ -83,8 +69,8 @@ static void mpiix_error_handler(struct ata_port *ap) * * This would get very ugly because we can only program timing for one * device at a time, the other gets PIO0. Fortunately libata calls - * our qc_issue_prot command before a command is issued so we can - * flip the timings back and forth to reduce the pain. + * our qc_issue command before a command is issued so we can flip the + * timings back and forth to reduce the pain. */ static void mpiix_set_piomode(struct ata_port *ap, struct ata_device *adev) @@ -124,7 +110,7 @@ static void mpiix_set_piomode(struct ata_port *ap, struct ata_device *adev) } /** - * mpiix_qc_issue_prot - command issue + * mpiix_qc_issue - command issue * @qc: command pending * * Called when the libata layer is about to issue a command. We wrap @@ -134,7 +120,7 @@ static void mpiix_set_piomode(struct ata_port *ap, struct ata_device *adev) * be made PIO0. */ -static unsigned int mpiix_qc_issue_prot(struct ata_queued_cmd *qc) +static unsigned int mpiix_qc_issue(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct ata_device *adev = qc->dev; @@ -147,50 +133,19 @@ static unsigned int mpiix_qc_issue_prot(struct ata_queued_cmd *qc) if (adev->pio_mode && adev != ap->private_data) mpiix_set_piomode(ap, adev); - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } static struct scsi_host_template mpiix_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_PIO_SHT(DRV_NAME), }; static struct ata_port_operations mpiix_port_ops = { - .set_piomode = mpiix_set_piomode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = mpiix_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, + .inherits = &ata_sff_port_ops, + .qc_issue = mpiix_qc_issue, .cable_detect = ata_cable_40wire, - - .qc_prep = ata_qc_prep, - .qc_issue = mpiix_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .set_piomode = mpiix_set_piomode, + .prereset = mpiix_pre_reset, }; static int mpiix_init_one(struct pci_dev *dev, const struct pci_device_id *id) @@ -252,10 +207,10 @@ static int mpiix_init_one(struct pci_dev *dev, const struct pci_device_id *id) ap->ioaddr.altstatus_addr = ctl_addr; /* Let libata fill in the port details */ - ata_std_ports(&ap->ioaddr); + ata_sff_std_ports(&ap->ioaddr); /* activate host */ - return ata_host_activate(host, irq, ata_interrupt, IRQF_SHARED, + return ata_host_activate(host, irq, ata_sff_interrupt, IRQF_SHARED, &mpiix_sht); } diff --git a/drivers/ata/pata_netcell.c b/drivers/ata/pata_netcell.c index 25c922a..d9719c8 100644 --- a/drivers/ata/pata_netcell.c +++ b/drivers/ata/pata_netcell.c @@ -21,54 +21,12 @@ /* No PIO or DMA methods needed for this device */ static struct scsi_host_template netcell_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - /* Use standard CHS mapping rules */ - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations netcell_ops = { - /* Task file is PCI ATA format, use helpers */ - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, +static struct ata_port_operations netcell_ops = { + .inherits = &ata_bmdma_port_ops, .cable_detect = ata_cable_80wire, - - /* BMDMA handling is PCI ATA format, use helpers */ - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - /* IRQ-related hooks */ - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - /* Generic PATA PCI ATA helpers */ - .port_start = ata_sff_port_start, }; @@ -90,7 +48,6 @@ static int netcell_init_one (struct pci_dev *pdev, const struct pci_device_id *e { static int printed_version; static const struct ata_port_info info = { - .sht = &netcell_sht, .flags = ATA_FLAG_SLAVE_POSS, /* Actually we don't really care about these as the firmware deals with it */ @@ -100,16 +57,21 @@ static int netcell_init_one (struct pci_dev *pdev, const struct pci_device_id *e .port_ops = &netcell_ops, }; const struct ata_port_info *port_info[] = { &info, NULL }; + int rc; if (!printed_version++) dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); + rc = pcim_enable_device(pdev); + if (rc) + return rc; + /* Any chip specific setup/optimisation/messages here */ - ata_pci_clear_simplex(pdev); + ata_pci_bmdma_clear_simplex(pdev); /* And let the library code do the work */ - return ata_pci_init_one(pdev, port_info); + return ata_pci_sff_init_one(pdev, port_info, &netcell_sht, NULL); } static const struct pci_device_id netcell_pci_tbl[] = { diff --git a/drivers/ata/pata_ninja32.c b/drivers/ata/pata_ninja32.c new file mode 100644 index 0000000..565e67c --- /dev/null +++ b/drivers/ata/pata_ninja32.c @@ -0,0 +1,179 @@ +/* + * pata_ninja32.c - Ninja32 PATA for new ATA layer + * (C) 2007 Red Hat Inc + * Alan Cox <alan@redhat.com> + * + * Note: The controller like many controllers has shared timings for + * PIO and DMA. We thus flip to the DMA timings in dma_start and flip back + * in the dma_stop function. Thus we actually don't need a set_dmamode + * method as the PIO method is always called and will set the right PIO + * timing parameters. + * + * The Ninja32 Cardbus is not a generic SFF controller. Instead it is + * laid out as follows off BAR 0. This is based upon Mark Lord's delkin + * driver and the extensive analysis done by the BSD developers, notably + * ITOH Yasufumi. + * + * Base + 0x00 IRQ Status + * Base + 0x01 IRQ control + * Base + 0x02 Chipset control + * Base + 0x03 Unknown + * Base + 0x04 VDMA and reset control + wait bits + * Base + 0x08 BMIMBA + * Base + 0x0C DMA Length + * Base + 0x10 Taskfile + * Base + 0x18 BMDMA Status ? + * Base + 0x1C + * Base + 0x1D Bus master control + * bit 0 = enable + * bit 1 = 0 write/1 read + * bit 2 = 1 sgtable + * bit 3 = go + * bit 4-6 wait bits + * bit 7 = done + * Base + 0x1E AltStatus + * Base + 0x1F timing register + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/pci.h> +#include <linux/init.h> +#include <linux/blkdev.h> +#include <linux/delay.h> +#include <scsi/scsi_host.h> +#include <linux/libata.h> + +#define DRV_NAME "pata_ninja32" +#define DRV_VERSION "0.0.1" + + +/** + * ninja32_set_piomode - set initial PIO mode data + * @ap: ATA interface + * @adev: ATA device + * + * Called to do the PIO mode setup. Our timing registers are shared + * but we want to set the PIO timing by default. + */ + +static void ninja32_set_piomode(struct ata_port *ap, struct ata_device *adev) +{ + static u16 pio_timing[5] = { + 0xd6, 0x85, 0x44, 0x33, 0x13 + }; + iowrite8(pio_timing[adev->pio_mode - XFER_PIO_0], + ap->ioaddr.bmdma_addr + 0x1f); + ap->private_data = adev; +} + + +static void ninja32_dev_select(struct ata_port *ap, unsigned int device) +{ + struct ata_device *adev = &ap->link.device[device]; + if (ap->private_data != adev) { + iowrite8(0xd6, ap->ioaddr.bmdma_addr + 0x1f); + ata_sff_dev_select(ap, device); + ninja32_set_piomode(ap, adev); + } +} + +static struct scsi_host_template ninja32_sht = { + ATA_BMDMA_SHT(DRV_NAME), +}; + +static struct ata_port_operations ninja32_port_ops = { + .inherits = &ata_bmdma_port_ops, + .sff_dev_select = ninja32_dev_select, + .cable_detect = ata_cable_40wire, + .set_piomode = ninja32_set_piomode, +}; + +static int ninja32_init_one(struct pci_dev *dev, const struct pci_device_id *id) +{ + struct ata_host *host; + struct ata_port *ap; + void __iomem *base; + int rc; + + host = ata_host_alloc(&dev->dev, 1); + if (!host) + return -ENOMEM; + ap = host->ports[0]; + + /* Set up the PCI device */ + rc = pcim_enable_device(dev); + if (rc) + return rc; + rc = pcim_iomap_regions(dev, 1 << 0, DRV_NAME); + if (rc == -EBUSY) + pcim_pin_device(dev); + if (rc) + return rc; + + host->iomap = pcim_iomap_table(dev); + rc = pci_set_dma_mask(dev, ATA_DMA_MASK); + if (rc) + return rc; + rc = pci_set_consistent_dma_mask(dev, ATA_DMA_MASK); + if (rc) + return rc; + pci_set_master(dev); + + /* Set up the register mappings */ + base = host->iomap[0]; + if (!base) + return -ENOMEM; + ap->ops = &ninja32_port_ops; + ap->pio_mask = 0x1F; + ap->flags |= ATA_FLAG_SLAVE_POSS; + + ap->ioaddr.cmd_addr = base + 0x10; + ap->ioaddr.ctl_addr = base + 0x1E; + ap->ioaddr.altstatus_addr = base + 0x1E; + ap->ioaddr.bmdma_addr = base; + ata_sff_std_ports(&ap->ioaddr); + + iowrite8(0x05, base + 0x01); /* Enable interrupt lines */ + iowrite8(0xBE, base + 0x02); /* Burst, ?? setup */ + iowrite8(0x01, base + 0x03); /* Unknown */ + iowrite8(0x20, base + 0x04); /* WAIT0 */ + iowrite8(0x8f, base + 0x05); /* Unknown */ + iowrite8(0xa4, base + 0x1c); /* Unknown */ + iowrite8(0x83, base + 0x1d); /* BMDMA control: WAIT0 */ + /* FIXME: Should we disable them at remove ? */ + return ata_host_activate(host, dev->irq, ata_sff_interrupt, + IRQF_SHARED, &ninja32_sht); +} + +static const struct pci_device_id ninja32[] = { + { 0x1145, 0xf021, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, + { 0x1145, 0xf024, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, + { }, +}; + +static struct pci_driver ninja32_pci_driver = { + .name = DRV_NAME, + .id_table = ninja32, + .probe = ninja32_init_one, + .remove = ata_pci_remove_one +}; + +static int __init ninja32_init(void) +{ + return pci_register_driver(&ninja32_pci_driver); +} + +static void __exit ninja32_exit(void) +{ + pci_unregister_driver(&ninja32_pci_driver); +} + +MODULE_AUTHOR("Alan Cox"); +MODULE_DESCRIPTION("low-level driver for Ninja32 ATA"); +MODULE_LICENSE("GPL"); +MODULE_DEVICE_TABLE(pci, ninja32); +MODULE_VERSION(DRV_VERSION); + +module_init(ninja32_init); +module_exit(ninja32_exit); diff --git a/drivers/ata/pata_ns87410.c b/drivers/ata/pata_ns87410.c index 9fe66fd..be756b7 100644 --- a/drivers/ata/pata_ns87410.c +++ b/drivers/ata/pata_ns87410.c @@ -50,21 +50,7 @@ static int ns87410_pre_reset(struct ata_link *link, unsigned long deadline) if (!pci_test_config_bits(pdev, &ns87410_enable_bits[ap->port_no])) return -ENOENT; - return ata_std_prereset(link, deadline); -} - -/** - * ns87410_error_handler - probe reset - * @ap: ATA port - * - * Perform the ATA probe and bus reset sequence plus specific handling - * for this hardware. The MPIIX has the enable bits in a different place - * to PIIX4 and friends. As a pure PIO device it has no cable detect - */ - -static void ns87410_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, ns87410_pre_reset, ata_std_softreset, NULL, ata_std_postreset); + return ata_sff_prereset(link, deadline); } /** @@ -105,9 +91,9 @@ static void ns87410_set_piomode(struct ata_port *ap, struct ata_device *adev) return; } - at.active = FIT(at.active, 2, 16) - 2; - at.setup = FIT(at.setup, 1, 4) - 1; - at.recover = FIT(at.recover, 1, 12) - 1; + at.active = clamp_val(at.active, 2, 16) - 2; + at.setup = clamp_val(at.setup, 1, 4) - 1; + at.recover = clamp_val(at.recover, 1, 12) - 1; idetcr = (at.setup << 6) | (recoverbits[at.recover] << 3) | activebits[at.active]; @@ -119,7 +105,7 @@ static void ns87410_set_piomode(struct ata_port *ap, struct ata_device *adev) } /** - * ns87410_qc_issue_prot - command issue + * ns87410_qc_issue - command issue * @qc: command pending * * Called when the libata layer is about to issue a command. We wrap @@ -127,7 +113,7 @@ static void ns87410_set_piomode(struct ata_port *ap, struct ata_device *adev) * necessary. */ -static unsigned int ns87410_qc_issue_prot(struct ata_queued_cmd *qc) +static unsigned int ns87410_qc_issue(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct ata_device *adev = qc->dev; @@ -140,64 +126,30 @@ static unsigned int ns87410_qc_issue_prot(struct ata_queued_cmd *qc) if (adev->pio_mode && adev != ap->private_data) ns87410_set_piomode(ap, adev); - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } static struct scsi_host_template ns87410_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_PIO_SHT(DRV_NAME), }; static struct ata_port_operations ns87410_port_ops = { - .set_piomode = ns87410_set_piomode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ns87410_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, + .inherits = &ata_sff_port_ops, + .qc_issue = ns87410_qc_issue, .cable_detect = ata_cable_40wire, - - .qc_prep = ata_qc_prep, - .qc_issue = ns87410_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .set_piomode = ns87410_set_piomode, + .prereset = ns87410_pre_reset, }; static int ns87410_init_one(struct pci_dev *dev, const struct pci_device_id *id) { static const struct ata_port_info info = { - .sht = &ns87410_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x0F, .port_ops = &ns87410_port_ops }; const struct ata_port_info *ppi[] = { &info, NULL }; - return ata_pci_init_one(dev, ppi); + return ata_pci_sff_init_one(dev, ppi, &ns87410_sht, NULL); } static const struct pci_device_id ns87410[] = { diff --git a/drivers/ata/pata_ns87415.c b/drivers/ata/pata_ns87415.c index d0e2e50..e0aa7ea 100644 --- a/drivers/ata/pata_ns87415.c +++ b/drivers/ata/pata_ns87415.c @@ -66,8 +66,8 @@ static void ns87415_set_mode(struct ata_port *ap, struct ata_device *adev, u8 mo ata_timing_compute(adev, adev->pio_mode, &t, T, 0); - clocking = 17 - FIT(t.active, 2, 17); - clocking |= (16 - FIT(t.recover, 1, 16)) << 4; + clocking = 17 - clamp_val(t.active, 2, 17); + clocking |= (16 - clamp_val(t.recover, 1, 16)) << 4; /* Use the same timing for read and write bytes */ clocking |= (clocking << 8); pci_write_config_word(dev, timing, clocking); @@ -138,7 +138,7 @@ static void ns87415_bmdma_setup(struct ata_queued_cmd *qc) dmactl |= ATA_DMA_WR; iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD); /* issue r/w command */ - ap->ops->exec_command(ap, &qc->tf); + ap->ops->sff_exec_command(ap, &qc->tf); } /** @@ -172,14 +172,14 @@ static void ns87415_bmdma_stop(struct ata_queued_cmd *qc) } /** - * ns87415_bmdma_irq_clear - Clear interrupt + * ns87415_irq_clear - Clear interrupt * @ap: Channel to clear * * Erratum: Due to a chip bug regisers 02 and 0A bit 1 and 2 (the * error bits) are reset by writing to register 00 or 08. */ -static void ns87415_bmdma_irq_clear(struct ata_port *ap) +static void ns87415_irq_clear(struct ata_port *ap) { void __iomem *mmio = ap->ioaddr.bmdma_addr; @@ -297,90 +297,32 @@ static u8 ns87560_bmdma_status(struct ata_port *ap) { return ns87560_read_buggy(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); } - -static const struct ata_port_operations ns87560_pata_ops = { - .set_piomode = ns87415_set_piomode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ns87560_tf_read, - .check_status = ns87560_check_status, - .check_atapi_dma = ns87415_check_atapi_dma, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .bmdma_setup = ns87415_bmdma_setup, - .bmdma_start = ns87415_bmdma_start, - .bmdma_stop = ns87415_bmdma_stop, - .bmdma_status = ns87560_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ns87415_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, -}; - #endif /* 87560 SuperIO Support */ +static struct ata_port_operations ns87415_pata_ops = { + .inherits = &ata_bmdma_port_ops, -static const struct ata_port_operations ns87415_pata_ops = { - .set_piomode = ns87415_set_piomode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, .check_atapi_dma = ns87415_check_atapi_dma, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - .bmdma_setup = ns87415_bmdma_setup, .bmdma_start = ns87415_bmdma_start, .bmdma_stop = ns87415_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, + .sff_irq_clear = ns87415_irq_clear, - .irq_handler = ata_interrupt, - .irq_clear = ns87415_bmdma_irq_clear, - .irq_on = ata_irq_on, + .cable_detect = ata_cable_40wire, + .set_piomode = ns87415_set_piomode, +}; - .port_start = ata_sff_port_start, +#if defined(CONFIG_SUPERIO) +static struct ata_port_operations ns87560_pata_ops = { + .inherits = &ns87415_pata_ops, + .sff_tf_read = ns87560_tf_read, + .sff_check_status = ns87560_check_status, + .bmdma_status = ns87560_bmdma_status, }; +#endif static struct scsi_host_template ns87415_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; @@ -403,16 +345,15 @@ static int ns87415_init_one (struct pci_dev *pdev, const struct pci_device_id *e { static int printed_version; static const struct ata_port_info info = { - .sht = &ns87415_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .port_ops = &ns87415_pata_ops, }; const struct ata_port_info *ppi[] = { &info, NULL }; + int rc; #if defined(CONFIG_SUPERIO) static const struct ata_port_info info87560 = { - .sht = &ns87415_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ @@ -425,11 +366,16 @@ static int ns87415_init_one (struct pci_dev *pdev, const struct pci_device_id *e if (!printed_version++) dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); + + rc = pcim_enable_device(pdev); + if (rc) + return rc; + /* Select 512 byte sectors */ pci_write_config_byte(pdev, 0x55, 0xEE); /* Select PIO0 8bit clocking */ pci_write_config_byte(pdev, 0x54, 0xB7); - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &ns87415_sht, NULL); } static const struct pci_device_id ns87415_pci_tbl[] = { diff --git a/drivers/ata/pata_of_platform.c b/drivers/ata/pata_of_platform.c new file mode 100644 index 0000000..408da30 --- /dev/null +++ b/drivers/ata/pata_of_platform.c @@ -0,0 +1,114 @@ +/* + * OF-platform PATA driver + * + * Copyright (c) 2007 MontaVista Software, Inc. + * Anton Vorontsov <avorontsov@ru.mvista.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of_platform.h> +#include <linux/ata_platform.h> + +static int __devinit pata_of_platform_probe(struct of_device *ofdev, + const struct of_device_id *match) +{ + int ret; + struct device_node *dn = ofdev->node; + struct resource io_res; + struct resource ctl_res; + struct resource irq_res; + unsigned int reg_shift = 0; + int pio_mode = 0; + int pio_mask; + const u32 *prop; + + ret = of_address_to_resource(dn, 0, &io_res); + if (ret) { + dev_err(&ofdev->dev, "can't get IO address from " + "device tree\n"); + return -EINVAL; + } + + if (of_device_is_compatible(dn, "electra-ide")) { + /* Altstatus is really at offset 0x3f6 from the primary window + * on electra-ide. Adjust ctl_res and io_res accordingly. + */ + ctl_res = io_res; + ctl_res.start = ctl_res.start+0x3f6; + io_res.end = ctl_res.start-1; + } else { + ret = of_address_to_resource(dn, 1, &ctl_res); + if (ret) { + dev_err(&ofdev->dev, "can't get CTL address from " + "device tree\n"); + return -EINVAL; + } + } + + ret = of_irq_to_resource(dn, 0, &irq_res); + if (ret == NO_IRQ) + irq_res.start = irq_res.end = -1; + else + irq_res.flags = 0; + + prop = of_get_property(dn, "reg-shift", NULL); + if (prop) + reg_shift = *prop; + + prop = of_get_property(dn, "pio-mode", NULL); + if (prop) { + pio_mode = *prop; + if (pio_mode > 6) { + dev_err(&ofdev->dev, "invalid pio-mode\n"); + return -EINVAL; + } + } else { + dev_info(&ofdev->dev, "pio-mode unspecified, assuming PIO0\n"); + } + + pio_mask = 1 << pio_mode; + pio_mask |= (1 << pio_mode) - 1; + + return __pata_platform_probe(&ofdev->dev, &io_res, &ctl_res, &irq_res, + reg_shift, pio_mask); +} + +static int __devexit pata_of_platform_remove(struct of_device *ofdev) +{ + return __pata_platform_remove(&ofdev->dev); +} + +static struct of_device_id pata_of_platform_match[] = { + { .compatible = "ata-generic", }, + { .compatible = "electra-ide", }, + {}, +}; +MODULE_DEVICE_TABLE(of, pata_of_platform_match); + +static struct of_platform_driver pata_of_platform_driver = { + .name = "pata_of_platform", + .match_table = pata_of_platform_match, + .probe = pata_of_platform_probe, + .remove = __devexit_p(pata_of_platform_remove), +}; + +static int __init pata_of_platform_init(void) +{ + return of_register_platform_driver(&pata_of_platform_driver); +} +module_init(pata_of_platform_init); + +static void __exit pata_of_platform_exit(void) +{ + of_unregister_platform_driver(&pata_of_platform_driver); +} +module_exit(pata_of_platform_exit); + +MODULE_DESCRIPTION("OF-platform PATA driver"); +MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>"); +MODULE_LICENSE("GPL"); diff --git a/drivers/ata/pata_oldpiix.c b/drivers/ata/pata_oldpiix.c index 44da09a..e678af3 100644 --- a/drivers/ata/pata_oldpiix.c +++ b/drivers/ata/pata_oldpiix.c @@ -47,21 +47,7 @@ static int oldpiix_pre_reset(struct ata_link *link, unsigned long deadline) if (!pci_test_config_bits(pdev, &oldpiix_enable_bits[ap->port_no])) return -ENOENT; - return ata_std_prereset(link, deadline); -} - -/** - * oldpiix_pata_error_handler - Probe specified port on PATA host controller - * @ap: Port to probe - * @classes: - * - * LOCKING: - * None (inherited from caller). - */ - -static void oldpiix_pata_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, oldpiix_pre_reset, ata_std_softreset, NULL, ata_std_postreset); + return ata_sff_prereset(link, deadline); } /** @@ -195,7 +181,7 @@ static void oldpiix_set_dmamode (struct ata_port *ap, struct ata_device *adev) } /** - * oldpiix_qc_issue_prot - command issue + * oldpiix_qc_issue - command issue * @qc: command pending * * Called when the libata layer is about to issue a command. We wrap @@ -205,7 +191,7 @@ static void oldpiix_set_dmamode (struct ata_port *ap, struct ata_device *adev) * be made PIO0. */ -static unsigned int oldpiix_qc_issue_prot(struct ata_queued_cmd *qc) +static unsigned int oldpiix_qc_issue(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct ata_device *adev = qc->dev; @@ -215,58 +201,21 @@ static unsigned int oldpiix_qc_issue_prot(struct ata_queued_cmd *qc) if (adev->dma_mode) oldpiix_set_dmamode(ap, adev); } - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } static struct scsi_host_template oldpiix_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations oldpiix_pata_ops = { +static struct ata_port_operations oldpiix_pata_ops = { + .inherits = &ata_bmdma_port_ops, + .qc_issue = oldpiix_qc_issue, + .cable_detect = ata_cable_40wire, .set_piomode = oldpiix_set_piomode, .set_dmamode = oldpiix_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = oldpiix_pata_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = oldpiix_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .prereset = oldpiix_pre_reset, }; @@ -289,7 +238,6 @@ static int oldpiix_init_one (struct pci_dev *pdev, const struct pci_device_id *e { static int printed_version; static const struct ata_port_info info = { - .sht = &oldpiix_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma1-2 */ @@ -301,7 +249,7 @@ static int oldpiix_init_one (struct pci_dev *pdev, const struct pci_device_id *e dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &oldpiix_sht, NULL); } static const struct pci_device_id oldpiix_pci_tbl[] = { diff --git a/drivers/ata/pata_opti.c b/drivers/ata/pata_opti.c index 8f79447..fb2cf66 100644 --- a/drivers/ata/pata_opti.c +++ b/drivers/ata/pata_opti.c @@ -64,22 +64,7 @@ static int opti_pre_reset(struct ata_link *link, unsigned long deadline) if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no])) return -ENOENT; - return ata_std_prereset(link, deadline); -} - -/** - * opti_probe_reset - probe reset - * @ap: ATA port - * - * Perform the ATA probe and bus reset sequence plus specific handling - * for this hardware. The Opti needs little handling - we have no UDMA66 - * capability that needs cable detection. All we must do is check the port - * is enabled. - */ - -static void opti_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, opti_pre_reset, ata_std_softreset, NULL, ata_std_postreset); + return ata_sff_prereset(link, deadline); } /** @@ -165,58 +150,19 @@ static void opti_set_piomode(struct ata_port *ap, struct ata_device *adev) } static struct scsi_host_template opti_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_PIO_SHT(DRV_NAME), }; static struct ata_port_operations opti_port_ops = { - .set_piomode = opti_set_piomode, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = opti_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, + .inherits = &ata_sff_port_ops, .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .set_piomode = opti_set_piomode, + .prereset = opti_pre_reset, }; static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id) { static const struct ata_port_info info = { - .sht = &opti_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .port_ops = &opti_port_ops @@ -227,7 +173,7 @@ static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id) if (!printed_version++) dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n"); - return ata_pci_init_one(dev, ppi); + return ata_pci_sff_init_one(dev, ppi, &opti_sht, NULL); } static const struct pci_device_id opti[] = { diff --git a/drivers/ata/pata_optidma.c b/drivers/ata/pata_optidma.c index f9b485a..4cd7444 100644 --- a/drivers/ata/pata_optidma.c +++ b/drivers/ata/pata_optidma.c @@ -64,22 +64,7 @@ static int optidma_pre_reset(struct ata_link *link, unsigned long deadline) if (ap->port_no && !pci_test_config_bits(pdev, &optidma_enable_bits)) return -ENOENT; - return ata_std_prereset(link, deadline); -} - -/** - * optidma_probe_reset - probe reset - * @ap: ATA port - * - * Perform the ATA probe and bus reset sequence plus specific handling - * for this hardware. The Opti needs little handling - we have no UDMA66 - * capability that needs cable detection. All we must do is check the port - * is enabled. - */ - -static void optidma_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, optidma_pre_reset, ata_std_softreset, NULL, ata_std_postreset); + return ata_sff_prereset(link, deadline); } /** @@ -350,89 +335,22 @@ static int optidma_set_mode(struct ata_link *link, struct ata_device **r_failed) } static struct scsi_host_template optidma_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct ata_port_operations optidma_port_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = ata_cable_40wire, .set_piomode = optidma_set_pio_mode, .set_dmamode = optidma_set_dma_mode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .error_handler = optidma_error_handler, .set_mode = optidma_set_mode, - .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .prereset = optidma_pre_reset, }; static struct ata_port_operations optiplus_port_ops = { + .inherits = &optidma_port_ops, .set_piomode = optiplus_set_pio_mode, .set_dmamode = optiplus_set_dma_mode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .error_handler = optidma_error_handler, - .set_mode = optidma_set_mode, - .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; /** @@ -481,14 +399,12 @@ done_nomsg: /* Wrong chip revision */ static int optidma_init_one(struct pci_dev *dev, const struct pci_device_id *id) { static const struct ata_port_info info_82c700 = { - .sht = &optidma_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, .port_ops = &optidma_port_ops }; static const struct ata_port_info info_82c700_udma = { - .sht = &optidma_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -497,10 +413,15 @@ static int optidma_init_one(struct pci_dev *dev, const struct pci_device_id *id) }; const struct ata_port_info *ppi[] = { &info_82c700, NULL }; static int printed_version; + int rc; if (!printed_version++) dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n"); + rc = pcim_enable_device(dev); + if (rc) + return rc; + /* Fixed location chipset magic */ inw(0x1F1); inw(0x1F1); @@ -509,7 +430,7 @@ static int optidma_init_one(struct pci_dev *dev, const struct pci_device_id *id) if (optiplus_with_udma(dev)) ppi[0] = &info_82c700_udma; - return ata_pci_init_one(dev, ppi); + return ata_pci_sff_init_one(dev, ppi, &optidma_sht, NULL); } static const struct pci_device_id optidma[] = { diff --git a/drivers/ata/pata_pcmcia.c b/drivers/ata/pata_pcmcia.c index fd36099..3d39f9d 100644 --- a/drivers/ata/pata_pcmcia.c +++ b/drivers/ata/pata_pcmcia.c @@ -42,7 +42,7 @@ #define DRV_NAME "pata_pcmcia" -#define DRV_VERSION "0.3.2" +#define DRV_VERSION "0.3.3" /* * Private data structure to glue stuff together @@ -86,47 +86,63 @@ static int pcmcia_set_mode(struct ata_link *link, struct ata_device **r_failed_d return ata_do_set_mode(link, r_failed_dev); } +/** + * pcmcia_set_mode_8bit - PCMCIA specific mode setup + * @link: link + * @r_failed_dev: Return pointer for failed device + * + * For the simple emulated 8bit stuff the less we do the better. + */ + +static int pcmcia_set_mode_8bit(struct ata_link *link, + struct ata_device **r_failed_dev) +{ + return 0; +} + +/** + * ata_data_xfer_8bit - Transfer data by 8bit PIO + * @dev: device to target + * @buf: data buffer + * @buflen: buffer length + * @rw: read/write + * + * Transfer data from/to the device data register by 8 bit PIO. + * + * LOCKING: + * Inherited from caller. + */ + +static unsigned int ata_data_xfer_8bit(struct ata_device *dev, + unsigned char *buf, unsigned int buflen, int rw) +{ + struct ata_port *ap = dev->link->ap; + + if (rw == READ) + ioread8_rep(ap->ioaddr.data_addr, buf, buflen); + else + iowrite8_rep(ap->ioaddr.data_addr, buf, buflen); + + return buflen; +} + + static struct scsi_host_template pcmcia_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_PIO_SHT(DRV_NAME), }; static struct ata_port_operations pcmcia_port_ops = { - .set_mode = pcmcia_set_mode, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, + .inherits = &ata_sff_port_ops, + .sff_data_xfer = ata_sff_data_xfer_noirq, .cable_detect = ata_cable_40wire, + .set_mode = pcmcia_set_mode, +}; - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer_noirq, - - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, +static struct ata_port_operations pcmcia_8bit_port_ops = { + .inherits = &ata_sff_port_ops, + .sff_data_xfer = ata_data_xfer_8bit, + .cable_detect = ata_cable_40wire, + .set_mode = pcmcia_set_mode_8bit, }; #define CS_CHECK(fn, ret) \ @@ -153,9 +169,12 @@ static int pcmcia_init_one(struct pcmcia_device *pdev) cistpl_cftable_entry_t dflt; } *stk = NULL; cistpl_cftable_entry_t *cfg; - int pass, last_ret = 0, last_fn = 0, is_kme = 0, ret = -ENOMEM; + int pass, last_ret = 0, last_fn = 0, is_kme = 0, ret = -ENOMEM, p; unsigned long io_base, ctl_base; void __iomem *io_addr, *ctl_addr; + int n_ports = 1; + + struct ata_port_operations *ops = &pcmcia_port_ops; info = kzalloc(sizeof(*info), GFP_KERNEL); if (info == NULL) @@ -282,30 +301,35 @@ next_entry: /* FIXME: Could be more ports at base + 0x10 but we only deal with one right now */ if (pdev->io.NumPorts1 >= 0x20) - printk(KERN_WARNING DRV_NAME ": second channel not yet supported.\n"); + n_ports = 2; + if (pdev->manf_id == 0x0097 && pdev->card_id == 0x1620) + ops = &pcmcia_8bit_port_ops; /* * Having done the PCMCIA plumbing the ATA side is relatively * sane. */ ret = -ENOMEM; - host = ata_host_alloc(&pdev->dev, 1); + host = ata_host_alloc(&pdev->dev, n_ports); if (!host) goto failed; - ap = host->ports[0]; - ap->ops = &pcmcia_port_ops; - ap->pio_mask = 1; /* ISA so PIO 0 cycles */ - ap->flags |= ATA_FLAG_SLAVE_POSS; - ap->ioaddr.cmd_addr = io_addr; - ap->ioaddr.altstatus_addr = ctl_addr; - ap->ioaddr.ctl_addr = ctl_addr; - ata_std_ports(&ap->ioaddr); + for (p = 0; p < n_ports; p++) { + ap = host->ports[p]; + + ap->ops = ops; + ap->pio_mask = 1; /* ISA so PIO 0 cycles */ + ap->flags |= ATA_FLAG_SLAVE_POSS; + ap->ioaddr.cmd_addr = io_addr + 0x10 * p; + ap->ioaddr.altstatus_addr = ctl_addr + 0x10 * p; + ap->ioaddr.ctl_addr = ctl_addr + 0x10 * p; + ata_sff_std_ports(&ap->ioaddr); - ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", io_base, ctl_base); + ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", io_base, ctl_base); + } /* activate */ - ret = ata_host_activate(host, pdev->irq.AssignedIRQ, ata_interrupt, + ret = ata_host_activate(host, pdev->irq.AssignedIRQ, ata_sff_interrupt, IRQF_SHARED, &pcmcia_sht); if (ret) goto failed; @@ -360,6 +384,7 @@ static struct pcmcia_device_id pcmcia_devices[] = { PCMCIA_DEVICE_MANF_CARD(0x0032, 0x0704), PCMCIA_DEVICE_MANF_CARD(0x0032, 0x2904), PCMCIA_DEVICE_MANF_CARD(0x0045, 0x0401), /* SanDisk CFA */ + PCMCIA_DEVICE_MANF_CARD(0x0097, 0x1620), /* TI emulated */ PCMCIA_DEVICE_MANF_CARD(0x0098, 0x0000), /* Toshiba */ PCMCIA_DEVICE_MANF_CARD(0x00a4, 0x002d), PCMCIA_DEVICE_MANF_CARD(0x00ce, 0x0000), /* Samsung */ diff --git a/drivers/ata/pata_pdc2027x.c b/drivers/ata/pata_pdc2027x.c index f4b8bfd..0e1c2c1 100644 --- a/drivers/ata/pata_pdc2027x.c +++ b/drivers/ata/pata_pdc2027x.c @@ -39,7 +39,7 @@ #undef PDC_DEBUG #ifdef PDC_DEBUG -#define PDPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) +#define PDPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args) #else #define PDPRINTK(fmt, args...) #endif @@ -63,7 +63,7 @@ enum { }; static int pdc2027x_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); -static void pdc2027x_error_handler(struct ata_port *ap); +static int pdc2027x_prereset(struct ata_link *link, unsigned long deadline); static void pdc2027x_set_piomode(struct ata_port *ap, struct ata_device *adev); static void pdc2027x_set_dmamode(struct ata_port *ap, struct ata_device *adev); static int pdc2027x_check_atapi_dma(struct ata_queued_cmd *qc); @@ -110,17 +110,13 @@ static struct pdc2027x_udma_timing { }; static const struct pci_device_id pdc2027x_pci_tbl[] = { -#if 0 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20268), PDC_UDMA_100 }, { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20269), PDC_UDMA_133 }, { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20270), PDC_UDMA_100 }, { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20271), PDC_UDMA_133 }, -#endif { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20275), PDC_UDMA_133 }, -#if 0 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20276), PDC_UDMA_133 }, { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20277), PDC_UDMA_133 }, -#endif { } /* terminate list */ }; @@ -133,84 +129,22 @@ static struct pci_driver pdc2027x_pci_driver = { }; static struct scsi_host_template pdc2027x_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct ata_port_operations pdc2027x_pata100_ops = { - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - + .inherits = &ata_bmdma_port_ops, .check_atapi_dma = pdc2027x_check_atapi_dma, - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = pdc2027x_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, .cable_detect = pdc2027x_cable_detect, - - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .prereset = pdc2027x_prereset, }; static struct ata_port_operations pdc2027x_pata133_ops = { + .inherits = &pdc2027x_pata100_ops, + .mode_filter = pdc2027x_mode_filter, .set_piomode = pdc2027x_set_piomode, .set_dmamode = pdc2027x_set_dmamode, .set_mode = pdc2027x_set_mode, - .mode_filter = pdc2027x_mode_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .check_atapi_dma = pdc2027x_check_atapi_dma, - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = pdc2027x_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = pdc2027x_cable_detect, - - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; static struct ata_port_info pdc2027x_port_info[] = { @@ -314,22 +248,7 @@ static int pdc2027x_prereset(struct ata_link *link, unsigned long deadline) /* Check whether port enabled */ if (!pdc2027x_port_enabled(link->ap)) return -ENOENT; - return ata_std_prereset(link, deadline); -} - -/** - * pdc2027x_error_handler - Perform reset on PATA port and classify - * @ap: Port to reset - * - * Reset PATA phy and classify attached devices. - * - * LOCKING: - * None (inherited from caller). - */ - -static void pdc2027x_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, pdc2027x_prereset, ata_std_softreset, NULL, ata_std_postreset); + return ata_sff_prereset(link, deadline); } /** @@ -346,16 +265,16 @@ static unsigned long pdc2027x_mode_filter(struct ata_device *adev, unsigned long struct ata_device *pair = ata_dev_pair(adev); if (adev->class != ATA_DEV_ATA || adev->devno == 0 || pair == NULL) - return ata_pci_default_filter(adev, mask); + return ata_bmdma_mode_filter(adev, mask); /* Check for slave of a Maxtor at UDMA6 */ ata_id_c_string(pair->id, model_num, ATA_ID_PROD, ATA_ID_PROD_LEN + 1); /* If the master is a maxtor in UDMA6 then the slave should not use UDMA 6 */ - if (strstr(model_num, "Maxtor") == 0 && pair->dma_mode == XFER_UDMA_6) + if (strstr(model_num, "Maxtor") == NULL && pair->dma_mode == XFER_UDMA_6) mask &= ~ (1 << (6 + ATA_SHIFT_UDMA)); - return ata_pci_default_filter(adev, mask); + return ata_bmdma_mode_filter(adev, mask); } /** @@ -798,14 +717,6 @@ static int __devinit pdc2027x_init_one(struct pci_dev *pdev, const struct pci_de if (!printed_version++) dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); - /* load only on IBM p5 machines */ - if (!(pdev->bus->self && - pdev->bus->self->vendor == PCI_VENDOR_ID_IBM && - pdev->bus->self->device == 0x0188)) { - printk(KERN_INFO "device ignored. only supported on IBM p5 machines"); - return -ENODEV; - } - /* alloc host */ host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2); if (!host) @@ -848,8 +759,8 @@ static int __devinit pdc2027x_init_one(struct pci_dev *pdev, const struct pci_de return -EIO; pci_set_master(pdev); - return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED, - &pdc2027x_sht); + return ata_host_activate(host, pdev->irq, ata_sff_interrupt, + IRQF_SHARED, &pdc2027x_sht); } /** diff --git a/drivers/ata/pata_pdc202xx_old.c b/drivers/ata/pata_pdc202xx_old.c index bc7c2d5..d267306 100644 --- a/drivers/ata/pata_pdc202xx_old.c +++ b/drivers/ata/pata_pdc202xx_old.c @@ -168,8 +168,7 @@ static void pdc2026x_bmdma_start(struct ata_queued_cmd *qc) pdc202xx_set_dmamode(ap, qc->dev); /* Cases the state machine will not complete correctly without help */ - if ((tf->flags & ATA_TFLAG_LBA48) || tf->protocol == ATA_PROT_ATAPI_DMA) - { + if ((tf->flags & ATA_TFLAG_LBA48) || tf->protocol == ATAPI_PROT_DMA) { len = qc->nbytes / 2; if (tf->flags & ATA_TFLAG_WRITE) @@ -208,15 +207,15 @@ static void pdc2026x_bmdma_stop(struct ata_queued_cmd *qc) void __iomem *atapi_reg = master + 0x20 + (4 * ap->port_no); /* Cases the state machine will not complete correctly */ - if (tf->protocol == ATA_PROT_ATAPI_DMA || ( tf->flags & ATA_TFLAG_LBA48)) { + if (tf->protocol == ATAPI_PROT_DMA || (tf->flags & ATA_TFLAG_LBA48)) { iowrite32(0, atapi_reg); iowrite8(ioread8(clock) & ~sel66, clock); } /* Flip back to 33Mhz for PIO */ if (adev->dma_mode >= XFER_UDMA_2) iowrite8(ioread8(clock) & ~sel66, clock); - ata_bmdma_stop(qc); + pdc202xx_set_piomode(ap, adev); } /** @@ -233,94 +232,64 @@ static void pdc2026x_dev_config(struct ata_device *adev) adev->max_sectors = 256; } +static int pdc2026x_port_start(struct ata_port *ap) +{ + void __iomem *bmdma = ap->ioaddr.bmdma_addr; + if (bmdma) { + /* Enable burst mode */ + u8 burst = ioread8(bmdma + 0x1f); + iowrite8(burst | 0x01, bmdma + 0x1f); + } + return ata_sff_port_start(ap); +} + +/** + * pdc2026x_check_atapi_dma - Check whether ATAPI DMA can be supported for this command + * @qc: Metadata associated with taskfile to check + * + * Just say no - not supported on older Promise. + * + * LOCKING: + * None (inherited from caller). + * + * RETURNS: 0 when ATAPI DMA can be used + * 1 otherwise + */ + +static int pdc2026x_check_atapi_dma(struct ata_queued_cmd *qc) +{ + return 1; +} + static struct scsi_host_template pdc202xx_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct ata_port_operations pdc2024x_port_ops = { - .set_piomode = pdc202xx_set_piomode, - .set_dmamode = pdc202xx_set_dmamode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .inherits = &ata_bmdma_port_ops, + + .cable_detect = ata_cable_40wire, + .set_piomode = pdc202xx_set_piomode, + .set_dmamode = pdc202xx_set_dmamode, }; static struct ata_port_operations pdc2026x_port_ops = { - .set_piomode = pdc202xx_set_piomode, - .set_dmamode = pdc202xx_set_dmamode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - .dev_config = pdc2026x_dev_config, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = pdc2026x_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = pdc2026x_bmdma_start, - .bmdma_stop = pdc2026x_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .inherits = &pdc2024x_port_ops, + + .check_atapi_dma = pdc2026x_check_atapi_dma, + .bmdma_start = pdc2026x_bmdma_start, + .bmdma_stop = pdc2026x_bmdma_stop, + + .cable_detect = pdc2026x_cable_detect, + .dev_config = pdc2026x_dev_config, + + .port_start = pdc2026x_port_start, }; static int pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) { static const struct ata_port_info info[3] = { { - .sht = &pdc202xx_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -328,7 +297,6 @@ static int pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id .port_ops = &pdc2024x_port_ops }, { - .sht = &pdc202xx_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -336,7 +304,6 @@ static int pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id .port_ops = &pdc2026x_port_ops }, { - .sht = &pdc202xx_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -357,7 +324,7 @@ static int pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id return -ENODEV; } } - return ata_pci_init_one(dev, ppi); + return ata_pci_sff_init_one(dev, ppi, &pdc202xx_sht, NULL); } static const struct pci_device_id pdc202xx[] = { diff --git a/drivers/ata/pata_platform.c b/drivers/ata/pata_platform.c index ac03a90..8f65ad6 100644 --- a/drivers/ata/pata_platform.c +++ b/drivers/ata/pata_platform.c @@ -19,7 +19,7 @@ #include <linux/ata.h> #include <linux/libata.h> #include <linux/platform_device.h> -#include <linux/pata_platform.h> +#include <linux/ata_platform.h> #define DRV_NAME "pata_platform" #define DRV_VERSION "1.2" @@ -46,61 +46,22 @@ static int pata_platform_set_mode(struct ata_link *link, struct ata_device **unu return 0; } -static int ata_dummy_ret0(struct ata_port *ap) { return 0; } - static struct scsi_host_template pata_platform_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_PIO_SHT(DRV_NAME), }; static struct ata_port_operations pata_platform_port_ops = { - .set_mode = pata_platform_set_mode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, + .inherits = &ata_sff_port_ops, + .sff_data_xfer = ata_sff_data_xfer_noirq, .cable_detect = ata_cable_unknown, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer_noirq, - - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_dummy_ret0, + .set_mode = pata_platform_set_mode, + .port_start = ATA_OP_NULL, }; static void pata_platform_setup_port(struct ata_ioports *ioaddr, - struct pata_platform_info *info) + unsigned int shift) { - unsigned int shift = 0; - /* Fixup the port shift for platforms that need it */ - if (info && info->ioport_shift) - shift = info->ioport_shift; - ioaddr->data_addr = ioaddr->cmd_addr + (ATA_REG_DATA << shift); ioaddr->error_addr = ioaddr->cmd_addr + (ATA_REG_ERR << shift); ioaddr->feature_addr = ioaddr->cmd_addr + (ATA_REG_FEATURE << shift); @@ -114,8 +75,13 @@ static void pata_platform_setup_port(struct ata_ioports *ioaddr, } /** - * pata_platform_probe - attach a platform interface - * @pdev: platform device + * __pata_platform_probe - attach a platform interface + * @dev: device + * @io_res: Resource representing I/O base + * @ctl_res: Resource representing CTL base + * @irq_res: Resource representing IRQ and its flags + * @ioport_shift: I/O port shift + * @__pio_mask: PIO mask * * Register a platform bus IDE interface. Such interfaces are PIO and we * assume do not support IRQ sharing. @@ -135,42 +101,18 @@ static void pata_platform_setup_port(struct ata_ioports *ioaddr, * * If no IRQ resource is present, PIO polling mode is used instead. */ -static int __devinit pata_platform_probe(struct platform_device *pdev) +int __devinit __pata_platform_probe(struct device *dev, + struct resource *io_res, + struct resource *ctl_res, + struct resource *irq_res, + unsigned int ioport_shift, + int __pio_mask) { - struct resource *io_res, *ctl_res; struct ata_host *host; struct ata_port *ap; - struct pata_platform_info *pp_info; unsigned int mmio; - int irq; - - /* - * Simple resource validation .. - */ - if ((pdev->num_resources != 3) && (pdev->num_resources != 2)) { - dev_err(&pdev->dev, "invalid number of resources\n"); - return -EINVAL; - } - - /* - * Get the I/O base first - */ - io_res = platform_get_resource(pdev, IORESOURCE_IO, 0); - if (io_res == NULL) { - io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (unlikely(io_res == NULL)) - return -EINVAL; - } - - /* - * Then the CTL base - */ - ctl_res = platform_get_resource(pdev, IORESOURCE_IO, 1); - if (ctl_res == NULL) { - ctl_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); - if (unlikely(ctl_res == NULL)) - return -EINVAL; - } + int irq = 0; + int irq_flags = 0; /* * Check for MMIO @@ -181,20 +123,21 @@ static int __devinit pata_platform_probe(struct platform_device *pdev) /* * And the IRQ */ - irq = platform_get_irq(pdev, 0); - if (irq < 0) - irq = 0; /* no irq */ + if (irq_res && irq_res->start > 0) { + irq = irq_res->start; + irq_flags = irq_res->flags; + } /* * Now that that's out of the way, wire up the port.. */ - host = ata_host_alloc(&pdev->dev, 1); + host = ata_host_alloc(dev, 1); if (!host) return -ENOMEM; ap = host->ports[0]; ap->ops = &pata_platform_port_ops; - ap->pio_mask = pio_mask; + ap->pio_mask = __pio_mask; ap->flags |= ATA_FLAG_SLAVE_POSS; /* @@ -209,52 +152,103 @@ static int __devinit pata_platform_probe(struct platform_device *pdev) * Handle the MMIO case */ if (mmio) { - ap->ioaddr.cmd_addr = devm_ioremap(&pdev->dev, io_res->start, + ap->ioaddr.cmd_addr = devm_ioremap(dev, io_res->start, io_res->end - io_res->start + 1); - ap->ioaddr.ctl_addr = devm_ioremap(&pdev->dev, ctl_res->start, + ap->ioaddr.ctl_addr = devm_ioremap(dev, ctl_res->start, ctl_res->end - ctl_res->start + 1); } else { - ap->ioaddr.cmd_addr = devm_ioport_map(&pdev->dev, io_res->start, + ap->ioaddr.cmd_addr = devm_ioport_map(dev, io_res->start, io_res->end - io_res->start + 1); - ap->ioaddr.ctl_addr = devm_ioport_map(&pdev->dev, ctl_res->start, + ap->ioaddr.ctl_addr = devm_ioport_map(dev, ctl_res->start, ctl_res->end - ctl_res->start + 1); } if (!ap->ioaddr.cmd_addr || !ap->ioaddr.ctl_addr) { - dev_err(&pdev->dev, "failed to map IO/CTL base\n"); + dev_err(dev, "failed to map IO/CTL base\n"); return -ENOMEM; } ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr; - pp_info = pdev->dev.platform_data; - pata_platform_setup_port(&ap->ioaddr, pp_info); + pata_platform_setup_port(&ap->ioaddr, ioport_shift); ata_port_desc(ap, "%s cmd 0x%llx ctl 0x%llx", mmio ? "mmio" : "ioport", (unsigned long long)io_res->start, (unsigned long long)ctl_res->start); /* activate */ - return ata_host_activate(host, irq, irq ? ata_interrupt : NULL, - pp_info ? pp_info->irq_flags : 0, - &pata_platform_sht); + return ata_host_activate(host, irq, irq ? ata_sff_interrupt : NULL, + irq_flags, &pata_platform_sht); } +EXPORT_SYMBOL_GPL(__pata_platform_probe); /** - * pata_platform_remove - unplug a platform interface - * @pdev: platform device + * __pata_platform_remove - unplug a platform interface + * @dev: device * * A platform bus ATA device has been unplugged. Perform the needed * cleanup. Also called on module unload for any active devices. */ -static int __devexit pata_platform_remove(struct platform_device *pdev) +int __devexit __pata_platform_remove(struct device *dev) { - struct device *dev = &pdev->dev; struct ata_host *host = dev_get_drvdata(dev); ata_host_detach(host); return 0; } +EXPORT_SYMBOL_GPL(__pata_platform_remove); + +static int __devinit pata_platform_probe(struct platform_device *pdev) +{ + struct resource *io_res; + struct resource *ctl_res; + struct resource *irq_res; + struct pata_platform_info *pp_info = pdev->dev.platform_data; + + /* + * Simple resource validation .. + */ + if ((pdev->num_resources != 3) && (pdev->num_resources != 2)) { + dev_err(&pdev->dev, "invalid number of resources\n"); + return -EINVAL; + } + + /* + * Get the I/O base first + */ + io_res = platform_get_resource(pdev, IORESOURCE_IO, 0); + if (io_res == NULL) { + io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (unlikely(io_res == NULL)) + return -EINVAL; + } + + /* + * Then the CTL base + */ + ctl_res = platform_get_resource(pdev, IORESOURCE_IO, 1); + if (ctl_res == NULL) { + ctl_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (unlikely(ctl_res == NULL)) + return -EINVAL; + } + + /* + * And the IRQ + */ + irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (irq_res) + irq_res->flags = pp_info ? pp_info->irq_flags : 0; + + return __pata_platform_probe(&pdev->dev, io_res, ctl_res, irq_res, + pp_info ? pp_info->ioport_shift : 0, + pio_mask); +} + +static int __devexit pata_platform_remove(struct platform_device *pdev) +{ + return __pata_platform_remove(&pdev->dev); +} static struct platform_driver pata_platform_driver = { .probe = pata_platform_probe, @@ -283,3 +277,4 @@ MODULE_AUTHOR("Paul Mundt"); MODULE_DESCRIPTION("low-level driver for platform device ATA"); MODULE_LICENSE("GPL"); MODULE_VERSION(DRV_VERSION); +MODULE_ALIAS("platform:" DRV_NAME); diff --git a/drivers/ata/pata_qdi.c b/drivers/ata/pata_qdi.c index 7d4c696..97e5b09 100644 --- a/drivers/ata/pata_qdi.c +++ b/drivers/ata/pata_qdi.c @@ -60,11 +60,11 @@ static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev) ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); if (qdi->fast) { - active = 8 - FIT(t.active, 1, 8); - recovery = 18 - FIT(t.recover, 3, 18); + active = 8 - clamp_val(t.active, 1, 8); + recovery = 18 - clamp_val(t.recover, 3, 18); } else { - active = 9 - FIT(t.active, 2, 9); - recovery = 15 - FIT(t.recover, 0, 15); + active = 9 - clamp_val(t.active, 2, 9); + recovery = 15 - clamp_val(t.recover, 0, 15); } timing = (recovery << 4) | active | 0x08; @@ -84,11 +84,11 @@ static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev) ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); if (qdi->fast) { - active = 8 - FIT(t.active, 1, 8); - recovery = 18 - FIT(t.recover, 3, 18); + active = 8 - clamp_val(t.active, 1, 8); + recovery = 18 - clamp_val(t.recover, 3, 18); } else { - active = 9 - FIT(t.active, 2, 9); - recovery = 15 - FIT(t.recover, 0, 15); + active = 9 - clamp_val(t.active, 2, 9); + recovery = 15 - clamp_val(t.recover, 0, 15); } timing = (recovery << 4) | active | 0x08; @@ -102,14 +102,14 @@ static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev) } /** - * qdi_qc_issue_prot - command issue + * qdi_qc_issue - command issue * @qc: command pending * * Called when the libata layer is about to issue a command. We wrap * this interface so that we can load the correct ATA timings. */ -static unsigned int qdi_qc_issue_prot(struct ata_queued_cmd *qc) +static unsigned int qdi_qc_issue(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct ata_device *adev = qc->dev; @@ -121,104 +121,53 @@ static unsigned int qdi_qc_issue_prot(struct ata_queued_cmd *qc) outb(qdi->clock[adev->devno], qdi->timing); } } - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } -static void qdi_data_xfer(struct ata_device *adev, unsigned char *buf, unsigned int buflen, int write_data) +static unsigned int qdi_data_xfer(struct ata_device *dev, unsigned char *buf, + unsigned int buflen, int rw) { - struct ata_port *ap = adev->link->ap; - int slop = buflen & 3; + if (ata_id_has_dword_io(dev->id)) { + struct ata_port *ap = dev->link->ap; + int slop = buflen & 3; - if (ata_id_has_dword_io(adev->id)) { - if (write_data) - iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); - else + if (rw == READ) ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); + else + iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); if (unlikely(slop)) { u32 pad; - if (write_data) { - memcpy(&pad, buf + buflen - slop, slop); - pad = le32_to_cpu(pad); - iowrite32(pad, ap->ioaddr.data_addr); - } else { - pad = ioread32(ap->ioaddr.data_addr); - pad = cpu_to_le32(pad); + if (rw == READ) { + pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr)); memcpy(buf + buflen - slop, &pad, slop); + } else { + memcpy(&pad, buf + buflen - slop, slop); + iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr); } + buflen += 4 - slop; } } else - ata_data_xfer(adev, buf, buflen, write_data); + buflen = ata_sff_data_xfer(dev, buf, buflen, rw); + + return buflen; } static struct scsi_host_template qdi_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_PIO_SHT(DRV_NAME), }; static struct ata_port_operations qdi6500_port_ops = { - .set_piomode = qdi6500_set_piomode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, + .inherits = &ata_sff_port_ops, + .qc_issue = qdi_qc_issue, + .sff_data_xfer = qdi_data_xfer, .cable_detect = ata_cable_40wire, - - .qc_prep = ata_qc_prep, - .qc_issue = qdi_qc_issue_prot, - - .data_xfer = qdi_data_xfer, - - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .set_piomode = qdi6500_set_piomode, }; static struct ata_port_operations qdi6580_port_ops = { + .inherits = &qdi6500_port_ops, .set_piomode = qdi6580_set_piomode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .qc_prep = ata_qc_prep, - .qc_issue = qdi_qc_issue_prot, - - .data_xfer = qdi_data_xfer, - - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; /** @@ -274,7 +223,7 @@ static __init int qdi_init_one(unsigned long port, int type, unsigned long io, i ap->ioaddr.cmd_addr = io_addr; ap->ioaddr.altstatus_addr = ctl_addr; ap->ioaddr.ctl_addr = ctl_addr; - ata_std_ports(&ap->ioaddr); + ata_sff_std_ports(&ap->ioaddr); ata_port_desc(ap, "cmd %lx ctl %lx", io, ctl); @@ -290,7 +239,7 @@ static __init int qdi_init_one(unsigned long port, int type, unsigned long io, i printk(KERN_INFO DRV_NAME": qd%d at 0x%lx.\n", type, io); /* activate */ - ret = ata_host_activate(host, irq, ata_interrupt, 0, &qdi_sht); + ret = ata_host_activate(host, irq, ata_sff_interrupt, 0, &qdi_sht); if (ret) goto fail; diff --git a/drivers/ata/pata_radisys.c b/drivers/ata/pata_radisys.c index 8109b08..1c0d9fa 100644 --- a/drivers/ata/pata_radisys.c +++ b/drivers/ata/pata_radisys.c @@ -156,7 +156,7 @@ static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev) } /** - * radisys_qc_issue_prot - command issue + * radisys_qc_issue - command issue * @qc: command pending * * Called when the libata layer is about to issue a command. We wrap @@ -166,7 +166,7 @@ static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev) * be made PIO0. */ -static unsigned int radisys_qc_issue_prot(struct ata_queued_cmd *qc) +static unsigned int radisys_qc_issue(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct ata_device *adev = qc->dev; @@ -180,58 +180,20 @@ static unsigned int radisys_qc_issue_prot(struct ata_queued_cmd *qc) radisys_set_piomode(ap, adev); } } - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } static struct scsi_host_template radisys_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations radisys_pata_ops = { +static struct ata_port_operations radisys_pata_ops = { + .inherits = &ata_bmdma_port_ops, + .qc_issue = radisys_qc_issue, + .cable_detect = ata_cable_unknown, .set_piomode = radisys_set_piomode, .set_dmamode = radisys_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_unknown, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = radisys_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; @@ -254,7 +216,6 @@ static int radisys_init_one (struct pci_dev *pdev, const struct pci_device_id *e { static int printed_version; static const struct ata_port_info info = { - .sht = &radisys_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma1-2 */ @@ -267,7 +228,7 @@ static int radisys_init_one (struct pci_dev *pdev, const struct pci_device_id *e dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &radisys_sht, NULL); } static const struct pci_device_id radisys_pci_tbl[] = { diff --git a/drivers/ata/pata_rb532_cf.c b/drivers/ata/pata_rb532_cf.c new file mode 100644 index 0000000..f8b3ffc --- /dev/null +++ b/drivers/ata/pata_rb532_cf.c @@ -0,0 +1,279 @@ +/* + * A low-level PATA driver to handle a Compact Flash connected on the + * Mikrotik's RouterBoard 532 board. + * + * Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org> + * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org> + * + * This file was based on: drivers/ata/pata_ixp4xx_cf.c + * Copyright (C) 2006-07 Tower Technologies + * Author: Alessandro Zummo <a.zummo@towertech.it> + * + * Also was based on the driver for Linux 2.4.xx published by Mikrotik for + * their RouterBoard 1xx and 5xx series devices. The original Mikrotik code + * seems not to have a license. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/platform_device.h> + +#include <linux/io.h> +#include <linux/interrupt.h> +#include <linux/irq.h> + +#include <linux/libata.h> +#include <scsi/scsi_host.h> + +#include <asm/gpio.h> + +#define DRV_NAME "pata-rb532-cf" +#define DRV_VERSION "0.1.0" +#define DRV_DESC "PATA driver for RouterBOARD 532 Compact Flash" + +#define RB500_CF_MAXPORTS 1 +#define RB500_CF_IO_DELAY 400 + +#define RB500_CF_REG_CMD 0x0800 +#define RB500_CF_REG_CTRL 0x080E +#define RB500_CF_REG_DATA 0x0C00 + +struct rb532_cf_info { + void __iomem *iobase; + unsigned int gpio_line; + int frozen; + unsigned int irq; +}; + +/* ------------------------------------------------------------------------ */ + +static inline void rb532_pata_finish_io(struct ata_port *ap) +{ + struct ata_host *ah = ap->host; + struct rb532_cf_info *info = ah->private_data; + + /* FIXME: Keep previous delay. If this is merely a fence then + ata_sff_sync might be sufficient. */ + ata_sff_dma_pause(ap); + ndelay(RB500_CF_IO_DELAY); + + set_irq_type(info->irq, IRQ_TYPE_LEVEL_HIGH); +} + +static void rb532_pata_exec_command(struct ata_port *ap, + const struct ata_taskfile *tf) +{ + writeb(tf->command, ap->ioaddr.command_addr); + rb532_pata_finish_io(ap); +} + +static void rb532_pata_data_xfer(struct ata_device *adev, unsigned char *buf, + unsigned int buflen, int write_data) +{ + struct ata_port *ap = adev->link->ap; + void __iomem *ioaddr = ap->ioaddr.data_addr; + + if (write_data) { + for (; buflen > 0; buflen--, buf++) + writeb(*buf, ioaddr); + } else { + for (; buflen > 0; buflen--, buf++) + *buf = readb(ioaddr); + } + + rb532_pata_finish_io(adev->link->ap); +} + +static void rb532_pata_freeze(struct ata_port *ap) +{ + struct rb532_cf_info *info = ap->host->private_data; + + info->frozen = 1; +} + +static void rb532_pata_thaw(struct ata_port *ap) +{ + struct rb532_cf_info *info = ap->host->private_data; + + info->frozen = 0; +} + +static irqreturn_t rb532_pata_irq_handler(int irq, void *dev_instance) +{ + struct ata_host *ah = dev_instance; + struct rb532_cf_info *info = ah->private_data; + + if (gpio_get_value(info->gpio_line)) { + set_irq_type(info->irq, IRQ_TYPE_LEVEL_LOW); + if (!info->frozen) + ata_sff_interrupt(info->irq, dev_instance); + } else { + set_irq_type(info->irq, IRQ_TYPE_LEVEL_HIGH); + } + + return IRQ_HANDLED; +} + +static struct ata_port_operations rb532_pata_port_ops = { + .inherits = &ata_sff_port_ops, + .sff_exec_command = rb532_pata_exec_command, + .sff_data_xfer = rb532_pata_data_xfer, + .freeze = rb532_pata_freeze, + .thaw = rb532_pata_thaw, +}; + +/* ------------------------------------------------------------------------ */ + +static struct scsi_host_template rb532_pata_sht = { + ATA_PIO_SHT(DRV_NAME), +}; + +/* ------------------------------------------------------------------------ */ + +static void rb532_pata_setup_ports(struct ata_host *ah) +{ + struct rb532_cf_info *info = ah->private_data; + struct ata_port *ap; + + ap = ah->ports[0]; + + ap->ops = &rb532_pata_port_ops; + ap->pio_mask = 0x1f; /* PIO4 */ + ap->flags = ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO; + + ap->ioaddr.cmd_addr = info->iobase + RB500_CF_REG_CMD; + ap->ioaddr.ctl_addr = info->iobase + RB500_CF_REG_CTRL; + ap->ioaddr.altstatus_addr = info->iobase + RB500_CF_REG_CTRL; + + ata_sff_std_ports(&ap->ioaddr); + + ap->ioaddr.data_addr = info->iobase + RB500_CF_REG_DATA; +} + +static __devinit int rb532_pata_driver_probe(struct platform_device *pdev) +{ + unsigned int irq; + int gpio; + struct resource *res; + struct ata_host *ah; + struct rb532_cf_info *info; + int ret; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "no IOMEM resource found\n"); + return -EINVAL; + } + + irq = platform_get_irq(pdev, 0); + if (irq <= 0) { + dev_err(&pdev->dev, "no IRQ resource found\n"); + return -ENOENT; + } + + gpio = irq_to_gpio(irq); + if (gpio < 0) { + dev_err(&pdev->dev, "no GPIO found for irq%d\n", irq); + return -ENOENT; + } + + ret = gpio_request(gpio, DRV_NAME); + if (ret) { + dev_err(&pdev->dev, "GPIO request failed\n"); + return ret; + } + + /* allocate host */ + ah = ata_host_alloc(&pdev->dev, RB500_CF_MAXPORTS); + if (!ah) + return -ENOMEM; + + platform_set_drvdata(pdev, ah); + + info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; + + ah->private_data = info; + info->gpio_line = gpio; + info->irq = irq; + + info->iobase = devm_ioremap_nocache(&pdev->dev, res->start, + res->end - res->start + 1); + if (!info->iobase) + return -ENOMEM; + + ret = gpio_direction_input(gpio); + if (ret) { + dev_err(&pdev->dev, "unable to set GPIO direction, err=%d\n", + ret); + goto err_free_gpio; + } + + rb532_pata_setup_ports(ah); + + ret = ata_host_activate(ah, irq, rb532_pata_irq_handler, + IRQF_TRIGGER_LOW, &rb532_pata_sht); + if (ret) + goto err_free_gpio; + + return 0; + +err_free_gpio: + gpio_free(gpio); + + return ret; +} + +static __devexit int rb532_pata_driver_remove(struct platform_device *pdev) +{ + struct ata_host *ah = platform_get_drvdata(pdev); + struct rb532_cf_info *info = ah->private_data; + + ata_host_detach(ah); + gpio_free(info->gpio_line); + + return 0; +} + +/* work with hotplug and coldplug */ +MODULE_ALIAS("platform:" DRV_NAME); + +static struct platform_driver rb532_pata_platform_driver = { + .probe = rb532_pata_driver_probe, + .remove = __devexit_p(rb532_pata_driver_remove), + .driver = { + .name = DRV_NAME, + .owner = THIS_MODULE, + }, +}; + +/* ------------------------------------------------------------------------ */ + +#define DRV_INFO DRV_DESC " version " DRV_VERSION + +static int __init rb532_pata_module_init(void) +{ + printk(KERN_INFO DRV_INFO "\n"); + + return platform_driver_register(&rb532_pata_platform_driver); +} + +static void __exit rb532_pata_module_exit(void) +{ + platform_driver_unregister(&rb532_pata_platform_driver); +} + +MODULE_AUTHOR("Gabor Juhos <juhosg at openwrt.org>"); +MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>"); +MODULE_DESCRIPTION(DRV_DESC); +MODULE_VERSION(DRV_VERSION); +MODULE_LICENSE("GPL"); + +module_init(rb532_pata_module_init); +module_exit(rb532_pata_module_exit); diff --git a/drivers/ata/pata_rz1000.c b/drivers/ata/pata_rz1000.c index ba8a31c..7dfd1f3 100644 --- a/drivers/ata/pata_rz1000.c +++ b/drivers/ata/pata_rz1000.c @@ -53,53 +53,13 @@ static int rz1000_set_mode(struct ata_link *link, struct ata_device **unused) static struct scsi_host_template rz1000_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_PIO_SHT(DRV_NAME), }; static struct ata_port_operations rz1000_port_ops = { - .set_mode = rz1000_set_mode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, + .inherits = &ata_sff_port_ops, .cable_detect = ata_cable_40wire, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .set_mode = rz1000_set_mode, }; static int rz1000_fifo_disable(struct pci_dev *pdev) @@ -129,7 +89,6 @@ static int rz1000_init_one (struct pci_dev *pdev, const struct pci_device_id *en { static int printed_version; static const struct ata_port_info info = { - .sht = &rz1000_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .port_ops = &rz1000_port_ops @@ -140,7 +99,7 @@ static int rz1000_init_one (struct pci_dev *pdev, const struct pci_device_id *en printk(KERN_DEBUG DRV_NAME " version " DRV_VERSION "\n"); if (rz1000_fifo_disable(pdev) == 0) - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &rz1000_sht, NULL); printk(KERN_ERR DRV_NAME ": failed to disable read-ahead on chipset..\n"); /* Not safe to use so skip */ diff --git a/drivers/ata/pata_sc1200.c b/drivers/ata/pata_sc1200.c index 725a858..cbab397 100644 --- a/drivers/ata/pata_sc1200.c +++ b/drivers/ata/pata_sc1200.c @@ -151,7 +151,7 @@ static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev) } /** - * sc1200_qc_issue_prot - command issue + * sc1200_qc_issue - command issue * @qc: command pending * * Called when the libata layer is about to issue a command. We wrap @@ -160,7 +160,7 @@ static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev) * one MWDMA/UDMA bit. */ -static unsigned int sc1200_qc_issue_prot(struct ata_queued_cmd *qc) +static unsigned int sc1200_qc_issue(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct ata_device *adev = qc->dev; @@ -175,59 +175,21 @@ static unsigned int sc1200_qc_issue_prot(struct ata_queued_cmd *qc) sc1200_set_dmamode(ap, adev); } - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } static struct scsi_host_template sc1200_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_DUMB_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), + .sg_tablesize = LIBATA_DUMB_MAX_PRD, }; static struct ata_port_operations sc1200_port_ops = { + .inherits = &ata_bmdma_port_ops, + .qc_prep = ata_sff_dumb_qc_prep, + .qc_issue = sc1200_qc_issue, + .cable_detect = ata_cable_40wire, .set_piomode = sc1200_set_piomode, .set_dmamode = sc1200_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_dumb_qc_prep, - .qc_issue = sc1200_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; /** @@ -242,7 +204,6 @@ static struct ata_port_operations sc1200_port_ops = { static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id) { static const struct ata_port_info info = { - .sht = &sc1200_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -252,7 +213,7 @@ static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id) /* Can't enable port 2 yet, see top comments */ const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info }; - return ata_pci_init_one(dev, ppi); + return ata_pci_sff_init_one(dev, ppi, &sc1200_sht, NULL); } static const struct pci_device_id sc1200[] = { diff --git a/drivers/ata/pata_scc.c b/drivers/ata/pata_scc.c index ea2ef9f..bbf5aa3 100644 --- a/drivers/ata/pata_scc.c +++ b/drivers/ata/pata_scc.c @@ -266,7 +266,7 @@ unsigned long scc_mode_filter(struct ata_device *adev, unsigned long mask) printk(KERN_INFO "%s: limit ATAPI UDMA to UDMA4\n", DRV_NAME); mask &= ~(0xE0 << ATA_SHIFT_UDMA); } - return ata_pci_default_filter(adev, mask); + return ata_bmdma_mode_filter(adev, mask); } /** @@ -274,7 +274,7 @@ unsigned long scc_mode_filter(struct ata_device *adev, unsigned long mask) * @ap: Port to which output is sent * @tf: ATA taskfile register set * - * Note: Original code is ata_tf_load(). + * Note: Original code is ata_sff_tf_load(). */ static void scc_tf_load (struct ata_port *ap, const struct ata_taskfile *tf) @@ -341,7 +341,7 @@ static u8 scc_check_status (struct ata_port *ap) * @ap: Port from which input is read * @tf: ATA taskfile register set for storing input * - * Note: Original code is ata_tf_read(). + * Note: Original code is ata_sff_tf_read(). */ static void scc_tf_read (struct ata_port *ap, struct ata_taskfile *tf) @@ -373,7 +373,7 @@ static void scc_tf_read (struct ata_port *ap, struct ata_taskfile *tf) * @ap: port to which command is being issued * @tf: ATA taskfile register set * - * Note: Original code is ata_exec_command(). + * Note: Original code is ata_sff_exec_command(). */ static void scc_exec_command (struct ata_port *ap, @@ -382,7 +382,7 @@ static void scc_exec_command (struct ata_port *ap, DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command); out_be32(ap->ioaddr.command_addr, tf->command); - ata_pause(ap); + ata_sff_pause(ap); } /** @@ -396,14 +396,14 @@ static u8 scc_check_altstatus (struct ata_port *ap) } /** - * scc_std_dev_select - Select device 0/1 on ATA bus + * scc_dev_select - Select device 0/1 on ATA bus * @ap: ATA channel to manipulate * @device: ATA device (numbered from zero) to select * - * Note: Original code is ata_std_dev_select(). + * Note: Original code is ata_sff_dev_select(). */ -static void scc_std_dev_select (struct ata_port *ap, unsigned int device) +static void scc_dev_select (struct ata_port *ap, unsigned int device) { u8 tmp; @@ -413,7 +413,7 @@ static void scc_std_dev_select (struct ata_port *ap, unsigned int device) tmp = ATA_DEVICE_OBS | ATA_DEV1; out_be32(ap->ioaddr.device_addr, tmp); - ata_pause(ap); + ata_sff_pause(ap); } /** @@ -441,7 +441,7 @@ static void scc_bmdma_setup (struct ata_queued_cmd *qc) out_be32(mmio + SCC_DMA_CMD, dmactl); /* issue r/w command */ - ap->ops->exec_command(ap, &qc->tf); + ap->ops->sff_exec_command(ap, &qc->tf); } /** @@ -476,7 +476,7 @@ static unsigned int scc_devchk (struct ata_port *ap, struct ata_ioports *ioaddr = &ap->ioaddr; u8 nsect, lbal; - ap->ops->dev_select(ap, device); + ap->ops->sff_dev_select(ap, device); out_be32(ioaddr->nsect_addr, 0x55); out_be32(ioaddr->lbal_addr, 0xaa); @@ -497,57 +497,78 @@ static unsigned int scc_devchk (struct ata_port *ap, } /** - * scc_bus_post_reset - PATA device post reset + * scc_wait_after_reset - wait for devices to become ready after reset * - * Note: Original code is ata_bus_post_reset(). + * Note: Original code is ata_sff_wait_after_reset */ -static int scc_bus_post_reset(struct ata_port *ap, unsigned int devmask, - unsigned long deadline) +int scc_wait_after_reset(struct ata_link *link, unsigned int devmask, + unsigned long deadline) { + struct ata_port *ap = link->ap; struct ata_ioports *ioaddr = &ap->ioaddr; unsigned int dev0 = devmask & (1 << 0); unsigned int dev1 = devmask & (1 << 1); - int rc; - - /* if device 0 was found in ata_devchk, wait for its - * BSY bit to clear + int rc, ret = 0; + + /* Spec mandates ">= 2ms" before checking status. We wait + * 150ms, because that was the magic delay used for ATAPI + * devices in Hale Landis's ATADRVR, for the period of time + * between when the ATA command register is written, and then + * status is checked. Because waiting for "a while" before + * checking status is fine, post SRST, we perform this magic + * delay here as well. + * + * Old drivers/ide uses the 2mS rule and then waits for ready. */ - if (dev0) { - rc = ata_wait_ready(ap, deadline); - if (rc && rc != -ENODEV) - return rc; - } + msleep(150); - /* if device 1 was found in ata_devchk, wait for - * register access, then wait for BSY to clear + /* always check readiness of the master device */ + rc = ata_sff_wait_ready(link, deadline); + /* -ENODEV means the odd clown forgot the D7 pulldown resistor + * and TF status is 0xff, bail out on it too. */ - while (dev1) { - u8 nsect, lbal; + if (rc) + return rc; - ap->ops->dev_select(ap, 1); - nsect = in_be32(ioaddr->nsect_addr); - lbal = in_be32(ioaddr->lbal_addr); - if ((nsect == 1) && (lbal == 1)) - break; - if (time_after(jiffies, deadline)) - return -EBUSY; - msleep(50); /* give drive a breather */ - } + /* if device 1 was found in ata_devchk, wait for register + * access briefly, then wait for BSY to clear. + */ if (dev1) { - rc = ata_wait_ready(ap, deadline); - if (rc && rc != -ENODEV) - return rc; + int i; + + ap->ops->sff_dev_select(ap, 1); + + /* Wait for register access. Some ATAPI devices fail + * to set nsect/lbal after reset, so don't waste too + * much time on it. We're gonna wait for !BSY anyway. + */ + for (i = 0; i < 2; i++) { + u8 nsect, lbal; + + nsect = in_be32(ioaddr->nsect_addr); + lbal = in_be32(ioaddr->lbal_addr); + if ((nsect == 1) && (lbal == 1)) + break; + msleep(50); /* give drive a breather */ + } + + rc = ata_sff_wait_ready(link, deadline); + if (rc) { + if (rc != -ENODEV) + return rc; + ret = rc; + } } /* is all this really necessary? */ - ap->ops->dev_select(ap, 0); + ap->ops->sff_dev_select(ap, 0); if (dev1) - ap->ops->dev_select(ap, 1); + ap->ops->sff_dev_select(ap, 1); if (dev0) - ap->ops->dev_select(ap, 0); + ap->ops->sff_dev_select(ap, 0); - return 0; + return ret; } /** @@ -570,32 +591,22 @@ static unsigned int scc_bus_softreset(struct ata_port *ap, unsigned int devmask, udelay(20); out_be32(ioaddr->ctl_addr, ap->ctl); - /* wait a while before checking status */ - ata_wait_after_reset(ap, deadline); - - /* Before we perform post reset processing we want to see if - * the bus shows 0xFF because the odd clown forgets the D7 - * pulldown resistor. - */ - if (scc_check_status(ap) == 0xFF) - return 0; - - scc_bus_post_reset(ap, devmask, deadline); + scc_wait_after_reset(&ap->link, devmask, deadline); return 0; } /** - * scc_std_softreset - reset host port via ATA SRST + * scc_softreset - reset host port via ATA SRST * @ap: port to reset * @classes: resulting classes of attached devices * @deadline: deadline jiffies for the operation * - * Note: Original code is ata_std_softreset(). + * Note: Original code is ata_sff_softreset(). */ -static int scc_std_softreset(struct ata_link *link, unsigned int *classes, - unsigned long deadline) +static int scc_softreset(struct ata_link *link, unsigned int *classes, + unsigned long deadline) { struct ata_port *ap = link->ap; unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; @@ -604,11 +615,6 @@ static int scc_std_softreset(struct ata_link *link, unsigned int *classes, DPRINTK("ENTER\n"); - if (ata_link_offline(link)) { - classes[0] = ATA_DEV_NONE; - goto out; - } - /* determine if device 0/1 are present */ if (scc_devchk(ap, 0)) devmask |= (1 << 0); @@ -616,7 +622,7 @@ static int scc_std_softreset(struct ata_link *link, unsigned int *classes, devmask |= (1 << 1); /* select device 0 again */ - ap->ops->dev_select(ap, 0); + ap->ops->sff_dev_select(ap, 0); /* issue bus reset */ DPRINTK("about to softreset, devmask=%x\n", devmask); @@ -628,13 +634,12 @@ static int scc_std_softreset(struct ata_link *link, unsigned int *classes, } /* determine by signature whether we have ATA or ATAPI devices */ - classes[0] = ata_dev_try_classify(&ap->link.device[0], + classes[0] = ata_sff_dev_classify(&ap->link.device[0], devmask & (1 << 0), &err); if (slave_possible && err != 0x81) - classes[1] = ata_dev_try_classify(&ap->link.device[1], + classes[1] = ata_sff_dev_classify(&ap->link.device[1], devmask & (1 << 1), &err); - out: DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); return 0; } @@ -695,7 +700,7 @@ static void scc_bmdma_stop (struct ata_queued_cmd *qc) printk(KERN_WARNING "%s: Internal Bus Error\n", DRV_NAME); out_be32(bmid_base + SCC_DMA_INTST, INTSTS_BMSINT); /* TBD: SW reset */ - scc_std_softreset(&ap->link, &classes, deadline); + scc_softreset(&ap->link, &classes, deadline); continue; } @@ -721,7 +726,7 @@ static void scc_bmdma_stop (struct ata_queued_cmd *qc) in_be32(bmid_base + SCC_DMA_CMD) & ~ATA_DMA_START); /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */ - ata_altstatus(ap); /* dummy read */ + ata_sff_dma_pause(ap); /* dummy read */ } /** @@ -742,7 +747,8 @@ static u8 scc_bmdma_status (struct ata_port *ap) return host_stat; /* errata A252,A308 workaround: Step4 */ - if ((ata_altstatus(ap) & ATA_ERR) && (int_status & INTSTS_INTRQ)) + if ((scc_check_altstatus(ap) & ATA_ERR) + && (int_status & INTSTS_INTRQ)) return (host_stat | ATA_DMA_INTR); /* errata A308 workaround Step5 */ @@ -768,52 +774,54 @@ static u8 scc_bmdma_status (struct ata_port *ap) /** * scc_data_xfer - Transfer data by PIO - * @adev: device for this I/O + * @dev: device for this I/O * @buf: data buffer * @buflen: buffer length - * @write_data: read/write + * @rw: read/write * - * Note: Original code is ata_data_xfer(). + * Note: Original code is ata_sff_data_xfer(). */ -static void scc_data_xfer (struct ata_device *adev, unsigned char *buf, - unsigned int buflen, int write_data) +static unsigned int scc_data_xfer (struct ata_device *dev, unsigned char *buf, + unsigned int buflen, int rw) { - struct ata_port *ap = adev->link->ap; + struct ata_port *ap = dev->link->ap; unsigned int words = buflen >> 1; unsigned int i; - u16 *buf16 = (u16 *) buf; + __le16 *buf16 = (__le16 *) buf; void __iomem *mmio = ap->ioaddr.data_addr; /* Transfer multiple of 2 bytes */ - if (write_data) { + if (rw == READ) for (i = 0; i < words; i++) - out_be32(mmio, cpu_to_le16(buf16[i])); - } else { + buf16[i] = cpu_to_le16(in_be32(mmio)); + else for (i = 0; i < words; i++) - buf16[i] = le16_to_cpu(in_be32(mmio)); - } + out_be32(mmio, le16_to_cpu(buf16[i])); /* Transfer trailing 1 byte, if any. */ if (unlikely(buflen & 0x01)) { - u16 align_buf[1] = { 0 }; + __le16 align_buf[1] = { 0 }; unsigned char *trailing_buf = buf + buflen - 1; - if (write_data) { - memcpy(align_buf, trailing_buf, 1); - out_be32(mmio, cpu_to_le16(align_buf[0])); - } else { - align_buf[0] = le16_to_cpu(in_be32(mmio)); + if (rw == READ) { + align_buf[0] = cpu_to_le16(in_be32(mmio)); memcpy(trailing_buf, align_buf, 1); + } else { + memcpy(align_buf, trailing_buf, 1); + out_be32(mmio, le16_to_cpu(align_buf[0])); } + words++; } + + return words << 1; } /** * scc_irq_on - Enable interrupts on a port. * @ap: Port on which interrupts are enabled. * - * Note: Original code is ata_irq_on(). + * Note: Original code is ata_sff_irq_on(). */ static u8 scc_irq_on (struct ata_port *ap) @@ -827,19 +835,19 @@ static u8 scc_irq_on (struct ata_port *ap) out_be32(ioaddr->ctl_addr, ap->ctl); tmp = ata_wait_idle(ap); - ap->ops->irq_clear(ap); + ap->ops->sff_irq_clear(ap); return tmp; } /** - * scc_bmdma_freeze - Freeze BMDMA controller port + * scc_freeze - Freeze BMDMA controller port * @ap: port to freeze * - * Note: Original code is ata_bmdma_freeze(). + * Note: Original code is ata_sff_freeze(). */ -static void scc_bmdma_freeze (struct ata_port *ap) +static void scc_freeze (struct ata_port *ap) { struct ata_ioports *ioaddr = &ap->ioaddr; @@ -852,9 +860,9 @@ static void scc_bmdma_freeze (struct ata_port *ap) * ATA_NIEN manipulation. Also, many controllers fail to mask * previously pending IRQ on ATA_NIEN assertion. Clear it. */ - ata_chk_status(ap); + ap->ops->sff_check_status(ap); - ap->ops->irq_clear(ap); + ap->ops->sff_irq_clear(ap); } /** @@ -866,18 +874,18 @@ static void scc_bmdma_freeze (struct ata_port *ap) static int scc_pata_prereset(struct ata_link *link, unsigned long deadline) { link->ap->cbl = ATA_CBL_PATA80; - return ata_std_prereset(link, deadline); + return ata_sff_prereset(link, deadline); } /** - * scc_std_postreset - standard postreset callback + * scc_postreset - standard postreset callback * @ap: the target ata_port * @classes: classes of attached devices * - * Note: Original code is ata_std_postreset(). + * Note: Original code is ata_sff_postreset(). */ -static void scc_std_postreset(struct ata_link *link, unsigned int *classes) +static void scc_postreset(struct ata_link *link, unsigned int *classes) { struct ata_port *ap = link->ap; @@ -885,9 +893,9 @@ static void scc_std_postreset(struct ata_link *link, unsigned int *classes) /* is double-select really necessary? */ if (classes[0] != ATA_DEV_NONE) - ap->ops->dev_select(ap, 1); + ap->ops->sff_dev_select(ap, 1); if (classes[1] != ATA_DEV_NONE) - ap->ops->dev_select(ap, 0); + ap->ops->sff_dev_select(ap, 0); /* bail out if no device is present */ if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { @@ -903,24 +911,13 @@ static void scc_std_postreset(struct ata_link *link, unsigned int *classes) } /** - * scc_error_handler - Stock error handler for BMDMA controller - * @ap: port to handle error for - */ - -static void scc_error_handler (struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, scc_pata_prereset, scc_std_softreset, NULL, - scc_std_postreset); -} - -/** - * scc_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt. + * scc_irq_clear - Clear PCI IDE BMDMA interrupt. * @ap: Port associated with this ATA transaction. * - * Note: Original code is ata_bmdma_irq_clear(). + * Note: Original code is ata_sff_irq_clear(). */ -static void scc_bmdma_irq_clear (struct ata_port *ap) +static void scc_irq_clear (struct ata_port *ap) { void __iomem *mmio = ap->ioaddr.bmdma_addr; @@ -966,50 +963,37 @@ static void scc_port_stop (struct ata_port *ap) } static struct scsi_host_template scc_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations scc_pata_ops = { +static struct ata_port_operations scc_pata_ops = { + .inherits = &ata_bmdma_port_ops, + .set_piomode = scc_set_piomode, .set_dmamode = scc_set_dmamode, .mode_filter = scc_mode_filter, - .tf_load = scc_tf_load, - .tf_read = scc_tf_read, - .exec_command = scc_exec_command, - .check_status = scc_check_status, - .check_altstatus = scc_check_altstatus, - .dev_select = scc_std_dev_select, + .sff_tf_load = scc_tf_load, + .sff_tf_read = scc_tf_read, + .sff_exec_command = scc_exec_command, + .sff_check_status = scc_check_status, + .sff_check_altstatus = scc_check_altstatus, + .sff_dev_select = scc_dev_select, .bmdma_setup = scc_bmdma_setup, .bmdma_start = scc_bmdma_start, .bmdma_stop = scc_bmdma_stop, .bmdma_status = scc_bmdma_status, - .data_xfer = scc_data_xfer, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, + .sff_data_xfer = scc_data_xfer, - .freeze = scc_bmdma_freeze, - .error_handler = scc_error_handler, + .freeze = scc_freeze, + .prereset = scc_pata_prereset, + .softreset = scc_softreset, + .postreset = scc_postreset, .post_internal_cmd = scc_bmdma_stop, - .irq_clear = scc_bmdma_irq_clear, - .irq_on = scc_irq_on, + .sff_irq_clear = scc_irq_clear, + .sff_irq_on = scc_irq_on, .port_start = scc_port_start, .port_stop = scc_port_stop, @@ -1162,8 +1146,8 @@ static int scc_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) if (rc) return rc; - return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED, - &scc_sht); + return ata_host_activate(host, pdev->irq, ata_sff_interrupt, + IRQF_SHARED, &scc_sht); } static struct pci_driver scc_pci_driver = { diff --git a/drivers/ata/pata_sch.c b/drivers/ata/pata_sch.c new file mode 100644 index 0000000..c8cc027 --- /dev/null +++ b/drivers/ata/pata_sch.c @@ -0,0 +1,206 @@ +/* + * pata_sch.c - Intel SCH PATA controllers + * + * Copyright (c) 2008 Alek Du <alek.du@intel.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License 2 as published + * by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +/* + * Supports: + * Intel SCH (AF82US15W, AF82US15L, AF82UL11L) chipsets -- see spec at: + * http://download.intel.com/design/chipsets/embedded/datashts/319537.pdf + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/pci.h> +#include <linux/init.h> +#include <linux/blkdev.h> +#include <linux/delay.h> +#include <linux/device.h> +#include <scsi/scsi_host.h> +#include <linux/libata.h> +#include <linux/dmi.h> + +#define DRV_NAME "pata_sch" +#define DRV_VERSION "0.2" + +/* see SCH datasheet page 351 */ +enum { + D0TIM = 0x80, /* Device 0 Timing Register */ + D1TIM = 0x84, /* Device 1 Timing Register */ + PM = 0x07, /* PIO Mode Bit Mask */ + MDM = (0x03 << 8), /* Multi-word DMA Mode Bit Mask */ + UDM = (0x07 << 16), /* Ultra DMA Mode Bit Mask */ + PPE = (1 << 30), /* Prefetch/Post Enable */ + USD = (1 << 31), /* Use Synchronous DMA */ +}; + +static int sch_init_one(struct pci_dev *pdev, + const struct pci_device_id *ent); +static void sch_set_piomode(struct ata_port *ap, struct ata_device *adev); +static void sch_set_dmamode(struct ata_port *ap, struct ata_device *adev); + +static const struct pci_device_id sch_pci_tbl[] = { + /* Intel SCH PATA Controller */ + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_SCH_IDE), 0 }, + { } /* terminate list */ +}; + +static struct pci_driver sch_pci_driver = { + .name = DRV_NAME, + .id_table = sch_pci_tbl, + .probe = sch_init_one, + .remove = ata_pci_remove_one, +#ifdef CONFIG_PM + .suspend = ata_pci_device_suspend, + .resume = ata_pci_device_resume, +#endif +}; + +static struct scsi_host_template sch_sht = { + ATA_BMDMA_SHT(DRV_NAME), +}; + +static struct ata_port_operations sch_pata_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = ata_cable_unknown, + .set_piomode = sch_set_piomode, + .set_dmamode = sch_set_dmamode, +}; + +static struct ata_port_info sch_port_info = { + .flags = 0, + .pio_mask = ATA_PIO4, /* pio0-4 */ + .mwdma_mask = ATA_MWDMA2, /* mwdma0-2 */ + .udma_mask = ATA_UDMA5, /* udma0-5 */ + .port_ops = &sch_pata_ops, +}; + +MODULE_AUTHOR("Alek Du <alek.du@intel.com>"); +MODULE_DESCRIPTION("SCSI low-level driver for Intel SCH PATA controllers"); +MODULE_LICENSE("GPL"); +MODULE_DEVICE_TABLE(pci, sch_pci_tbl); +MODULE_VERSION(DRV_VERSION); + +/** + * sch_set_piomode - Initialize host controller PATA PIO timings + * @ap: Port whose timings we are configuring + * @adev: ATA device + * + * Set PIO mode for device, in host controller PCI config space. + * + * LOCKING: + * None (inherited from caller). + */ + +static void sch_set_piomode(struct ata_port *ap, struct ata_device *adev) +{ + unsigned int pio = adev->pio_mode - XFER_PIO_0; + struct pci_dev *dev = to_pci_dev(ap->host->dev); + unsigned int port = adev->devno ? D1TIM : D0TIM; + unsigned int data; + + pci_read_config_dword(dev, port, &data); + /* see SCH datasheet page 351 */ + /* set PIO mode */ + data &= ~(PM | PPE); + data |= pio; + /* enable PPE for block device */ + if (adev->class == ATA_DEV_ATA) + data |= PPE; + pci_write_config_dword(dev, port, data); +} + +/** + * sch_set_dmamode - Initialize host controller PATA DMA timings + * @ap: Port whose timings we are configuring + * @adev: ATA device + * + * Set MW/UDMA mode for device, in host controller PCI config space. + * + * LOCKING: + * None (inherited from caller). + */ + +static void sch_set_dmamode(struct ata_port *ap, struct ata_device *adev) +{ + unsigned int dma_mode = adev->dma_mode; + struct pci_dev *dev = to_pci_dev(ap->host->dev); + unsigned int port = adev->devno ? D1TIM : D0TIM; + unsigned int data; + + pci_read_config_dword(dev, port, &data); + /* see SCH datasheet page 351 */ + if (dma_mode >= XFER_UDMA_0) { + /* enable Synchronous DMA mode */ + data |= USD; + data &= ~UDM; + data |= (dma_mode - XFER_UDMA_0) << 16; + } else { /* must be MWDMA mode, since we masked SWDMA already */ + data &= ~(USD | MDM); + data |= (dma_mode - XFER_MW_DMA_0) << 8; + } + pci_write_config_dword(dev, port, data); +} + +/** + * sch_init_one - Register SCH ATA PCI device with kernel services + * @pdev: PCI device to register + * @ent: Entry in sch_pci_tbl matching with @pdev + * + * LOCKING: + * Inherited from PCI layer (may sleep). + * + * RETURNS: + * Zero on success, or -ERRNO value. + */ + +static int __devinit sch_init_one(struct pci_dev *pdev, + const struct pci_device_id *ent) +{ + static int printed_version; + const struct ata_port_info *ppi[] = { &sch_port_info, NULL }; + struct ata_host *host; + int rc; + + if (!printed_version++) + dev_printk(KERN_DEBUG, &pdev->dev, + "version " DRV_VERSION "\n"); + + /* enable device and prepare host */ + rc = pcim_enable_device(pdev); + if (rc) + return rc; + rc = ata_pci_sff_prepare_host(pdev, ppi, &host); + if (rc) + return rc; + pci_set_master(pdev); + return ata_pci_sff_activate_host(host, ata_sff_interrupt, &sch_sht); +} + +static int __init sch_init(void) +{ + return pci_register_driver(&sch_pci_driver); +} + +static void __exit sch_exit(void) +{ + pci_unregister_driver(&sch_pci_driver); +} + +module_init(sch_init); +module_exit(sch_exit); diff --git a/drivers/ata/pata_serverworks.c b/drivers/ata/pata_serverworks.c index 04d794d..ffd26d0 100644 --- a/drivers/ata/pata_serverworks.c +++ b/drivers/ata/pata_serverworks.c @@ -41,7 +41,7 @@ #include <linux/libata.h> #define DRV_NAME "pata_serverworks" -#define DRV_VERSION "0.4.2" +#define DRV_VERSION "0.4.3" #define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */ #define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */ @@ -102,7 +102,7 @@ static int osb4_cable(struct ata_port *ap) { } /** - * csb4_cable - CSB5/6 cable detect + * csb_cable - CSB5/6 cable detect * @ap: ATA port to check * * Serverworks default arrangement is to use the drive side detection @@ -110,7 +110,7 @@ static int osb4_cable(struct ata_port *ap) { */ static int csb_cable(struct ata_port *ap) { - return ATA_CBL_PATA80; + return ATA_CBL_PATA_UNK; } struct sv_cable_table { @@ -199,7 +199,7 @@ static unsigned long serverworks_osb4_filter(struct ata_device *adev, unsigned l { if (adev->class == ATA_DEV_ATA) mask &= ~ATA_MASK_UDMA; - return ata_pci_default_filter(adev, mask); + return ata_bmdma_mode_filter(adev, mask); } @@ -219,19 +219,18 @@ static unsigned long serverworks_csb_filter(struct ata_device *adev, unsigned lo /* Disk, UDMA */ if (adev->class != ATA_DEV_ATA) - return ata_pci_default_filter(adev, mask); + return ata_bmdma_mode_filter(adev, mask); /* Actually do need to check */ ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); for (i = 0; (p = csb_bad_ata100[i]) != NULL; i++) { if (!strcmp(p, model_num)) - mask &= ~(0x1F << ATA_SHIFT_UDMA); + mask &= ~(0xE0 << ATA_SHIFT_UDMA); } - return ata_pci_default_filter(adev, mask); + return ata_bmdma_mode_filter(adev, mask); } - /** * serverworks_set_piomode - set initial PIO mode data * @ap: ATA interface @@ -243,7 +242,7 @@ static unsigned long serverworks_csb_filter(struct ata_device *adev, unsigned lo static void serverworks_set_piomode(struct ata_port *ap, struct ata_device *adev) { static const u8 pio_mode[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 }; - int offset = 1 + (2 * ap->port_no) - adev->devno; + int offset = 1 + 2 * ap->port_no - adev->devno; int devbits = (2 * ap->port_no + adev->devno) * 4; u16 csb5_pio; struct pci_dev *pdev = to_pci_dev(ap->host->dev); @@ -299,89 +298,20 @@ static void serverworks_set_dmamode(struct ata_port *ap, struct ata_device *adev } static struct scsi_host_template serverworks_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct ata_port_operations serverworks_osb4_port_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = serverworks_cable_detect, + .mode_filter = serverworks_osb4_filter, .set_piomode = serverworks_set_piomode, .set_dmamode = serverworks_set_dmamode, - .mode_filter = serverworks_osb4_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = serverworks_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; static struct ata_port_operations serverworks_csb_port_ops = { - .set_piomode = serverworks_set_piomode, - .set_dmamode = serverworks_set_dmamode, + .inherits = &serverworks_osb4_port_ops, .mode_filter = serverworks_csb_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = serverworks_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; static int serverworks_fixup_osb4(struct pci_dev *pdev) @@ -406,7 +336,6 @@ static int serverworks_fixup_osb4(struct pci_dev *pdev) static int serverworks_fixup_csb(struct pci_dev *pdev) { u8 btr; - u8 pdev_revision; /* Third Channel Test */ if (!(PCI_FUNC(pdev->devfn) & 1)) { @@ -445,12 +374,11 @@ static int serverworks_fixup_csb(struct pci_dev *pdev) * 11 : udma2/udma4/udma5 */ pci_read_config_byte(pdev, 0x5A, &btr); - pci_read_config_byte(pdev, PCI_REVISION_ID, &pdev_revision); btr &= ~0x40; if (!(PCI_FUNC(pdev->devfn) & 1)) btr |= 0x2; else - btr |= (pdev_revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2; + btr |= (pdev->revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2; pci_write_config_byte(pdev, 0x5A, btr); return btr; @@ -471,28 +399,24 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id { static const struct ata_port_info info[4] = { { /* OSB4 */ - .sht = &serverworks_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, .udma_mask = 0x07, .port_ops = &serverworks_osb4_port_ops }, { /* OSB4 no UDMA */ - .sht = &serverworks_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, .udma_mask = 0x00, .port_ops = &serverworks_osb4_port_ops }, { /* CSB5 */ - .sht = &serverworks_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, .udma_mask = ATA_UDMA4, .port_ops = &serverworks_csb_port_ops }, { /* CSB5 - later revisions*/ - .sht = &serverworks_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -501,6 +425,11 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id } }; const struct ata_port_info *ppi[] = { &info[id->driver_data], NULL }; + int rc; + + rc = pcim_enable_device(pdev); + if (rc) + return rc; /* Force master latency timer to 64 PCI clocks */ pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40); @@ -530,24 +459,30 @@ static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id serverworks_fixup_ht1000(pdev); if (pdev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) - ata_pci_clear_simplex(pdev); + ata_pci_bmdma_clear_simplex(pdev); - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &serverworks_sht, NULL); } #ifdef CONFIG_PM static int serverworks_reinit_one(struct pci_dev *pdev) { + struct ata_host *host = dev_get_drvdata(&pdev->dev); + int rc; + + rc = ata_pci_device_do_resume(pdev); + if (rc) + return rc; + /* Force master latency timer to 64 PCI clocks */ pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40); - switch (pdev->device) - { + switch (pdev->device) { case PCI_DEVICE_ID_SERVERWORKS_OSB4IDE: serverworks_fixup_osb4(pdev); break; case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE: - ata_pci_clear_simplex(pdev); + ata_pci_bmdma_clear_simplex(pdev); /* fall through */ case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE: case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2: @@ -557,7 +492,9 @@ static int serverworks_reinit_one(struct pci_dev *pdev) serverworks_fixup_ht1000(pdev); break; } - return ata_pci_device_resume(pdev); + + ata_host_resume(host); + return 0; } #endif diff --git a/drivers/ata/pata_sil680.c b/drivers/ata/pata_sil680.c index 0229947..d8e4b2f 100644 --- a/drivers/ata/pata_sil680.c +++ b/drivers/ata/pata_sil680.c @@ -192,54 +192,14 @@ static void sil680_set_dmamode(struct ata_port *ap, struct ata_device *adev) } static struct scsi_host_template sil680_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct ata_port_operations sil680_port_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = sil680_cable_detect, .set_piomode = sil680_set_piomode, .set_dmamode = sil680_set_dmamode, - .mode_filter = ata_pci_default_filter, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = sil680_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; /** @@ -269,7 +229,11 @@ static u8 sil680_init_chip(struct pci_dev *pdev, int *try_mmio) dev_dbg(&pdev->dev, "sil680: BA5_EN = %d clock = %02X\n", tmpbyte & 1, tmpbyte & 0x30); - *try_mmio = (tmpbyte & 1) || pci_resource_start(pdev, 5); + *try_mmio = 0; +#ifdef CONFIG_PPC_MERGE + if (machine_is(cell)) + *try_mmio = (tmpbyte & 1) || pci_resource_start(pdev, 5); +#endif switch(tmpbyte & 0x30) { case 0x00: @@ -318,7 +282,6 @@ static int __devinit sil680_init_one(struct pci_dev *pdev, const struct pci_device_id *id) { static const struct ata_port_info info = { - .sht = &sil680_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -326,7 +289,6 @@ static int __devinit sil680_init_one(struct pci_dev *pdev, .port_ops = &sil680_port_ops }; static const struct ata_port_info info_slow = { - .sht = &sil680_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -346,27 +308,31 @@ static int __devinit sil680_init_one(struct pci_dev *pdev, NULL); if (drac == NULL) { - /* There are two common devices on DRACs. See if we can * - * find the second one if couldn't find the first. */ - printk(KERN_INFO "sil680: Trying SMIC device.\n"); - drac = pci_get_device(PCI_VENDOR_ID_DELL, 0x0014, NULL); + /* There are two common devices on DRACs. See if we can * + * find the second one if couldn't find the first. */ + printk(KERN_INFO "sil680: Trying SMIC device.\n"); + drac = pci_get_device(PCI_VENDOR_ID_DELL, 0x0014, NULL); } if (drac == NULL) - return -ENODEV; - + return -ENODEV; + if (drac->bus != pdev->bus) /* Not the right SIL680 */ { - pci_dev_put(drac); - return -ENODEV; + pci_dev_put(drac); + return -ENODEV; } pci_dev_put(drac); - /* Back to original code */ + /* Back to original code */ if (!printed_version++) dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); + rc = pcim_enable_device(pdev); + if (rc) + return rc; + switch (sil680_init_chip(pdev, &try_mmio)) { case 0: ppi[0] = &info_slow; @@ -409,28 +375,33 @@ static int __devinit sil680_init_one(struct pci_dev *pdev, host->ports[0]->ioaddr.cmd_addr = mmio_base + 0x80; host->ports[0]->ioaddr.ctl_addr = mmio_base + 0x8a; host->ports[0]->ioaddr.altstatus_addr = mmio_base + 0x8a; - ata_std_ports(&host->ports[0]->ioaddr); + ata_sff_std_ports(&host->ports[0]->ioaddr); host->ports[1]->ioaddr.bmdma_addr = mmio_base + 0x08; host->ports[1]->ioaddr.cmd_addr = mmio_base + 0xc0; host->ports[1]->ioaddr.ctl_addr = mmio_base + 0xca; host->ports[1]->ioaddr.altstatus_addr = mmio_base + 0xca; - ata_std_ports(&host->ports[1]->ioaddr); + ata_sff_std_ports(&host->ports[1]->ioaddr); /* Register & activate */ - return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED, - &sil680_sht); + return ata_host_activate(host, pdev->irq, ata_sff_interrupt, + IRQF_SHARED, &sil680_sht); use_ioports: - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &sil680_sht, NULL); } #ifdef CONFIG_PM static int sil680_reinit_one(struct pci_dev *pdev) { - int try_mmio; + struct ata_host *host = dev_get_drvdata(&pdev->dev); + int try_mmio, rc; + rc = ata_pci_device_do_resume(pdev); + if (rc) + return rc; sil680_init_chip(pdev, &try_mmio); - return ata_pci_device_resume(pdev); + ata_host_resume(host); + return 0; } #endif diff --git a/drivers/ata/pata_sis.c b/drivers/ata/pata_sis.c index aff3889..e82c66e 100644 --- a/drivers/ata/pata_sis.c +++ b/drivers/ata/pata_sis.c @@ -156,24 +156,11 @@ static int sis_pre_reset(struct ata_link *link, unsigned long deadline) /* Clear the FIFO settings. We can't enable the FIFO until we know we are poking at a disk */ pci_write_config_byte(pdev, 0x4B, 0); - return ata_std_prereset(link, deadline); + return ata_sff_prereset(link, deadline); } /** - * sis_error_handler - Probe specified port on PATA host controller - * @ap: Port to probe - * - * LOCKING: - * None (inherited from caller). - */ - -static void sis_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, sis_pre_reset, ata_std_softreset, NULL, ata_std_postreset); -} - -/** * sis_set_fifo - Set RWP fifo bits for this device * @ap: Port * @adev: Device @@ -345,7 +332,7 @@ static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev) if (adev->dma_mode < XFER_UDMA_0) { /* bits 3-0 hold recovery timing bits 8-10 active timing and - the higer bits are dependant on the device */ + the higher bits are dependant on the device */ timing &= ~0x870F; timing |= mwdma_bits[speed]; } else { @@ -385,7 +372,7 @@ static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev) if (adev->dma_mode < XFER_UDMA_0) { /* bits 3-0 hold recovery timing bits 8-10 active timing and - the higer bits are dependant on the device, bit 15 udma */ + the higher bits are dependant on the device, bit 15 udma */ timing &= ~0x870F; timing |= mwdma_bits[speed]; } else { @@ -514,217 +501,57 @@ static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev) } static struct scsi_host_template sis_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations sis_133_ops = { +static struct ata_port_operations sis_133_for_sata_ops = { + .inherits = &ata_bmdma_port_ops, .set_piomode = sis_133_set_piomode, .set_dmamode = sis_133_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = sis_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, .cable_detect = sis_133_cable_detect, +}; - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, +static struct ata_port_operations sis_base_ops = { + .inherits = &ata_bmdma_port_ops, + .prereset = sis_pre_reset, }; -static const struct ata_port_operations sis_133_for_sata_ops = { +static struct ata_port_operations sis_133_ops = { + .inherits = &sis_base_ops, .set_piomode = sis_133_set_piomode, .set_dmamode = sis_133_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, .cable_detect = sis_133_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; -static const struct ata_port_operations sis_133_early_ops = { +static struct ata_port_operations sis_133_early_ops = { + .inherits = &sis_base_ops, .set_piomode = sis_100_set_piomode, .set_dmamode = sis_133_early_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = sis_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, .cable_detect = sis_66_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; -static const struct ata_port_operations sis_100_ops = { +static struct ata_port_operations sis_100_ops = { + .inherits = &sis_base_ops, .set_piomode = sis_100_set_piomode, .set_dmamode = sis_100_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = sis_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, .cable_detect = sis_66_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; -static const struct ata_port_operations sis_66_ops = { +static struct ata_port_operations sis_66_ops = { + .inherits = &sis_base_ops, .set_piomode = sis_old_set_piomode, .set_dmamode = sis_66_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, .cable_detect = sis_66_cable_detect, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = sis_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; -static const struct ata_port_operations sis_old_ops = { +static struct ata_port_operations sis_old_ops = { + .inherits = &sis_base_ops, .set_piomode = sis_old_set_piomode, .set_dmamode = sis_old_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = sis_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, }; static const struct ata_port_info sis_info = { - .sht = &sis_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, @@ -732,7 +559,6 @@ static const struct ata_port_info sis_info = { .port_ops = &sis_old_ops, }; static const struct ata_port_info sis_info33 = { - .sht = &sis_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, @@ -740,42 +566,36 @@ static const struct ata_port_info sis_info33 = { .port_ops = &sis_old_ops, }; static const struct ata_port_info sis_info66 = { - .sht = &sis_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .udma_mask = ATA_UDMA4, /* UDMA 66 */ .port_ops = &sis_66_ops, }; static const struct ata_port_info sis_info100 = { - .sht = &sis_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .udma_mask = ATA_UDMA5, .port_ops = &sis_100_ops, }; static const struct ata_port_info sis_info100_early = { - .sht = &sis_sht, .flags = ATA_FLAG_SLAVE_POSS, .udma_mask = ATA_UDMA5, .pio_mask = 0x1f, /* pio0-4 */ .port_ops = &sis_66_ops, }; static const struct ata_port_info sis_info133 = { - .sht = &sis_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .udma_mask = ATA_UDMA6, .port_ops = &sis_133_ops, }; const struct ata_port_info sis_info133_for_sata = { - .sht = &sis_sht, .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, .pio_mask = 0x1f, /* pio0-4 */ .udma_mask = ATA_UDMA6, .port_ops = &sis_133_for_sata_ops, }; static const struct ata_port_info sis_info133_early = { - .sht = &sis_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, /* pio0-4 */ .udma_mask = ATA_UDMA6, @@ -857,12 +677,11 @@ static void sis_fixup(struct pci_dev *pdev, struct sis_chipset *sis) static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) { static int printed_version; - struct ata_port_info port; - const struct ata_port_info *ppi[] = { &port, NULL }; + const struct ata_port_info *ppi[] = { NULL, NULL }; struct pci_dev *host = NULL; struct sis_chipset *chipset = NULL; struct sis_chipset *sets; - u8 revision; + int rc; static struct sis_chipset sis_chipsets[] = { @@ -915,15 +734,17 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); - /* We have to find the bridge first */ + rc = pcim_enable_device(pdev); + if (rc) + return rc; + /* We have to find the bridge first */ for (sets = &sis_chipsets[0]; sets->device; sets++) { host = pci_get_device(PCI_VENDOR_ID_SI, sets->device, NULL); if (host != NULL) { - pci_read_config_byte(pdev, PCI_REVISION_ID, &revision); chipset = sets; /* Match found */ if (sets->device == 0x630) { /* SIS630 */ - if (revision >= 0x30) /* 630 ET */ + if (host->revision >= 0x30) /* 630 ET */ chipset = &sis100_early; } break; @@ -980,10 +801,9 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) if (lpc_bridge == NULL) break; pci_read_config_byte(pdev, 0x49, &prefctl); - pci_read_config_byte(lpc_bridge, PCI_REVISION_ID, &revision); pci_dev_put(lpc_bridge); - if (revision == 0x10 && (prefctl & 0x80)) { + if (lpc_bridge->revision == 0x10 && (prefctl & 0x80)) { chipset = &sis133_early; break; } @@ -997,12 +817,11 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) if (chipset == NULL) return -ENODEV; - port = *chipset->info; - port.private_data = chipset; + ppi[0] = chipset->info; sis_fixup(pdev, chipset); - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &sis_sht, chipset); } static const struct pci_device_id sis_pci_tbl[] = { diff --git a/drivers/ata/pata_sl82c105.c b/drivers/ata/pata_sl82c105.c index e2d458b..69877bd 100644 --- a/drivers/ata/pata_sl82c105.c +++ b/drivers/ata/pata_sl82c105.c @@ -26,7 +26,7 @@ #include <linux/libata.h> #define DRV_NAME "pata_sl82c105" -#define DRV_VERSION "0.3.2" +#define DRV_VERSION "0.3.3" enum { /* @@ -60,13 +60,7 @@ static int sl82c105_pre_reset(struct ata_link *link, unsigned long deadline) if (ap->port_no && !pci_test_config_bits(pdev, &sl82c105_enable_bits[ap->port_no])) return -ENOENT; - return ata_std_prereset(link, deadline); -} - - -static void sl82c105_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, sl82c105_pre_reset, ata_std_softreset, NULL, ata_std_postreset); + return ata_sff_prereset(link, deadline); } @@ -206,55 +200,46 @@ static void sl82c105_bmdma_stop(struct ata_queued_cmd *qc) sl82c105_set_piomode(ap, qc->dev); } +/** + * sl82c105_qc_defer - implement serialization + * @qc: command + * + * We must issue one command per host not per channel because + * of the reset bug. + * + * Q: is the scsi host lock sufficient ? + */ + +static int sl82c105_qc_defer(struct ata_queued_cmd *qc) +{ + struct ata_host *host = qc->ap->host; + struct ata_port *alt = host->ports[1 ^ qc->ap->port_no]; + int rc; + + /* First apply the usual rules */ + rc = ata_std_qc_defer(qc); + if (rc != 0) + return rc; + + /* Now apply serialization rules. Only allow a command if the + other channel state machine is idle */ + if (alt && alt->qc_active) + return ATA_DEFER_PORT; + return 0; +} + static struct scsi_host_template sl82c105_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct ata_port_operations sl82c105_port_ops = { - .set_piomode = sl82c105_set_piomode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = sl82c105_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, + .inherits = &ata_bmdma_port_ops, + .qc_defer = sl82c105_qc_defer, .bmdma_start = sl82c105_bmdma_start, .bmdma_stop = sl82c105_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .cable_detect = ata_cable_40wire, + .set_piomode = sl82c105_set_piomode, + .prereset = sl82c105_pre_reset, }; /** @@ -269,7 +254,6 @@ static struct ata_port_operations sl82c105_port_ops = { static int sl82c105_bridge_revision(struct pci_dev *pdev) { struct pci_dev *bridge; - u8 revision; /* * The bridge should be part of the same device, but function 0. @@ -292,31 +276,33 @@ static int sl82c105_bridge_revision(struct pci_dev *pdev) * We need to find function 0's revision, not function 1 */ pci_dev_put(bridge); - pci_read_config_byte(pdev, PCI_REVISION_ID, &revision); - return revision; + return bridge->revision; } static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id) { static const struct ata_port_info info_dma = { - .sht = &sl82c105_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, .port_ops = &sl82c105_port_ops }; static const struct ata_port_info info_early = { - .sht = &sl82c105_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .port_ops = &sl82c105_port_ops }; /* for now use only the first port */ const struct ata_port_info *ppi[] = { &info_early, - &ata_dummy_port_info }; + NULL }; u32 val; int rev; + int rc; + + rc = pcim_enable_device(dev); + if (rc) + return rc; rev = sl82c105_bridge_revision(dev); @@ -331,7 +317,7 @@ static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16; pci_write_config_dword(dev, 0x40, val); - return ata_pci_init_one(dev, ppi); + return ata_pci_sff_init_one(dev, ppi, &sl82c105_sht, NULL); } static const struct pci_device_id sl82c105[] = { diff --git a/drivers/ata/pata_triflex.c b/drivers/ata/pata_triflex.c index 403eafc..b181261 100644 --- a/drivers/ata/pata_triflex.c +++ b/drivers/ata/pata_triflex.c @@ -66,16 +66,11 @@ static int triflex_prereset(struct ata_link *link, unsigned long deadline) if (!pci_test_config_bits(pdev, &triflex_enable_bits[ap->port_no])) return -ENOENT; - return ata_std_prereset(link, deadline); + return ata_sff_prereset(link, deadline); } -static void triflex_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, triflex_prereset, ata_std_softreset, NULL, ata_std_postreset); -} - /** * triflex_load_timing - timing configuration * @ap: ATA interface @@ -180,60 +175,21 @@ static void triflex_bmdma_stop(struct ata_queued_cmd *qc) } static struct scsi_host_template triflex_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct ata_port_operations triflex_port_ops = { - .set_piomode = triflex_set_piomode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = triflex_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_40wire, - - .bmdma_setup = ata_bmdma_setup, + .inherits = &ata_bmdma_port_ops, .bmdma_start = triflex_bmdma_start, .bmdma_stop = triflex_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .cable_detect = ata_cable_40wire, + .set_piomode = triflex_set_piomode, + .prereset = triflex_prereset, }; static int triflex_init_one(struct pci_dev *dev, const struct pci_device_id *id) { static const struct ata_port_info info = { - .sht = &triflex_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -245,7 +201,7 @@ static int triflex_init_one(struct pci_dev *dev, const struct pci_device_id *id) if (!printed_version++) dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n"); - return ata_pci_init_one(dev, ppi); + return ata_pci_sff_init_one(dev, ppi, &triflex_sht, NULL); } static const struct pci_device_id triflex[] = { diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c index 325460d..708ed14 100644 --- a/drivers/ata/pata_via.c +++ b/drivers/ata/pata_via.c @@ -84,6 +84,7 @@ enum { VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */ VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */ VIA_NO_ENABLES = 0x400, /* Has no enablebits */ + VIA_SATA_PATA = 0x800, /* SATA/PATA combined configuration */ }; /* @@ -100,7 +101,7 @@ static const struct via_isa_bridge { { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, - { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, + { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA }, { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES}, { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, @@ -129,7 +130,7 @@ static const struct via_isa_bridge { * Cable special cases */ -static struct dmi_system_id cable_dmi_table[] = { +static const struct dmi_system_id cable_dmi_table[] = { { .ident = "Acer Ferrari 3400", .matches = { @@ -172,6 +173,9 @@ static int via_cable_detect(struct ata_port *ap) { if (via_cable_override(pdev)) return ATA_CBL_PATA40_SHORT; + if ((config->flags & VIA_SATA_PATA) && ap->port_no == 0) + return ATA_CBL_SATA; + /* Early chips are 40 wire */ if ((config->flags & VIA_UDMA) < VIA_UDMA_66) return ATA_CBL_PATA40; @@ -185,7 +189,8 @@ static int via_cable_detect(struct ata_port *ap) { if (ata66 & (0x10100000 >> (16 * ap->port_no))) return ATA_CBL_PATA80; /* Check with ACPI so we can spot BIOS reported SATA bridges */ - if (ata_acpi_cbl_80wire(ap)) + if (ata_acpi_init_gtm(ap) && + ata_acpi_cbl_80wire(ap, ata_acpi_init_gtm(ap))) return ATA_CBL_PATA80; return ATA_CBL_PATA40; } @@ -205,23 +210,11 @@ static int via_pre_reset(struct ata_link *link, unsigned long deadline) return -ENOENT; } - return ata_std_prereset(link, deadline); + return ata_sff_prereset(link, deadline); } /** - * via_error_handler - reset for VIA chips - * @ap: ATA port - * - * Handle the reset callback for the later chips with cable detect - */ - -static void via_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, via_pre_reset, ata_std_softreset, NULL, ata_std_postreset); -} - -/** * via_do_set_mode - set initial PIO mode data * @ap: ATA interface * @adev: ATA device @@ -266,15 +259,15 @@ static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mo pci_read_config_byte(pdev, 0x4C, &setup); setup &= ~(3 << shift); - setup |= FIT(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */ + setup |= clamp_val(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */ pci_write_config_byte(pdev, 0x4C, setup); } /* Load the PIO mode bits */ pci_write_config_byte(pdev, 0x4F - ap->port_no, - ((FIT(t.act8b, 1, 16) - 1) << 4) | (FIT(t.rec8b, 1, 16) - 1)); + ((clamp_val(t.act8b, 1, 16) - 1) << 4) | (clamp_val(t.rec8b, 1, 16) - 1)); pci_write_config_byte(pdev, 0x48 + offset, - ((FIT(t.active, 1, 16) - 1) << 4) | (FIT(t.recover, 1, 16) - 1)); + ((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1)); /* Load the UDMA bits according to type */ switch(udma_type) { @@ -282,16 +275,16 @@ static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mo /* BUG() ? */ /* fall through */ case 33: - ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 5) - 2)) : 0x03; + ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03; break; case 66: - ut = t.udma ? (0xe8 | (FIT(t.udma, 2, 9) - 2)) : 0x0f; + ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f; break; case 100: - ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07; + ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07; break; case 133: - ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07; + ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07; break; } @@ -330,89 +323,20 @@ static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev) } static struct scsi_host_template via_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct ata_port_operations via_port_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = via_cable_detect, .set_piomode = via_set_piomode, .set_dmamode = via_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = via_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = via_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .prereset = via_pre_reset, }; static struct ata_port_operations via_port_ops_noirq = { - .set_piomode = via_set_piomode, - .set_dmamode = via_set_dmamode, - .mode_filter = ata_pci_default_filter, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = via_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = via_cable_detect, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = ata_data_xfer_noirq, - - .irq_handler = ata_interrupt, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .inherits = &via_port_ops, + .sff_data_xfer = ata_sff_data_xfer_noirq, }; /** @@ -462,7 +386,6 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) { /* Early VIA without UDMA support */ static const struct ata_port_info via_mwdma_info = { - .sht = &via_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -470,7 +393,6 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) }; /* Ditto with IRQ masking required */ static const struct ata_port_info via_mwdma_info_borked = { - .sht = &via_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -478,7 +400,6 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) }; /* VIA UDMA 33 devices (and borked 66) */ static const struct ata_port_info via_udma33_info = { - .sht = &via_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -487,7 +408,6 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) }; /* VIA UDMA 66 devices */ static const struct ata_port_info via_udma66_info = { - .sht = &via_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -496,7 +416,6 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) }; /* VIA UDMA 100 devices */ static const struct ata_port_info via_udma100_info = { - .sht = &via_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, @@ -505,25 +424,27 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) }; /* UDMA133 with bad AST (All current 133) */ static const struct ata_port_info via_udma133_info = { - .sht = &via_sht, .flags = ATA_FLAG_SLAVE_POSS, .pio_mask = 0x1f, .mwdma_mask = 0x07, .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */ .port_ops = &via_port_ops }; - struct ata_port_info type; - const struct ata_port_info *ppi[] = { &type, NULL }; + const struct ata_port_info *ppi[] = { NULL, NULL }; struct pci_dev *isa = NULL; const struct via_isa_bridge *config; static int printed_version; u8 enable; u32 timing; - u8 isa_revision; + int rc; if (!printed_version++) dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); + rc = pcim_enable_device(pdev); + if (rc) + return rc; + /* To find out how the IDE will behave and what features we actually have to look at the bridge not the IDE controller */ for (config = via_isa_bridges; config->id; config++) @@ -531,9 +452,8 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) !!(config->flags & VIA_BAD_ID), config->id, NULL))) { - pci_read_config_byte(pdev, PCI_REVISION_ID, &isa_revision); - if (isa_revision >= config->rev_min && - isa_revision <= config->rev_max) + if (isa->revision >= config->rev_min && + isa->revision <= config->rev_max) break; pci_dev_put(isa); } @@ -544,11 +464,12 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) } pci_dev_put(isa); - /* 0x40 low bits indicate enabled channels */ - pci_read_config_byte(pdev, 0x40 , &enable); - enable &= 3; - if (enable == 0) { - return -ENODEV; + if (!(config->flags & VIA_NO_ENABLES)) { + /* 0x40 low bits indicate enabled channels */ + pci_read_config_byte(pdev, 0x40 , &enable); + enable &= 3; + if (enable == 0) + return -ENODEV; } /* Initialise the FIFO for the enabled channels. */ @@ -558,25 +479,25 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) switch(config->flags & VIA_UDMA) { case VIA_UDMA_NONE: if (config->flags & VIA_NO_UNMASK) - type = via_mwdma_info_borked; + ppi[0] = &via_mwdma_info_borked; else - type = via_mwdma_info; + ppi[0] = &via_mwdma_info; break; case VIA_UDMA_33: - type = via_udma33_info; + ppi[0] = &via_udma33_info; break; case VIA_UDMA_66: - type = via_udma66_info; + ppi[0] = &via_udma66_info; /* The 66 MHz devices require we enable the clock */ pci_read_config_dword(pdev, 0x50, &timing); timing |= 0x80008; pci_write_config_dword(pdev, 0x50, timing); break; case VIA_UDMA_100: - type = via_udma100_info; + ppi[0] = &via_udma100_info; break; case VIA_UDMA_133: - type = via_udma133_info; + ppi[0] = &via_udma133_info; break; default: WARN_ON(1); @@ -591,9 +512,7 @@ static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) } /* We have established the device type, now fire it up */ - type.private_data = (void *)config; - - return ata_pci_init_one(pdev, ppi); + return ata_pci_sff_init_one(pdev, ppi, &via_sht, (void *)config); } #ifdef CONFIG_PM @@ -612,6 +531,11 @@ static int via_reinit_one(struct pci_dev *pdev) u32 timing; struct ata_host *host = dev_get_drvdata(&pdev->dev); const struct via_isa_bridge *config = host->private_data; + int rc; + + rc = ata_pci_device_do_resume(pdev); + if (rc) + return rc; via_config_fifo(pdev, config->flags); @@ -627,7 +551,9 @@ static int via_reinit_one(struct pci_dev *pdev) timing &= ~0x80008; pci_write_config_dword(pdev, 0x50, timing); } - return ata_pci_device_resume(pdev); + + ata_host_resume(host); + return 0; } #endif diff --git a/drivers/ata/pata_winbond.c b/drivers/ata/pata_winbond.c index 311cdb3..474528f 100644 --- a/drivers/ata/pata_winbond.c +++ b/drivers/ata/pata_winbond.c @@ -75,8 +75,8 @@ static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev) else ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); - active = (FIT(t.active, 3, 17) - 1) & 0x0F; - recovery = (FIT(t.recover, 1, 15) + 1) & 0x0F; + active = (clamp_val(t.active, 3, 17) - 1) & 0x0F; + recovery = (clamp_val(t.recover, 1, 15) + 1) & 0x0F; timing = (active << 4) | recovery; winbond_writecfg(winbond->config, timing, reg); @@ -87,80 +87,49 @@ static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev) reg |= 0x08; /* FIFO off */ if (!ata_pio_need_iordy(adev)) reg |= 0x02; /* IORDY off */ - reg |= (FIT(t.setup, 0, 3) << 6); + reg |= (clamp_val(t.setup, 0, 3) << 6); winbond_writecfg(winbond->config, timing + 1, reg); } -static void winbond_data_xfer(struct ata_device *adev, unsigned char *buf, unsigned int buflen, int write_data) +static unsigned int winbond_data_xfer(struct ata_device *dev, + unsigned char *buf, unsigned int buflen, int rw) { - struct ata_port *ap = adev->link->ap; + struct ata_port *ap = dev->link->ap; int slop = buflen & 3; - if (ata_id_has_dword_io(adev->id)) { - if (write_data) - iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); - else + if (ata_id_has_dword_io(dev->id)) { + if (rw == READ) ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); + else + iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); if (unlikely(slop)) { u32 pad; - if (write_data) { - memcpy(&pad, buf + buflen - slop, slop); - pad = le32_to_cpu(pad); - iowrite32(pad, ap->ioaddr.data_addr); - } else { - pad = ioread32(ap->ioaddr.data_addr); - pad = cpu_to_le16(pad); + if (rw == READ) { + pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr)); memcpy(buf + buflen - slop, &pad, slop); + } else { + memcpy(&pad, buf + buflen - slop, slop); + iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr); } + buflen += 4 - slop; } } else - ata_data_xfer(adev, buf, buflen, write_data); + buflen = ata_sff_data_xfer(dev, buf, buflen, rw); + + return buflen; } static struct scsi_host_template winbond_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_PIO_SHT(DRV_NAME), }; static struct ata_port_operations winbond_port_ops = { - .set_piomode = winbond_set_piomode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, + .inherits = &ata_sff_port_ops, + .sff_data_xfer = winbond_data_xfer, .cable_detect = ata_cable_40wire, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - - .data_xfer = winbond_data_xfer, - - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_sff_port_start, + .set_piomode = winbond_set_piomode, }; /** @@ -193,7 +162,7 @@ static __init int winbond_init_one(unsigned long port) reg = winbond_readcfg(port, 0x81); if (!(reg & 0x03)) /* Disabled */ - return 0; + return -ENODEV; for (i = 0; i < 2 ; i ++) { unsigned long cmd_port = 0x1F0 - (0x80 * i); @@ -229,7 +198,7 @@ static __init int winbond_init_one(unsigned long port) ap->ioaddr.cmd_addr = cmd_addr; ap->ioaddr.altstatus_addr = ctl_addr; ap->ioaddr.ctl_addr = ctl_addr; - ata_std_ports(&ap->ioaddr); + ata_sff_std_ports(&ap->ioaddr); /* hook in a private data structure per channel */ host->private_data = &winbond_data[nr_winbond_host]; @@ -237,7 +206,7 @@ static __init int winbond_init_one(unsigned long port) winbond_data[nr_winbond_host].platform_dev = pdev; /* activate */ - rc = ata_host_activate(host, 14 + i, ata_interrupt, 0, + rc = ata_host_activate(host, 14 + i, ata_sff_interrupt, 0, &winbond_sht); if (rc) goto err_unregister; diff --git a/drivers/ata/pdc_adma.c b/drivers/ata/pdc_adma.c index 6b8032d..39c2dc1 100644 --- a/drivers/ata/pdc_adma.c +++ b/drivers/ata/pdc_adma.c @@ -131,56 +131,33 @@ struct adma_port_priv { static int adma_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); static int adma_port_start(struct ata_port *ap); -static void adma_host_stop(struct ata_host *host); static void adma_port_stop(struct ata_port *ap); static void adma_qc_prep(struct ata_queued_cmd *qc); static unsigned int adma_qc_issue(struct ata_queued_cmd *qc); static int adma_check_atapi_dma(struct ata_queued_cmd *qc); -static void adma_bmdma_stop(struct ata_queued_cmd *qc); -static u8 adma_bmdma_status(struct ata_port *ap); -static void adma_irq_clear(struct ata_port *ap); static void adma_freeze(struct ata_port *ap); static void adma_thaw(struct ata_port *ap); -static void adma_error_handler(struct ata_port *ap); +static int adma_prereset(struct ata_link *link, unsigned long deadline); static struct scsi_host_template adma_ata_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, - .proc_name = DRV_NAME, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, + ATA_BASE_SHT(DRV_NAME), .sg_tablesize = LIBATA_MAX_PRD, .dma_boundary = ADMA_DMA_BOUNDARY, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .use_clustering = ENABLE_CLUSTERING, - .emulated = ATA_SHT_EMULATED, }; -static const struct ata_port_operations adma_ata_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .exec_command = ata_exec_command, - .check_status = ata_check_status, - .dev_select = ata_std_dev_select, +static struct ata_port_operations adma_ata_ops = { + .inherits = &ata_sff_port_ops, + .check_atapi_dma = adma_check_atapi_dma, - .data_xfer = ata_data_xfer, .qc_prep = adma_qc_prep, .qc_issue = adma_qc_issue, + .freeze = adma_freeze, .thaw = adma_thaw, - .error_handler = adma_error_handler, - .irq_clear = adma_irq_clear, - .irq_on = ata_irq_on, + .prereset = adma_prereset, + .port_start = adma_port_start, .port_stop = adma_port_stop, - .host_stop = adma_host_stop, - .bmdma_stop = adma_bmdma_stop, - .bmdma_status = adma_bmdma_status, }; static struct ata_port_info adma_port_info[] = { @@ -213,21 +190,6 @@ static int adma_check_atapi_dma(struct ata_queued_cmd *qc) return 1; /* ATAPI DMA not yet supported */ } -static void adma_bmdma_stop(struct ata_queued_cmd *qc) -{ - /* nothing */ -} - -static u8 adma_bmdma_status(struct ata_port *ap) -{ - return 0; -} - -static void adma_irq_clear(struct ata_port *ap) -{ - /* nothing */ -} - static void adma_reset_engine(struct ata_port *ap) { void __iomem *chan = ADMA_PORT_REGS(ap); @@ -246,7 +208,7 @@ static void adma_reinit_engine(struct ata_port *ap) /* mask/clear ATA interrupts */ writeb(ATA_NIEN, ap->ioaddr.ctl_addr); - ata_check_status(ap); + ata_sff_check_status(ap); /* reset the ADMA engine */ adma_reset_engine(ap); @@ -281,7 +243,7 @@ static void adma_freeze(struct ata_port *ap) /* mask/clear ATA interrupts */ writeb(ATA_NIEN, ap->ioaddr.ctl_addr); - ata_check_status(ap); + ata_sff_check_status(ap); /* reset ADMA to idle state */ writew(aPIOMD4 | aNIEN | aRSTADM, chan + ADMA_CONTROL); @@ -304,13 +266,7 @@ static int adma_prereset(struct ata_link *link, unsigned long deadline) pp->state = adma_state_mmio; adma_reinit_engine(ap); - return ata_std_prereset(link, deadline); -} - -static void adma_error_handler(struct ata_port *ap) -{ - ata_do_eh(ap, adma_prereset, ata_std_softreset, NULL, - ata_std_postreset); + return ata_sff_prereset(link, deadline); } static int adma_fill_sg(struct ata_queued_cmd *qc) @@ -365,7 +321,7 @@ static void adma_qc_prep(struct ata_queued_cmd *qc) adma_enter_reg_mode(qc->ap); if (qc->tf.protocol != ATA_PROT_DMA) { - ata_qc_prep(qc); + ata_sff_qc_prep(qc); return; } @@ -455,7 +411,7 @@ static unsigned int adma_qc_issue(struct ata_queued_cmd *qc) adma_packet_start(qc); return 0; - case ATA_PROT_ATAPI_DMA: + case ATAPI_PROT_DMA: BUG(); break; @@ -464,7 +420,7 @@ static unsigned int adma_qc_issue(struct ata_queued_cmd *qc) } pp->state = adma_state_mmio; - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } static inline unsigned int adma_intr_pkt(struct ata_host *host) @@ -535,7 +491,7 @@ static inline unsigned int adma_intr_mmio(struct ata_host *host) if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING))) { /* check main status, clearing INTRQ */ - u8 status = ata_check_status(ap); + u8 status = ata_sff_check_status(ap); if ((status & ATA_BUSY)) continue; DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", @@ -565,7 +521,8 @@ static inline unsigned int adma_intr_mmio(struct ata_host *host) return handled; } -static irqreturn_t adma_intr(int irq, void *dev_instance, struct pt_regs *pt_regs) +static irqreturn_t adma_intr(int irq, void *dev_instance, + struct pt_regs *regs) { struct ata_host *host = dev_instance; unsigned int handled = 0; @@ -632,14 +589,6 @@ static void adma_port_stop(struct ata_port *ap) adma_reset_engine(ap); } -static void adma_host_stop(struct ata_host *host) -{ - unsigned int port_no; - - for (port_no = 0; port_no < ADMA_PORTS; ++port_no) - adma_reset_engine(host->ports[port_no]); -} - static void adma_host_init(struct ata_host *host, unsigned int chip_id) { unsigned int port_no; diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c index 91954fa..f879447 100644 --- a/drivers/ata/sata_fsl.c +++ b/drivers/ata/sata_fsl.c @@ -34,8 +34,7 @@ enum { SATA_FSL_HOST_FLAGS = (ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | - ATA_FLAG_NCQ), - SATA_FSL_HOST_LFLAGS = ATA_LFLAG_SKIP_D2H_BSY, + ATA_FLAG_PMP | ATA_FLAG_NCQ), SATA_FSL_MAX_CMDS = SATA_FSL_QUEUE_DEPTH, SATA_FSL_CMD_HDR_SIZE = 16, /* 4 DWORDS */ @@ -245,17 +244,6 @@ struct sata_fsl_port_priv { dma_addr_t cmdslot_paddr; struct command_desc *cmdentry; dma_addr_t cmdentry_paddr; - - /* - * SATA FSL controller has a Status FIS which should contain the - * received D2H FIS & taskfile registers. This SFIS is present in - * the command descriptor, and to have a ready reference to it, - * we are caching it here, quite similar to what is done in H/W on - * AHCI compliant devices by copying taskfile fields to a 32-bit - * register. - */ - - struct ata_taskfile tf; }; /* @@ -334,7 +322,7 @@ static unsigned int sata_fsl_fill_sg(struct ata_queued_cmd *qc, void *cmd_desc, unsigned indirect_ext_segment_sz = 0; dma_addr_t indirect_ext_segment_paddr; - VPRINTK("SATA FSL : cd = 0x%x, prd = 0x%x\n", cmd_desc, prd); + VPRINTK("SATA FSL : cd = 0x%p, prd = 0x%p\n", cmd_desc, prd); indirect_ext_segment_paddr = cmd_desc_paddr + SATA_FSL_CMD_DESC_OFFSET_TO_PRDT + SATA_FSL_MAX_PRD_DIRECT * 16; @@ -406,7 +394,7 @@ static void sata_fsl_qc_prep(struct ata_queued_cmd *qc) cd = (struct command_desc *)pp->cmdentry + tag; cd_paddr = pp->cmdentry_paddr + tag * SATA_FSL_CMD_DESC_SIZE; - ata_tf_to_fis(&qc->tf, 0, 1, (u8 *) &cd->cfis); + ata_tf_to_fis(&qc->tf, qc->dev->link->pmp, 1, (u8 *) &cd->cfis); VPRINTK("Dumping cfis : 0x%x, 0x%x, 0x%x\n", cd->cfis[0], cd->cfis[1], cd->cfis[2]); @@ -417,7 +405,7 @@ static void sata_fsl_qc_prep(struct ata_queued_cmd *qc) } /* setup "ACMD - atapi command" in cmd. desc. if this is ATAPI cmd */ - if (is_atapi_taskfile(&qc->tf)) { + if (ata_is_atapi(qc->tf.protocol)) { desc_info |= ATAPI_CMD; memset((void *)&cd->acmd, 0, 32); memcpy((void *)&cd->acmd, qc->cdb, qc->dev->cdb_len); @@ -449,6 +437,8 @@ static unsigned int sata_fsl_qc_issue(struct ata_queued_cmd *qc) ioread32(CA + hcr_base), ioread32(CE + hcr_base), ioread32(CC + hcr_base)); + iowrite32(qc->dev->link->pmp, CQPMP + hcr_base); + /* Simply queue command to the controller/device */ iowrite32(1 << tag, CQ + hcr_base); @@ -458,11 +448,26 @@ static unsigned int sata_fsl_qc_issue(struct ata_queued_cmd *qc) VPRINTK("CE=0x%x, DE=0x%x, CC=0x%x, CmdStat = 0x%x\n", ioread32(CE + hcr_base), ioread32(DE + hcr_base), - ioread32(CC + hcr_base), ioread32(COMMANDSTAT + csr_base)); + ioread32(CC + hcr_base), + ioread32(COMMANDSTAT + host_priv->csr_base)); return 0; } +static bool sata_fsl_qc_fill_rtf(struct ata_queued_cmd *qc) +{ + struct sata_fsl_port_priv *pp = qc->ap->private_data; + struct sata_fsl_host_priv *host_priv = qc->ap->host->private_data; + void __iomem *hcr_base = host_priv->hcr_base; + unsigned int tag = sata_fsl_tag(qc->tag, hcr_base); + struct command_desc *cd; + + cd = pp->cmdentry + tag; + + ata_tf_from_fis(cd->sfis, &qc->result_tf); + return true; +} + static int sata_fsl_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) { @@ -521,7 +526,8 @@ static void sata_fsl_freeze(struct ata_port *ap) ioread32(CQ + hcr_base), ioread32(CA + hcr_base), ioread32(CE + hcr_base), ioread32(DE + hcr_base)); - VPRINTK("CmdStat = 0x%x\n", ioread32(csr_base + COMMANDSTAT)); + VPRINTK("CmdStat = 0x%x\n", + ioread32(host_priv->csr_base + COMMANDSTAT)); /* disable interrupts on the controller/port */ temp = ioread32(hcr_base + HCONTROL); @@ -553,43 +559,36 @@ static void sata_fsl_thaw(struct ata_port *ap) ioread32(hcr_base + HCONTROL), ioread32(hcr_base + HSTATUS)); } -/* - * NOTE : 1st D2H FIS from device does not update sfis in command descriptor. - */ -static inline void sata_fsl_cache_taskfile_from_d2h_fis(struct ata_queued_cmd - *qc, - struct ata_port *ap) +static void sata_fsl_pmp_attach(struct ata_port *ap) { - struct sata_fsl_port_priv *pp = ap->private_data; struct sata_fsl_host_priv *host_priv = ap->host->private_data; void __iomem *hcr_base = host_priv->hcr_base; - unsigned int tag = sata_fsl_tag(qc->tag, hcr_base); - struct command_desc *cd; - - cd = pp->cmdentry + tag; + u32 temp; - ata_tf_from_fis(cd->sfis, &pp->tf); + temp = ioread32(hcr_base + HCONTROL); + iowrite32((temp | HCONTROL_PMP_ATTACHED), hcr_base + HCONTROL); } -static u8 sata_fsl_check_status(struct ata_port *ap) +static void sata_fsl_pmp_detach(struct ata_port *ap) { - struct sata_fsl_port_priv *pp = ap->private_data; + struct sata_fsl_host_priv *host_priv = ap->host->private_data; + void __iomem *hcr_base = host_priv->hcr_base; + u32 temp; - return pp->tf.command; -} + temp = ioread32(hcr_base + HCONTROL); + temp &= ~HCONTROL_PMP_ATTACHED; + iowrite32(temp, hcr_base + HCONTROL); -static void sata_fsl_tf_read(struct ata_port *ap, struct ata_taskfile *tf) -{ - struct sata_fsl_port_priv *pp = ap->private_data; + /* enable interrupts on the controller/port */ + temp = ioread32(hcr_base + HCONTROL); + iowrite32((temp | DEFAULT_PORT_IRQ_ENABLE_MASK), hcr_base + HCONTROL); - *tf = pp->tf; } static int sata_fsl_port_start(struct ata_port *ap) { struct device *dev = ap->host->dev; struct sata_fsl_port_priv *pp; - int retval; void *mem; dma_addr_t mem_dma; struct sata_fsl_host_priv *host_priv = ap->host->private_data; @@ -600,17 +599,17 @@ static int sata_fsl_port_start(struct ata_port *ap) if (!pp) return -ENOMEM; - /* - * allocate per command dma alignment pad buffer, which is used - * internally by libATA to ensure that all transfers ending on - * unaligned boundaries are padded, to align on Dword boundaries - */ + /* + * allocate per command dma alignment pad buffer, which is used + * internally by libATA to ensure that all transfers ending on + * unaligned boundaries are padded, to align on Dword boundaries + */ retval = ata_pad_alloc(ap, dev); if (retval) { kfree(pp); return retval; } - + mem = dma_alloc_coherent(dev, SATA_FSL_PORT_PRIV_DMA_SZ, &mem_dma, GFP_KERNEL); if (!mem) { @@ -718,13 +717,23 @@ static unsigned int sata_fsl_dev_classify(struct ata_port *ap) return ata_dev_classify(&tf); } +static int sata_fsl_prereset(struct ata_link *link, unsigned long deadline) +{ + /* FIXME: Never skip softreset, sata_fsl_softreset() is + * combination of soft and hard resets. sata_fsl_softreset() + * needs to be splitted into soft and hard resets. + */ + return 0; +} + static int sata_fsl_softreset(struct ata_link *link, unsigned int *class, - unsigned long deadline) + unsigned long deadline) { struct ata_port *ap = link->ap; struct sata_fsl_port_priv *pp = ap->private_data; struct sata_fsl_host_priv *host_priv = ap->host->private_data; void __iomem *hcr_base = host_priv->hcr_base; + int pmp = sata_srst_pmp(link); u32 temp; struct ata_taskfile tf; u8 *cfis; @@ -734,6 +743,9 @@ static int sata_fsl_softreset(struct ata_link *link, unsigned int *class, DPRINTK("in xx_softreset\n"); + if (pmp != SATA_PMP_CTRL_PORT) + goto issue_srst; + try_offline_again: /* * Force host controller to go off-line, aborting current operations @@ -777,6 +789,7 @@ try_offline_again: temp = ioread32(hcr_base + HCONTROL); temp |= (HCONTROL_ONLINE_PHY_RST | HCONTROL_SNOOP_ENABLE); + temp |= HCONTROL_PMP_ATTACHED; iowrite32(temp, hcr_base + HCONTROL); temp = ata_wait_register(hcr_base + HSTATUS, ONLINE, 0, 1, 500); @@ -802,7 +815,8 @@ try_offline_again: ata_port_printk(ap, KERN_WARNING, "No Device OR PHYRDY change,Hstatus = 0x%x\n", ioread32(hcr_base + HSTATUS)); - goto err; + *class = ATA_DEV_NONE; + goto out; } /* @@ -814,7 +828,8 @@ try_offline_again: if ((temp & 0xFF) != 0x18) { ata_port_printk(ap, KERN_WARNING, "No Signature Update\n"); - goto err; + *class = ATA_DEV_NONE; + goto out; } else { ata_port_printk(ap, KERN_INFO, "Signature Update detected @ %d msecs\n", @@ -829,6 +844,7 @@ try_offline_again: * reached here, we can send a command to the target device */ +issue_srst: DPRINTK("Sending SRST/device reset\n"); ata_tf_init(link->device, &tf); @@ -839,7 +855,7 @@ try_offline_again: SRST_CMD | CMD_DESC_SNOOP_ENABLE, 0, 0, 5); tf.ctl |= ATA_SRST; /* setup SRST bit in taskfile control reg */ - ata_tf_to_fis(&tf, 0, 0, cfis); + ata_tf_to_fis(&tf, pmp, 0, cfis); DPRINTK("Dumping cfis : 0x%x, 0x%x, 0x%x, 0x%x\n", cfis[0], cfis[1], cfis[2], cfis[3]); @@ -885,8 +901,10 @@ try_offline_again: sata_fsl_setup_cmd_hdr_entry(pp, 0, CMD_DESC_SNOOP_ENABLE, 0, 0, 5); tf.ctl &= ~ATA_SRST; /* 2nd H2D Ctl. register FIS */ - ata_tf_to_fis(&tf, 0, 0, cfis); + ata_tf_to_fis(&tf, pmp, 0, cfis); + if (pmp != SATA_PMP_CTRL_PORT) + iowrite32(pmp, CQPMP + hcr_base); iowrite32(1, CQ + hcr_base); msleep(150); /* ?? */ @@ -917,6 +935,7 @@ try_offline_again: VPRINTK("cereg = 0x%x\n", ioread32(hcr_base + CE)); } +out: return 0; err: @@ -927,10 +946,8 @@ static void sata_fsl_error_handler(struct ata_port *ap) { DPRINTK("in xx_error_handler\n"); + sata_pmp_error_handler(ap); - /* perform recovery */ - ata_do_eh(ap, ata_std_prereset, sata_fsl_softreset, sata_std_hardreset, - ata_std_postreset); } static void sata_fsl_post_internal_cmd(struct ata_queued_cmd *qc) @@ -944,25 +961,23 @@ static void sata_fsl_post_internal_cmd(struct ata_queued_cmd *qc) } } -static void sata_fsl_irq_clear(struct ata_port *ap) -{ - /* unused */ -} - static void sata_fsl_error_intr(struct ata_port *ap) { - struct ata_link *link = &ap->link; - struct ata_eh_info *ehi = &link->eh_info; struct sata_fsl_host_priv *host_priv = ap->host->private_data; void __iomem *hcr_base = host_priv->hcr_base; - u32 hstatus, dereg, cereg = 0, SError = 0; + u32 hstatus, dereg=0, cereg = 0, SError = 0; unsigned int err_mask = 0, action = 0; - struct ata_queued_cmd *qc; - int freeze = 0; + int freeze = 0, abort=0; + struct ata_link *link = NULL; + struct ata_queued_cmd *qc = NULL; + struct ata_eh_info *ehi; hstatus = ioread32(hcr_base + HSTATUS); cereg = ioread32(hcr_base + CE); + /* first, analyze and record host port events */ + link = &ap->link; + ehi = &link->eh_info; ata_ehi_clear_desc(ehi); /* @@ -972,42 +987,28 @@ static void sata_fsl_error_intr(struct ata_port *ap) sata_fsl_scr_read(ap, SCR_ERROR, &SError); if (unlikely(SError & 0xFFFF0000)) { sata_fsl_scr_write(ap, SCR_ERROR, SError); - err_mask |= AC_ERR_ATA_BUS; } DPRINTK("error_intr,hStat=0x%x,CE=0x%x,DE =0x%x,SErr=0x%x\n", hstatus, cereg, ioread32(hcr_base + DE), SError); - /* handle single device errors */ - if (cereg) { - /* - * clear the command error, also clears queue to the device - * in error, and we can (re)issue commands to this device. - * When a device is in error all commands queued into the - * host controller and at the device are considered aborted - * and the queue for that device is stopped. Now, after - * clearing the device error, we can issue commands to the - * device to interrogate it to find the source of the error. - */ - dereg = ioread32(hcr_base + DE); - iowrite32(dereg, hcr_base + DE); - iowrite32(cereg, hcr_base + CE); + /* handle fatal errors */ + if (hstatus & FATAL_ERROR_DECODE) { + ehi->err_mask |= AC_ERR_ATA_BUS; + ehi->action |= ATA_EH_SOFTRESET; - DPRINTK("single device error, CE=0x%x, DE=0x%x\n", - ioread32(hcr_base + CE), ioread32(hcr_base + DE)); /* - * We should consider this as non fatal error, and TF must - * be updated as done below. + * Ignore serror in case of fatal errors as we always want + * to do a soft-reset of the FSL SATA controller. Analyzing + * serror may cause libata to schedule a hard-reset action, + * and hard-reset currently does not do controller + * offline/online, causing command timeouts and leads to an + * un-recoverable state, hence make libATA ignore + * autopsy in case of fatal errors. */ - err_mask |= AC_ERR_DEV; - } + ehi->flags |= ATA_EHI_NO_AUTOPSY; - /* handle fatal errors */ - if (hstatus & FATAL_ERROR_DECODE) { - err_mask |= AC_ERR_ATA_BUS; - action |= ATA_EH_SOFTRESET; - /* how will fatal error interrupts be completed ?? */ freeze = 1; } @@ -1017,39 +1018,83 @@ static void sata_fsl_error_intr(struct ata_port *ap) /* Setup a soft-reset EH action */ ata_ehi_hotplugged(ehi); + ata_ehi_push_desc(ehi, "%s", "PHY RDY changed"); freeze = 1; } - /* record error info */ - qc = ata_qc_from_tag(ap, link->active_tag); + /* handle single device errors */ + if (cereg) { + /* + * clear the command error, also clears queue to the device + * in error, and we can (re)issue commands to this device. + * When a device is in error all commands queued into the + * host controller and at the device are considered aborted + * and the queue for that device is stopped. Now, after + * clearing the device error, we can issue commands to the + * device to interrogate it to find the source of the error. + */ + abort = 1; + DPRINTK("single device error, CE=0x%x, DE=0x%x\n", + ioread32(hcr_base + CE), ioread32(hcr_base + DE)); + + /* find out the offending link and qc */ + if (ap->nr_pmp_links) { + dereg = ioread32(hcr_base + DE); + iowrite32(dereg, hcr_base + DE); + iowrite32(cereg, hcr_base + CE); + + if (dereg < ap->nr_pmp_links) { + link = &ap->pmp_link[dereg]; + ehi = &link->eh_info; + qc = ata_qc_from_tag(ap, link->active_tag); + /* + * We should consider this as non fatal error, + * and TF must be updated as done below. + */ + + err_mask |= AC_ERR_DEV; + + } else { + err_mask |= AC_ERR_HSM; + action |= ATA_EH_HARDRESET; + freeze = 1; + } + } else { + dereg = ioread32(hcr_base + DE); + iowrite32(dereg, hcr_base + DE); + iowrite32(cereg, hcr_base + CE); + + qc = ata_qc_from_tag(ap, link->active_tag); + /* + * We should consider this as non fatal error, + * and TF must be updated as done below. + */ + err_mask |= AC_ERR_DEV; + } + } + + /* record error info */ if (qc) { - sata_fsl_cache_taskfile_from_d2h_fis(qc, qc->ap); qc->err_mask |= err_mask; } else ehi->err_mask |= err_mask; ehi->action |= action; - ehi->serror |= SError; /* freeze or abort */ if (freeze) ata_port_freeze(ap); - else - ata_port_abort(ap); -} - -static void sata_fsl_qc_complete(struct ata_queued_cmd *qc) -{ - if (qc->flags & ATA_QCFLAG_RESULT_TF) { - DPRINTK("xx_qc_complete called\n"); - sata_fsl_cache_taskfile_from_d2h_fis(qc, qc->ap); + else if (abort) { + if (qc) + ata_link_abort(qc->dev->link); + else + ata_port_abort(ap); } } static void sata_fsl_host_intr(struct ata_port *ap) { - struct ata_link *link = &ap->link; struct sata_fsl_host_priv *host_priv = ap->host->private_data; void __iomem *hcr_base = host_priv->hcr_base; u32 hstatus, qc_active = 0; @@ -1072,10 +1117,19 @@ static void sata_fsl_host_intr(struct ata_port *ap) return; } - if (link->sactive) { /* only true for NCQ commands */ + /* Read command completed register */ + qc_active = ioread32(hcr_base + CC); + + VPRINTK("Status of all queues :\n"); + VPRINTK("qc_active/CC = 0x%x, CA = 0x%x, CE=0x%x,CQ=0x%x,apqa=0x%x\n", + qc_active, + ioread32(hcr_base + CA), + ioread32(hcr_base + CE), + ioread32(hcr_base + CQ), + ap->qc_active); + + if (qc_active & ap->qc_active) { int i; - /* Read command completed register */ - qc_active = ioread32(hcr_base + CC); /* clear CC bit, this will also complete the interrupt */ iowrite32(qc_active, hcr_base + CC); @@ -1088,7 +1142,6 @@ static void sata_fsl_host_intr(struct ata_port *ap) if (qc_active & (1 << i)) { qc = ata_qc_from_tag(ap, i); if (qc) { - sata_fsl_qc_complete(qc); ata_qc_complete(qc); } DPRINTK @@ -1099,26 +1152,26 @@ static void sata_fsl_host_intr(struct ata_port *ap) } return; - } else if (ap->qc_active) { + } else if ((ap->qc_active & (1 << ATA_TAG_INTERNAL))) { iowrite32(1, hcr_base + CC); - qc = ata_qc_from_tag(ap, link->active_tag); + qc = ata_qc_from_tag(ap, ATA_TAG_INTERNAL); - DPRINTK("completing non-ncq cmd, tag=%d,CC=0x%x\n", - link->active_tag, ioread32(hcr_base + CC)); + DPRINTK("completing non-ncq cmd, CC=0x%x\n", + ioread32(hcr_base + CC)); if (qc) { - sata_fsl_qc_complete(qc); ata_qc_complete(qc); } } else { /* Spurious Interrupt!! */ DPRINTK("spurious interrupt!!, CC = 0x%x\n", ioread32(hcr_base + CC)); + iowrite32(qc_active, hcr_base + CC); return; } } -static irqreturn_t sata_fsl_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs) +static irqreturn_t sata_fsl_interrupt(int irq, void *dev_instance) { struct ata_host *host = dev_instance; struct sata_fsl_host_priv *host_priv = host->private_data; @@ -1189,9 +1242,6 @@ static int sata_fsl_init_controller(struct ata_host *host) iowrite32(0x00000FFFF, hcr_base + CE); iowrite32(0x00000FFFF, hcr_base + DE); - /* initially assuming no Port multiplier, set CQPMP to 0 */ - iowrite32(0x0, hcr_base + CQPMP); - /* * host controller will be brought on-line, during xx_port_start() * callback, that should also initiate the OOB, COMINIT sequence @@ -1207,51 +1257,40 @@ static int sata_fsl_init_controller(struct ata_host *host) * scsi mid-layer and libata interface structures */ static struct scsi_host_template sata_fsl_sht = { - .module = THIS_MODULE, - .name = "sata_fsl", - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .change_queue_depth = ata_scsi_change_queue_depth, + ATA_NCQ_SHT("sata_fsl"), .can_queue = SATA_FSL_QUEUE_DEPTH, - .this_id = ATA_SHT_THIS_ID, .sg_tablesize = SATA_FSL_MAX_PRD_USABLE, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = "sata_fsl", .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, }; -static const struct ata_port_operations sata_fsl_ops = { - .check_status = sata_fsl_check_status, - .check_altstatus = sata_fsl_check_status, - .dev_select = ata_noop_dev_select, - - .tf_read = sata_fsl_tf_read, +static struct ata_port_operations sata_fsl_ops = { + .inherits = &sata_pmp_port_ops, .qc_prep = sata_fsl_qc_prep, .qc_issue = sata_fsl_qc_issue, - .irq_clear = sata_fsl_irq_clear, + .qc_fill_rtf = sata_fsl_qc_fill_rtf, .scr_read = sata_fsl_scr_read, .scr_write = sata_fsl_scr_write, .freeze = sata_fsl_freeze, .thaw = sata_fsl_thaw, + .prereset = sata_fsl_prereset, + .softreset = sata_fsl_softreset, + .pmp_softreset = sata_fsl_softreset, .error_handler = sata_fsl_error_handler, .post_internal_cmd = sata_fsl_post_internal_cmd, .port_start = sata_fsl_port_start, .port_stop = sata_fsl_port_stop, + + .pmp_attach = sata_fsl_pmp_attach, + .pmp_detach = sata_fsl_pmp_detach, }; static const struct ata_port_info sata_fsl_port_info[] = { { .flags = SATA_FSL_HOST_FLAGS, - .link_flags = SATA_FSL_HOST_LFLAGS, .pio_mask = 0x1f, /* pio 0-4 */ .udma_mask = 0x7f, /* udma 0-6 */ .port_ops = &sata_fsl_ops, @@ -1266,7 +1305,6 @@ static int sata_fsl_probe(struct of_device *ofdev, void __iomem *ssr_base = NULL; void __iomem *csr_base = NULL; struct sata_fsl_host_priv *host_priv = NULL; - struct resource *r; int irq; struct ata_host *host; @@ -1276,8 +1314,6 @@ static int sata_fsl_probe(struct of_device *ofdev, dev_printk(KERN_INFO, &ofdev->dev, "Sata FSL Platform/CSB Driver init\n"); - r = kmalloc(sizeof(struct resource), GFP_KERNEL); - hcr_base = of_iomap(ofdev->node, 0); if (!hcr_base) goto error_exit_with_cleanup; @@ -1310,11 +1346,6 @@ static int sata_fsl_probe(struct of_device *ofdev, /* host->iomap is not used currently */ host->private_data = host_priv; - /* setup port(s) */ - - host->ports[0]->ioaddr.cmd_addr = host_priv->hcr_base; - host->ports[0]->ioaddr.scr_addr = host_priv->ssr_base; - /* initialize host controller */ sata_fsl_init_controller(host); @@ -1358,10 +1389,7 @@ static int sata_fsl_remove(struct of_device *ofdev) static struct of_device_id fsl_sata_match[] = { { - .compatible = "fsl,mpc8315-sata", - }, - { - .compatible = "fsl,mpc8379-sata", + .compatible = "fsl,pq-sata", }, {}, }; diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c index c0c9a05..8bc7278 100644 --- a/drivers/ata/sata_inic162x.c +++ b/drivers/ata/sata_inic162x.c @@ -10,13 +10,33 @@ * right. Documentation is available at initio's website but it only * documents registers (not programming model). * - * - ATA disks work. - * - Hotplug works. - * - ATAPI read works but burning doesn't. This thing is really - * peculiar about ATAPI and I couldn't figure out how ATAPI PIO and - * ATAPI DMA WRITE should be programmed. If you've got a clue, be - * my guest. - * - Both STR and STD work. + * This driver has interesting history. The first version was written + * from the documentation and a 2.4 IDE driver posted on a Taiwan + * company, which didn't use any IDMA features and couldn't handle + * LBA48. The resulting driver couldn't handle LBA48 devices either + * making it pretty useless. + * + * After a while, initio picked the driver up, renamed it to + * sata_initio162x, updated it to use IDMA for ATA DMA commands and + * posted it on their website. It only used ATA_PROT_DMA for IDMA and + * attaching both devices and issuing IDMA and !IDMA commands + * simultaneously broke it due to PIRQ masking interaction but it did + * show how to use the IDMA (ADMA + some initio specific twists) + * engine. + * + * Then, I picked up their changes again and here's the usable driver + * which uses IDMA for everything. Everything works now including + * LBA48, CD/DVD burning, suspend/resume and hotplug. There are some + * issues tho. Result Tf is not resported properly, NCQ isn't + * supported yet and CD/DVD writing works with DMA assisted PIO + * protocol (which, for native SATA devices, shouldn't cause any + * noticeable difference). + * + * Anyways, so, here's finally a working driver for inic162x. Enjoy! + * + * initio: If you guys wanna improve the driver regarding result TF + * access and other stuff, please feel free to contact me. I'll be + * happy to assist. */ #include <linux/kernel.h> @@ -28,13 +48,19 @@ #include <scsi/scsi_device.h> #define DRV_NAME "sata_inic162x" -#define DRV_VERSION "0.3" +#define DRV_VERSION "0.4" enum { - MMIO_BAR = 5, + MMIO_BAR_PCI = 5, + MMIO_BAR_CARDBUS = 1, NR_PORTS = 2, + IDMA_CPB_TBL_SIZE = 4 * 32, + + INIC_DMA_BOUNDARY = 0xffffff, + + HOST_ACTRL = 0x08, HOST_CTL = 0x7c, HOST_STAT = 0x7e, HOST_IRQ_STAT = 0xbc, @@ -43,22 +69,37 @@ enum { PORT_SIZE = 0x40, /* registers for ATA TF operation */ - PORT_TF = 0x00, - PORT_ALT_STAT = 0x08, + PORT_TF_DATA = 0x00, + PORT_TF_FEATURE = 0x01, + PORT_TF_NSECT = 0x02, + PORT_TF_LBAL = 0x03, + PORT_TF_LBAM = 0x04, + PORT_TF_LBAH = 0x05, + PORT_TF_DEVICE = 0x06, + PORT_TF_COMMAND = 0x07, + PORT_TF_ALT_STAT = 0x08, PORT_IRQ_STAT = 0x09, PORT_IRQ_MASK = 0x0a, PORT_PRD_CTL = 0x0b, PORT_PRD_ADDR = 0x0c, PORT_PRD_XFERLEN = 0x10, + PORT_CPB_CPBLAR = 0x18, + PORT_CPB_PTQFIFO = 0x1c, /* IDMA register */ PORT_IDMA_CTL = 0x14, + PORT_IDMA_STAT = 0x16, + + PORT_RPQ_FIFO = 0x1e, + PORT_RPQ_CNT = 0x1f, PORT_SCR = 0x20, /* HOST_CTL bits */ HCTL_IRQOFF = (1 << 8), /* global IRQ off */ - HCTL_PWRDWN = (1 << 13), /* power down PHYs */ + HCTL_FTHD0 = (1 << 10), /* fifo threshold 0 */ + HCTL_FTHD1 = (1 << 11), /* fifo threshold 1*/ + HCTL_PWRDWN = (1 << 12), /* power down PHYs */ HCTL_SOFTRST = (1 << 13), /* global reset (no phy reset) */ HCTL_RPGSEL = (1 << 15), /* register page select */ @@ -81,9 +122,7 @@ enum { PIRQ_PENDING = (1 << 7), /* port IRQ pending (STAT only) */ PIRQ_ERR = PIRQ_OFFLINE | PIRQ_ONLINE | PIRQ_FATAL, - - PIRQ_MASK_DMA_READ = PIRQ_REPLY | PIRQ_ATA, - PIRQ_MASK_OTHER = PIRQ_REPLY | PIRQ_COMPLETE, + PIRQ_MASK_DEFAULT = PIRQ_REPLY | PIRQ_ATA, PIRQ_MASK_FREEZE = 0xff, /* PORT_PRD_CTL bits */ @@ -96,45 +135,104 @@ enum { IDMA_CTL_RST_IDMA = (1 << 5), /* reset IDMA machinary */ IDMA_CTL_GO = (1 << 7), /* IDMA mode go */ IDMA_CTL_ATA_NIEN = (1 << 8), /* ATA IRQ disable */ + + /* PORT_IDMA_STAT bits */ + IDMA_STAT_PERR = (1 << 0), /* PCI ERROR MODE */ + IDMA_STAT_CPBERR = (1 << 1), /* ADMA CPB error */ + IDMA_STAT_LGCY = (1 << 3), /* ADMA legacy */ + IDMA_STAT_UIRQ = (1 << 4), /* ADMA unsolicited irq */ + IDMA_STAT_STPD = (1 << 5), /* ADMA stopped */ + IDMA_STAT_PSD = (1 << 6), /* ADMA pause */ + IDMA_STAT_DONE = (1 << 7), /* ADMA done */ + + IDMA_STAT_ERR = IDMA_STAT_PERR | IDMA_STAT_CPBERR, + + /* CPB Control Flags*/ + CPB_CTL_VALID = (1 << 0), /* CPB valid */ + CPB_CTL_QUEUED = (1 << 1), /* queued command */ + CPB_CTL_DATA = (1 << 2), /* data, rsvd in datasheet */ + CPB_CTL_IEN = (1 << 3), /* PCI interrupt enable */ + CPB_CTL_DEVDIR = (1 << 4), /* device direction control */ + + /* CPB Response Flags */ + CPB_RESP_DONE = (1 << 0), /* ATA command complete */ + CPB_RESP_REL = (1 << 1), /* ATA release */ + CPB_RESP_IGNORED = (1 << 2), /* CPB ignored */ + CPB_RESP_ATA_ERR = (1 << 3), /* ATA command error */ + CPB_RESP_SPURIOUS = (1 << 4), /* ATA spurious interrupt error */ + CPB_RESP_UNDERFLOW = (1 << 5), /* APRD deficiency length error */ + CPB_RESP_OVERFLOW = (1 << 6), /* APRD exccess length error */ + CPB_RESP_CPB_ERR = (1 << 7), /* CPB error flag */ + + /* PRD Control Flags */ + PRD_DRAIN = (1 << 1), /* ignore data excess */ + PRD_CDB = (1 << 2), /* atapi packet command pointer */ + PRD_DIRECT_INTR = (1 << 3), /* direct interrupt */ + PRD_DMA = (1 << 4), /* data transfer method */ + PRD_WRITE = (1 << 5), /* data dir, rsvd in datasheet */ + PRD_IOM = (1 << 6), /* io/memory transfer */ + PRD_END = (1 << 7), /* APRD chain end */ }; +/* Comman Parameter Block */ +struct inic_cpb { + u8 resp_flags; /* Response Flags */ + u8 error; /* ATA Error */ + u8 status; /* ATA Status */ + u8 ctl_flags; /* Control Flags */ + __le32 len; /* Total Transfer Length */ + __le32 prd; /* First PRD pointer */ + u8 rsvd[4]; + /* 16 bytes */ + u8 feature; /* ATA Feature */ + u8 hob_feature; /* ATA Ex. Feature */ + u8 device; /* ATA Device/Head */ + u8 mirctl; /* Mirror Control */ + u8 nsect; /* ATA Sector Count */ + u8 hob_nsect; /* ATA Ex. Sector Count */ + u8 lbal; /* ATA Sector Number */ + u8 hob_lbal; /* ATA Ex. Sector Number */ + u8 lbam; /* ATA Cylinder Low */ + u8 hob_lbam; /* ATA Ex. Cylinder Low */ + u8 lbah; /* ATA Cylinder High */ + u8 hob_lbah; /* ATA Ex. Cylinder High */ + u8 command; /* ATA Command */ + u8 ctl; /* ATA Control */ + u8 slave_error; /* Slave ATA Error */ + u8 slave_status; /* Slave ATA Status */ + /* 32 bytes */ +} __attribute__((packed)); + +/* Physical Region Descriptor */ +struct inic_prd { + __le32 mad; /* Physical Memory Address */ + __le16 len; /* Transfer Length */ + u8 rsvd; + u8 flags; /* Control Flags */ +} __attribute__((packed)); + +struct inic_pkt { + struct inic_cpb cpb; + struct inic_prd prd[LIBATA_MAX_PRD + 1]; /* + 1 for cdb */ + u8 cdb[ATAPI_CDB_LEN]; +} __attribute__((packed)); + struct inic_host_priv { - u16 cached_hctl; + void __iomem *mmio_base; + u16 cached_hctl; }; struct inic_port_priv { - u8 dfl_prdctl; - u8 cached_prdctl; - u8 cached_pirq_mask; + struct inic_pkt *pkt; + dma_addr_t pkt_dma; + u32 *cpb_tbl; + dma_addr_t cpb_tbl_dma; }; -static int inic_slave_config(struct scsi_device *sdev) -{ - /* This controller is braindamaged. dma_boundary is 0xffff - * like others but it will lock up the whole machine HARD if - * 65536 byte PRD entry is fed. Reduce maximum segment size. - */ - blk_queue_max_segment_size(sdev->request_queue, 65536 - 512); - - return ata_scsi_slave_config(sdev); -} - static struct scsi_host_template inic_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = inic_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BASE_SHT(DRV_NAME), + .sg_tablesize = LIBATA_MAX_PRD, /* maybe it can be larger? */ + .dma_boundary = INIC_DMA_BOUNDARY, }; static const int scr_map[] = { @@ -145,54 +243,34 @@ static const int scr_map[] = { static void __iomem *inic_port_base(struct ata_port *ap) { - return ap->host->iomap[MMIO_BAR] + ap->port_no * PORT_SIZE; -} + struct inic_host_priv *hpriv = ap->host->private_data; -static void __inic_set_pirq_mask(struct ata_port *ap, u8 mask) -{ - void __iomem *port_base = inic_port_base(ap); - struct inic_port_priv *pp = ap->private_data; - - writeb(mask, port_base + PORT_IRQ_MASK); - pp->cached_pirq_mask = mask; -} - -static void inic_set_pirq_mask(struct ata_port *ap, u8 mask) -{ - struct inic_port_priv *pp = ap->private_data; - - if (pp->cached_pirq_mask != mask) - __inic_set_pirq_mask(ap, mask); + return hpriv->mmio_base + ap->port_no * PORT_SIZE; } static void inic_reset_port(void __iomem *port_base) { void __iomem *idma_ctl = port_base + PORT_IDMA_CTL; - u16 ctl; - ctl = readw(idma_ctl); - ctl &= ~(IDMA_CTL_RST_IDMA | IDMA_CTL_ATA_NIEN | IDMA_CTL_GO); + /* stop IDMA engine */ + readw(idma_ctl); /* flush */ + msleep(1); /* mask IRQ and assert reset */ - writew(ctl | IDMA_CTL_RST_IDMA | IDMA_CTL_ATA_NIEN, idma_ctl); + writew(IDMA_CTL_RST_IDMA, idma_ctl); readw(idma_ctl); /* flush */ - - /* give it some time */ msleep(1); /* release reset */ - writew(ctl | IDMA_CTL_ATA_NIEN, idma_ctl); + writew(0, idma_ctl); /* clear irq */ writeb(0xff, port_base + PORT_IRQ_STAT); - - /* reenable ATA IRQ, turn off IDMA mode */ - writew(ctl, idma_ctl); } static int inic_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val) { - void __iomem *scr_addr = ap->ioaddr.scr_addr; + void __iomem *scr_addr = inic_port_base(ap) + PORT_SCR; void __iomem *addr; if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) @@ -209,125 +287,126 @@ static int inic_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val) static int inic_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) { - void __iomem *scr_addr = ap->ioaddr.scr_addr; - void __iomem *addr; + void __iomem *scr_addr = inic_port_base(ap) + PORT_SCR; if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) return -EINVAL; - addr = scr_addr + scr_map[sc_reg] * 4; writel(val, scr_addr + scr_map[sc_reg] * 4); return 0; } -/* - * In TF mode, inic162x is very similar to SFF device. TF registers - * function the same. DMA engine behaves similary using the same PRD - * format as BMDMA but different command register, interrupt and event - * notification methods are used. The following inic_bmdma_*() - * functions do the impedance matching. - */ -static void inic_bmdma_setup(struct ata_queued_cmd *qc) +static void inic_stop_idma(struct ata_port *ap) { - struct ata_port *ap = qc->ap; - struct inic_port_priv *pp = ap->private_data; void __iomem *port_base = inic_port_base(ap); - int rw = qc->tf.flags & ATA_TFLAG_WRITE; - - /* make sure device sees PRD table writes */ - wmb(); - - /* load transfer length */ - writel(qc->nbytes, port_base + PORT_PRD_XFERLEN); - /* turn on DMA and specify data direction */ - pp->cached_prdctl = pp->dfl_prdctl | PRD_CTL_DMAEN; - if (!rw) - pp->cached_prdctl |= PRD_CTL_WR; - writeb(pp->cached_prdctl, port_base + PORT_PRD_CTL); - - /* issue r/w command */ - ap->ops->exec_command(ap, &qc->tf); + readb(port_base + PORT_RPQ_FIFO); + readb(port_base + PORT_RPQ_CNT); + writew(0, port_base + PORT_IDMA_CTL); } -static void inic_bmdma_start(struct ata_queued_cmd *qc) +static void inic_host_err_intr(struct ata_port *ap, u8 irq_stat, u16 idma_stat) { - struct ata_port *ap = qc->ap; + struct ata_eh_info *ehi = &ap->link.eh_info; struct inic_port_priv *pp = ap->private_data; - void __iomem *port_base = inic_port_base(ap); + struct inic_cpb *cpb = &pp->pkt->cpb; + bool freeze = false; - /* start host DMA transaction */ - pp->cached_prdctl |= PRD_CTL_START; - writeb(pp->cached_prdctl, port_base + PORT_PRD_CTL); -} + ata_ehi_clear_desc(ehi); + ata_ehi_push_desc(ehi, "irq_stat=0x%x idma_stat=0x%x", + irq_stat, idma_stat); -static void inic_bmdma_stop(struct ata_queued_cmd *qc) -{ - struct ata_port *ap = qc->ap; - struct inic_port_priv *pp = ap->private_data; - void __iomem *port_base = inic_port_base(ap); + inic_stop_idma(ap); - /* stop DMA engine */ - writeb(pp->dfl_prdctl, port_base + PORT_PRD_CTL); -} + if (irq_stat & (PIRQ_OFFLINE | PIRQ_ONLINE)) { + ata_ehi_push_desc(ehi, "hotplug"); + ata_ehi_hotplugged(ehi); + freeze = true; + } -static u8 inic_bmdma_status(struct ata_port *ap) -{ - /* event is already verified by the interrupt handler */ - return ATA_DMA_INTR; -} + if (idma_stat & IDMA_STAT_PERR) { + ata_ehi_push_desc(ehi, "PCI error"); + freeze = true; + } -static void inic_irq_clear(struct ata_port *ap) -{ - /* noop */ + if (idma_stat & IDMA_STAT_CPBERR) { + ata_ehi_push_desc(ehi, "CPB error"); + + if (cpb->resp_flags & CPB_RESP_IGNORED) { + __ata_ehi_push_desc(ehi, " ignored"); + ehi->err_mask |= AC_ERR_INVALID; + freeze = true; + } + + if (cpb->resp_flags & CPB_RESP_ATA_ERR) + ehi->err_mask |= AC_ERR_DEV; + + if (cpb->resp_flags & CPB_RESP_SPURIOUS) { + __ata_ehi_push_desc(ehi, " spurious-intr"); + ehi->err_mask |= AC_ERR_HSM; + freeze = true; + } + + if (cpb->resp_flags & + (CPB_RESP_UNDERFLOW | CPB_RESP_OVERFLOW)) { + __ata_ehi_push_desc(ehi, " data-over/underflow"); + ehi->err_mask |= AC_ERR_HSM; + freeze = true; + } + } + + if (freeze) + ata_port_freeze(ap); + else + ata_port_abort(ap); } static void inic_host_intr(struct ata_port *ap) { void __iomem *port_base = inic_port_base(ap); - struct ata_eh_info *ehi = &ap->link.eh_info; + struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->link.active_tag); u8 irq_stat; + u16 idma_stat; - /* fetch and clear irq */ + /* read and clear IRQ status */ irq_stat = readb(port_base + PORT_IRQ_STAT); writeb(irq_stat, port_base + PORT_IRQ_STAT); + idma_stat = readw(port_base + PORT_IDMA_STAT); - if (likely(!(irq_stat & PIRQ_ERR))) { - struct ata_queued_cmd *qc = - ata_qc_from_tag(ap, ap->link.active_tag); + if (unlikely((irq_stat & PIRQ_ERR) || (idma_stat & IDMA_STAT_ERR))) + inic_host_err_intr(ap, irq_stat, idma_stat); - if (unlikely(!qc || (qc->tf.flags & ATA_TFLAG_POLLING))) { - ata_chk_status(ap); /* clear ATA interrupt */ - return; - } + if (unlikely(!qc)) + goto spurious; - if (likely(ata_host_intr(ap, qc))) - return; + if (likely(idma_stat & IDMA_STAT_DONE)) { + inic_stop_idma(ap); - ata_chk_status(ap); /* clear ATA interrupt */ - ata_port_printk(ap, KERN_WARNING, "unhandled " - "interrupt, irq_stat=%x\n", irq_stat); + /* Depending on circumstances, device error + * isn't reported by IDMA, check it explicitly. + */ + if (unlikely(readb(port_base + PORT_TF_COMMAND) & + (ATA_DF | ATA_ERR))) + qc->err_mask |= AC_ERR_DEV; + + ata_qc_complete(qc); return; } - /* error */ - ata_ehi_push_desc(ehi, "irq_stat=0x%x", irq_stat); - - if (irq_stat & (PIRQ_OFFLINE | PIRQ_ONLINE)) { - ata_ehi_hotplugged(ehi); - ata_port_freeze(ap); - } else - ata_port_abort(ap); + spurious: + ata_port_printk(ap, KERN_WARNING, "unhandled interrupt: " + "cmd=0x%x irq_stat=0x%x idma_stat=0x%x\n", + qc ? qc->tf.command : 0xff, irq_stat, idma_stat); } static irqreturn_t inic_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs) { struct ata_host *host = dev_instance; - void __iomem *mmio_base = host->iomap[MMIO_BAR]; + struct inic_host_priv *hpriv = host->private_data; u16 host_irq_stat; int i, handled = 0;; - host_irq_stat = readw(mmio_base + HOST_IRQ_STAT); + host_irq_stat = readw(hpriv->mmio_base + HOST_IRQ_STAT); if (unlikely(!(host_irq_stat & HIRQ_GLOBAL))) goto out; @@ -357,60 +436,171 @@ static irqreturn_t inic_interrupt(int irq, void *dev_instance, struct pt_regs *p return IRQ_RETVAL(handled); } +static int inic_check_atapi_dma(struct ata_queued_cmd *qc) +{ + /* For some reason ATAPI_PROT_DMA doesn't work for some + * commands including writes and other misc ops. Use PIO + * protocol instead, which BTW is driven by the DMA engine + * anyway, so it shouldn't make much difference for native + * SATA devices. + */ + if (atapi_cmd_type(qc->cdb[0]) == READ) + return 0; + return 1; +} + +static void inic_fill_sg(struct inic_prd *prd, struct ata_queued_cmd *qc) +{ + struct scatterlist *sg; + u8 flags = 0; + + if (qc->tf.flags & ATA_TFLAG_WRITE) + flags |= PRD_WRITE; + + if (ata_is_dma(qc->tf.protocol)) + flags |= PRD_DMA; + + ata_for_each_sg(sg, qc) { + prd->mad = cpu_to_le32(sg_dma_address(sg)); + prd->len = cpu_to_le16(sg_dma_len(sg)); + prd->flags = flags; + prd++; + } + + prd[-1].flags |= PRD_END; +} + +static void inic_qc_prep(struct ata_queued_cmd *qc) +{ + struct inic_port_priv *pp = qc->ap->private_data; + struct inic_pkt *pkt = pp->pkt; + struct inic_cpb *cpb = &pkt->cpb; + struct inic_prd *prd = pkt->prd; + bool is_atapi = ata_is_atapi(qc->tf.protocol); + bool is_data = ata_is_data(qc->tf.protocol); + unsigned int cdb_len = 0; + + VPRINTK("ENTER\n"); + + if (is_atapi) + cdb_len = qc->dev->cdb_len; + + /* prepare packet, based on initio driver */ + memset(pkt, 0, sizeof(struct inic_pkt)); + + cpb->ctl_flags = CPB_CTL_VALID | CPB_CTL_IEN; + if (is_atapi || is_data) + cpb->ctl_flags |= CPB_CTL_DATA; + + cpb->len = cpu_to_le32(qc->nbytes + cdb_len); + cpb->prd = cpu_to_le32(pp->pkt_dma + offsetof(struct inic_pkt, prd)); + + cpb->device = qc->tf.device; + cpb->feature = qc->tf.feature; + cpb->nsect = qc->tf.nsect; + cpb->lbal = qc->tf.lbal; + cpb->lbam = qc->tf.lbam; + cpb->lbah = qc->tf.lbah; + + if (qc->tf.flags & ATA_TFLAG_LBA48) { + cpb->hob_feature = qc->tf.hob_feature; + cpb->hob_nsect = qc->tf.hob_nsect; + cpb->hob_lbal = qc->tf.hob_lbal; + cpb->hob_lbam = qc->tf.hob_lbam; + cpb->hob_lbah = qc->tf.hob_lbah; + } + + cpb->command = qc->tf.command; + /* don't load ctl - dunno why. it's like that in the initio driver */ + + /* setup PRD for CDB */ + if (is_atapi) { + memcpy(pkt->cdb, qc->cdb, ATAPI_CDB_LEN); + prd->mad = cpu_to_le32(pp->pkt_dma + + offsetof(struct inic_pkt, cdb)); + prd->len = cpu_to_le16(cdb_len); + prd->flags = PRD_CDB | PRD_WRITE; + if (!is_data) + prd->flags |= PRD_END; + prd++; + } + + /* setup sg table */ + if (is_data) + inic_fill_sg(prd, qc); + + pp->cpb_tbl[0] = pp->pkt_dma; +} + static unsigned int inic_qc_issue(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; + void __iomem *port_base = inic_port_base(ap); - /* ATA IRQ doesn't wait for DMA transfer completion and vice - * versa. Mask IRQ selectively to detect command completion. - * Without it, ATA DMA read command can cause data corruption. - * - * Something similar might be needed for ATAPI writes. I - * tried a lot of combinations but couldn't find the solution. - */ - if (qc->tf.protocol == ATA_PROT_DMA && - !(qc->tf.flags & ATA_TFLAG_WRITE)) - inic_set_pirq_mask(ap, PIRQ_MASK_DMA_READ); - else - inic_set_pirq_mask(ap, PIRQ_MASK_OTHER); + /* fire up the ADMA engine */ + writew(HCTL_FTHD0, port_base + HOST_CTL); + writew(IDMA_CTL_GO, port_base + PORT_IDMA_CTL); + writeb(0, port_base + PORT_CPB_PTQFIFO); + + return 0; +} + +static void inic_tf_read(struct ata_port *ap, struct ata_taskfile *tf) +{ + void __iomem *port_base = inic_port_base(ap); - /* Issuing a command to yet uninitialized port locks up the - * controller. Most of the time, this happens for the first - * command after reset which are ATA and ATAPI IDENTIFYs. - * Fast fail if stat is 0x7f or 0xff for those commands. + tf->feature = readb(port_base + PORT_TF_FEATURE); + tf->nsect = readb(port_base + PORT_TF_NSECT); + tf->lbal = readb(port_base + PORT_TF_LBAL); + tf->lbam = readb(port_base + PORT_TF_LBAM); + tf->lbah = readb(port_base + PORT_TF_LBAH); + tf->device = readb(port_base + PORT_TF_DEVICE); + tf->command = readb(port_base + PORT_TF_COMMAND); +} + +static bool inic_qc_fill_rtf(struct ata_queued_cmd *qc) +{ + struct ata_taskfile *rtf = &qc->result_tf; + struct ata_taskfile tf; + + /* FIXME: Except for status and error, result TF access + * doesn't work. I tried reading from BAR0/2, CPB and BAR5. + * None works regardless of which command interface is used. + * For now return true iff status indicates device error. + * This means that we're reporting bogus sector for RW + * failures. Eeekk.... */ - if (unlikely(qc->tf.command == ATA_CMD_ID_ATA || - qc->tf.command == ATA_CMD_ID_ATAPI)) { - u8 stat = ata_chk_status(ap); - if (stat == 0x7f || stat == 0xff) - return AC_ERR_HSM; - } + inic_tf_read(qc->ap, &tf); + + if (!(tf.command & ATA_ERR)) + return false; - return ata_qc_issue_prot(qc); + rtf->command = tf.command; + rtf->feature = tf.feature; + return true; } static void inic_freeze(struct ata_port *ap) { void __iomem *port_base = inic_port_base(ap); - __inic_set_pirq_mask(ap, PIRQ_MASK_FREEZE); - - ata_chk_status(ap); + writeb(PIRQ_MASK_FREEZE, port_base + PORT_IRQ_MASK); writeb(0xff, port_base + PORT_IRQ_STAT); - - readb(port_base + PORT_IRQ_STAT); /* flush */ } static void inic_thaw(struct ata_port *ap) { void __iomem *port_base = inic_port_base(ap); - ata_chk_status(ap); writeb(0xff, port_base + PORT_IRQ_STAT); + writeb(PIRQ_MASK_DEFAULT, port_base + PORT_IRQ_MASK); +} - __inic_set_pirq_mask(ap, PIRQ_MASK_OTHER); +static int inic_check_ready(struct ata_link *link) +{ + void __iomem *port_base = inic_port_base(link->ap); - readb(port_base + PORT_IRQ_STAT); /* flush */ + return ata_check_ready(readb(port_base + PORT_TF_COMMAND)); } /* @@ -424,17 +614,15 @@ static int inic_hardreset(struct ata_link *link, unsigned int *class, void __iomem *port_base = inic_port_base(ap); void __iomem *idma_ctl = port_base + PORT_IDMA_CTL; const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context); - u16 val; int rc; /* hammer it into sane state */ inic_reset_port(port_base); - val = readw(idma_ctl); - writew(val | IDMA_CTL_RST_ATA, idma_ctl); + writew(IDMA_CTL_RST_ATA, idma_ctl); readw(idma_ctl); /* flush */ msleep(1); - writew(val & ~IDMA_CTL_RST_ATA, idma_ctl); + writew(0, idma_ctl); rc = sata_link_resume(link, timing, deadline); if (rc) { @@ -447,10 +635,8 @@ static int inic_hardreset(struct ata_link *link, unsigned int *class, if (ata_link_online(link)) { struct ata_taskfile tf; - /* wait a while before checking status */ - ata_wait_after_reset(ap, deadline); - - rc = ata_wait_ready(ap, deadline); + /* wait for link to become ready */ + rc = ata_wait_after_reset(link, deadline, inic_check_ready); /* link occupied, -ENODEV too is an error */ if (rc) { ata_link_printk(link, KERN_WARNING, "device not ready " @@ -458,10 +644,8 @@ static int inic_hardreset(struct ata_link *link, unsigned int *class, return rc; } - ata_tf_read(ap, &tf); + inic_tf_read(ap, &tf); *class = ata_dev_classify(&tf); - if (*class == ATA_DEV_UNKNOWN) - *class = ATA_DEV_NONE; } return 0; @@ -470,20 +654,9 @@ static int inic_hardreset(struct ata_link *link, unsigned int *class, static void inic_error_handler(struct ata_port *ap) { void __iomem *port_base = inic_port_base(ap); - struct inic_port_priv *pp = ap->private_data; - unsigned long flags; - /* reset PIO HSM and stop DMA engine */ inic_reset_port(port_base); - - spin_lock_irqsave(ap->lock, flags); - ap->hsm_task_state = HSM_ST_IDLE; - writeb(pp->dfl_prdctl, port_base + PORT_PRD_CTL); - spin_unlock_irqrestore(ap->lock, flags); - - /* PIO and DMA engines have been stopped, perform recovery */ - ata_do_eh(ap, ata_std_prereset, NULL, inic_hardreset, - ata_std_postreset); + ata_std_error_handler(ap); } static void inic_post_internal_cmd(struct ata_queued_cmd *qc) @@ -493,26 +666,18 @@ static void inic_post_internal_cmd(struct ata_queued_cmd *qc) inic_reset_port(inic_port_base(qc->ap)); } -static void inic_dev_config(struct ata_device *dev) -{ - /* inic can only handle upto LBA28 max sectors */ - if (dev->max_sectors > ATA_MAX_SECTORS) - dev->max_sectors = ATA_MAX_SECTORS; - - if (dev->n_sectors >= 1 << 28) { - ata_dev_printk(dev, KERN_ERR, - "ERROR: This driver doesn't support LBA48 yet and may cause\n" - " data corruption on such devices. Disabling.\n"); - ata_dev_disable(dev); - } -} - static void init_port(struct ata_port *ap) { void __iomem *port_base = inic_port_base(ap); + struct inic_port_priv *pp = ap->private_data; + + /* clear packet and CPB table */ + memset(pp->pkt, 0, sizeof(struct inic_pkt)); + memset(pp->cpb_tbl, 0, IDMA_CPB_TBL_SIZE); - /* Setup PRD address */ + /* setup PRD and CPB lookup table addresses */ writel(ap->prd_dma, port_base + PORT_PRD_ADDR); + writel(pp->cpb_tbl_dma, port_base + PORT_CPB_CPBLAR); } static int inic_port_resume(struct ata_port *ap) @@ -523,28 +688,30 @@ static int inic_port_resume(struct ata_port *ap) static int inic_port_start(struct ata_port *ap) { - void __iomem *port_base = inic_port_base(ap); + struct device *dev = ap->host->dev; struct inic_port_priv *pp; - u8 tmp; int rc; /* alloc and initialize private data */ - pp = devm_kzalloc(ap->host->dev, sizeof(*pp), GFP_KERNEL); + pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL); if (!pp) return -ENOMEM; ap->private_data = pp; - /* default PRD_CTL value, DMAEN, WR and START off */ - tmp = readb(port_base + PORT_PRD_CTL); - tmp &= ~(PRD_CTL_DMAEN | PRD_CTL_WR | PRD_CTL_START); - pp->dfl_prdctl = tmp; - /* Alloc resources */ rc = ata_port_start(ap); - if (rc) { - kfree(pp); + if (rc) return rc; - } + + pp->pkt = dmam_alloc_coherent(dev, sizeof(struct inic_pkt), + &pp->pkt_dma, GFP_KERNEL); + if (!pp->pkt) + return -ENOMEM; + + pp->cpb_tbl = dmam_alloc_coherent(dev, IDMA_CPB_TBL_SIZE, + &pp->cpb_tbl_dma, GFP_KERNEL); + if (!pp->cpb_tbl) + return -ENOMEM; init_port(ap); @@ -552,45 +719,27 @@ static int inic_port_start(struct ata_port *ap) } static struct ata_port_operations inic_port_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, + .inherits = &sata_port_ops, - .scr_read = inic_scr_read, - .scr_write = inic_scr_write, - - .bmdma_setup = inic_bmdma_setup, - .bmdma_start = inic_bmdma_start, - .bmdma_stop = inic_bmdma_stop, - .bmdma_status = inic_bmdma_status, - - .irq_clear = inic_irq_clear, - .irq_on = ata_irq_on, - - .qc_prep = ata_qc_prep, + .check_atapi_dma = inic_check_atapi_dma, + .qc_prep = inic_qc_prep, .qc_issue = inic_qc_issue, - .data_xfer = ata_data_xfer, + .qc_fill_rtf = inic_qc_fill_rtf, .freeze = inic_freeze, .thaw = inic_thaw, + .hardreset = inic_hardreset, .error_handler = inic_error_handler, .post_internal_cmd = inic_post_internal_cmd, - .dev_config = inic_dev_config, - .port_resume = inic_port_resume, + .scr_read = inic_scr_read, + .scr_write = inic_scr_write, + .port_resume = inic_port_resume, .port_start = inic_port_start, }; static struct ata_port_info inic_port_info = { - /* For some reason, ATA_PROT_ATAPI is broken on this - * controller, and no, PIO_POLLING does't fix it. It somehow - * manages to report the wrong ireason and ignoring ireason - * results in machine lock up. Tell libata to always prefer - * DMA. - */ .flags = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ @@ -643,7 +792,6 @@ static int inic_pci_device_resume(struct pci_dev *pdev) { struct ata_host *host = dev_get_drvdata(&pdev->dev); struct inic_host_priv *hpriv = host->private_data; - void __iomem *mmio_base = host->iomap[MMIO_BAR]; int rc; rc = ata_pci_device_do_resume(pdev); @@ -651,7 +799,7 @@ static int inic_pci_device_resume(struct pci_dev *pdev) return rc; if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) { - rc = init_controller(mmio_base, hpriv->cached_hctl); + rc = init_controller(hpriv->mmio_base, hpriv->cached_hctl); if (rc) return rc; } @@ -669,6 +817,7 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) struct ata_host *host; struct inic_host_priv *hpriv; void __iomem * const *iomap; + int mmio_bar; int i, rc; if (!printed_version++) @@ -682,38 +831,31 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) host->private_data = hpriv; - /* acquire resources and fill host */ + /* Acquire resources and fill host. Note that PCI and cardbus + * use different BARs. + */ rc = pcim_enable_device(pdev); if (rc) return rc; - rc = pcim_iomap_regions(pdev, 0x3f, DRV_NAME); + if (pci_resource_flags(pdev, MMIO_BAR_PCI) & IORESOURCE_MEM) + mmio_bar = MMIO_BAR_PCI; + else + mmio_bar = MMIO_BAR_CARDBUS; + + rc = pcim_iomap_regions(pdev, 1 << mmio_bar, DRV_NAME); if (rc) return rc; host->iomap = iomap = pcim_iomap_table(pdev); + hpriv->mmio_base = iomap[mmio_bar]; + hpriv->cached_hctl = readw(hpriv->mmio_base + HOST_CTL); for (i = 0; i < NR_PORTS; i++) { struct ata_port *ap = host->ports[i]; - struct ata_ioports *port = &ap->ioaddr; - unsigned int offset = i * PORT_SIZE; - - port->cmd_addr = iomap[2 * i]; - port->altstatus_addr = - port->ctl_addr = (void __iomem *) - ((unsigned long)iomap[2 * i + 1] | ATA_PCI_CTL_OFS); - port->scr_addr = iomap[MMIO_BAR] + offset + PORT_SCR; - - ata_std_ports(port); - - ata_port_pbar_desc(ap, MMIO_BAR, -1, "mmio"); - ata_port_pbar_desc(ap, MMIO_BAR, offset, "port"); - ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx", - (unsigned long long)pci_resource_start(pdev, 2 * i), - (unsigned long long)pci_resource_start(pdev, (2 * i + 1)) | - ATA_PCI_CTL_OFS); - } - hpriv->cached_hctl = readw(iomap[MMIO_BAR] + HOST_CTL); + ata_port_pbar_desc(ap, mmio_bar, -1, "mmio"); + ata_port_pbar_desc(ap, mmio_bar, i * PORT_SIZE, "port"); + } /* Set dma_mask. This devices doesn't support 64bit addressing. */ rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); @@ -730,7 +872,7 @@ static int inic_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) return rc; } - rc = init_controller(iomap[MMIO_BAR], hpriv->cached_hctl); + rc = init_controller(hpriv->mmio_base, hpriv->cached_hctl); if (rc) { dev_printk(KERN_ERR, &pdev->dev, "failed to initialize controller\n"); diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index 4f4ab43..2ddd2aa 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c @@ -1,6 +1,7 @@ /* * sata_mv.c - Marvell SATA support * + * Copyright 2008: Marvell Corporation, all rights reserved. * Copyright 2005: EMC Corporation, all rights reserved. * Copyright 2005 Red Hat, Inc. All rights reserved. * @@ -22,41 +23,34 @@ */ /* - sata_mv TODO list: - - 1) Needs a full errata audit for all chipsets. I implemented most - of the errata workarounds found in the Marvell vendor driver, but - I distinctly remember a couple workarounds (one related to PCI-X) - are still needed. - - 4) Add NCQ support (easy to intermediate, once new-EH support appears) - - 5) Investigate problems with PCI Message Signalled Interrupts (MSI). - - 6) Add port multiplier support (intermediate) - - 8) Develop a low-power-consumption strategy, and implement it. - - 9) [Experiment, low priority] See if ATAPI can be supported using - "unknown FIS" or "vendor-specific FIS" support, or something creative - like that. - - 10) [Experiment, low priority] Investigate interrupt coalescing. - Quite often, especially with PCI Message Signalled Interrupts (MSI), - the overhead reduced by interrupt mitigation is quite often not - worth the latency cost. - - 11) [Experiment, Marvell value added] Is it possible to use target - mode to cross-connect two Linux boxes with Marvell cards? If so, - creating LibATA target mode support would be very interesting. - - Target mode, for those without docs, is the ability to directly - connect two SATA controllers. - - 13) Verify that 7042 is fully supported. I only have a 6042. - -*/ - + * sata_mv TODO list: + * + * --> Errata workaround for NCQ device errors. + * + * --> More errata workarounds for PCI-X. + * + * --> Complete a full errata audit for all chipsets to identify others. + * + * --> ATAPI support (Marvell claims the 60xx/70xx chips can do it). + * + * --> Investigate problems with PCI Message Signalled Interrupts (MSI). + * + * --> Cache frequently-accessed registers in mv_port_priv to reduce overhead. + * + * --> Develop a low-power-consumption strategy, and implement it. + * + * --> [Experiment, low priority] Investigate interrupt coalescing. + * Quite often, especially with PCI Message Signalled Interrupts (MSI), + * the overhead reduced by interrupt mitigation is quite often not + * worth the latency cost. + * + * --> [Experiment, Marvell value added] Is it possible to use target + * mode to cross-connect two Linux boxes with Marvell cards? If so, + * creating LibATA target mode support would be very interesting. + * + * Target mode, for those without docs, is the ability to directly + * connect two SATA ports. + */ #include <linux/kernel.h> #include <linux/module.h> @@ -65,15 +59,17 @@ #include <linux/blkdev.h> #include <linux/delay.h> #include <linux/interrupt.h> +#include <linux/dmapool.h> #include <linux/dma-mapping.h> #include <linux/device.h> +#include <linux/bitops.h> #include <scsi/scsi_host.h> #include <scsi/scsi_cmnd.h> #include <scsi/scsi_device.h> #include <linux/libata.h> #define DRV_NAME "sata_mv" -#define DRV_VERSION "1.01" +#define DRV_VERSION "1.24" enum { /* BAR's are enumerated in terms of pci_resource_start() terms */ @@ -93,9 +89,9 @@ enum { MV_IRQ_COAL_TIME_THRESHOLD = (MV_IRQ_COAL_REG_BASE + 0xd0), MV_SATAHC0_REG_BASE = 0x20000, - MV_FLASH_CTL = 0x1046c, - MV_GPIO_PORT_CTL = 0x104f0, - MV_RESET_CFG = 0x180d8, + MV_FLASH_CTL_OFS = 0x1046c, + MV_GPIO_PORT_CTL_OFS = 0x104f0, + MV_RESET_CFG_OFS = 0x180d8, MV_PCI_REG_SZ = MV_MAJOR_REG_AREA_SZ, MV_SATAHC_REG_SZ = MV_MAJOR_REG_AREA_SZ, @@ -107,32 +103,37 @@ enum { /* CRQB needs alignment on a 1KB boundary. Size == 1KB * CRPB needs alignment on a 256B boundary. Size == 256B - * SG count of 176 leads to MV_PORT_PRIV_DMA_SZ == 4KB * ePRD (SG) entries need alignment on a 16B boundary. Size == 16B */ MV_CRQB_Q_SZ = (32 * MV_MAX_Q_DEPTH), MV_CRPB_Q_SZ = (8 * MV_MAX_Q_DEPTH), - MV_MAX_SG_CT = 176, + MV_MAX_SG_CT = 256, MV_SG_TBL_SZ = (16 * MV_MAX_SG_CT), - MV_PORT_PRIV_DMA_SZ = (MV_CRQB_Q_SZ + MV_CRPB_Q_SZ + MV_SG_TBL_SZ), - MV_PORTS_PER_HC = 4, - /* == (port / MV_PORTS_PER_HC) to determine HC from 0-7 port */ + /* Determine hc from 0-7 port: hc = port >> MV_PORT_HC_SHIFT */ MV_PORT_HC_SHIFT = 2, - /* == (port % MV_PORTS_PER_HC) to determine hard port from 0-7 port */ - MV_PORT_MASK = 3, + MV_PORTS_PER_HC = (1 << MV_PORT_HC_SHIFT), /* 4 */ + /* Determine hc port from 0-7 port: hardport = port & MV_PORT_MASK */ + MV_PORT_MASK = (MV_PORTS_PER_HC - 1), /* 3 */ /* Host Flags */ MV_FLAG_DUAL_HC = (1 << 30), /* two SATA Host Controllers */ MV_FLAG_IRQ_COALESCE = (1 << 29), /* IRQ coalescing capability */ + MV_COMMON_FLAGS = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO | ATA_FLAG_NO_ATAPI | ATA_FLAG_PIO_POLLING, + MV_6XXX_FLAGS = MV_FLAG_IRQ_COALESCE, + MV_GENIIE_FLAGS = MV_COMMON_FLAGS | MV_6XXX_FLAGS | + ATA_FLAG_PMP | ATA_FLAG_ACPI_SATA | + ATA_FLAG_NCQ | ATA_FLAG_AN, + CRQB_FLAG_READ = (1 << 0), CRQB_TAG_SHIFT = 1, CRQB_IOID_SHIFT = 6, /* CRQB Gen-II/IIE IO Id shift */ + CRQB_PMP_SHIFT = 12, /* CRQB Gen-II/IIE PMP shift */ CRQB_HOSTQ_SHIFT = 17, /* CRQB Gen-II/IIE HostQueTag shift */ CRQB_CMD_ADDR_SHIFT = 8, CRQB_CMD_CS = (0x2 << 11), @@ -147,18 +148,21 @@ enum { /* PCI interface registers */ PCI_COMMAND_OFS = 0xc00, + PCI_COMMAND_MRDTRIG = (1 << 7), /* PCI Master Read Trigger */ PCI_MAIN_CMD_STS_OFS = 0xd30, STOP_PCI_MASTER = (1 << 2), PCI_MASTER_EMPTY = (1 << 3), GLOB_SFT_RST = (1 << 4), - MV_PCI_MODE = 0xd00, + MV_PCI_MODE_OFS = 0xd00, + MV_PCI_MODE_MASK = 0x30, + MV_PCI_EXP_ROM_BAR_CTL = 0xd2c, MV_PCI_DISC_TIMER = 0xd04, MV_PCI_MSI_TRIGGER = 0xc38, MV_PCI_SERR_MASK = 0xc28, - MV_PCI_XBAR_TMOUT = 0x1d04, + MV_PCI_XBAR_TMOUT_OFS = 0x1d04, MV_PCI_ERR_LOW_ADDRESS = 0x1d40, MV_PCI_ERR_HIGH_ADDRESS = 0x1d44, MV_PCI_ERR_ATTRIBUTE = 0x1d48, @@ -170,12 +174,15 @@ enum { PCIE_IRQ_CAUSE_OFS = 0x1900, PCIE_IRQ_MASK_OFS = 0x1910, - PCIE_UNMASK_ALL_IRQS = 0x70a, /* assorted bits */ - - HC_MAIN_IRQ_CAUSE_OFS = 0x1d60, - HC_MAIN_IRQ_MASK_OFS = 0x1d64, - PORT0_ERR = (1 << 0), /* shift by port # */ - PORT0_DONE = (1 << 1), /* shift by port # */ + PCIE_UNMASK_ALL_IRQS = 0x40a, /* assorted bits */ + + /* Host Controller Main Interrupt Cause/Mask registers (1 per-chip) */ + PCI_HC_MAIN_IRQ_CAUSE_OFS = 0x1d60, + PCI_HC_MAIN_IRQ_MASK_OFS = 0x1d64, + SOC_HC_MAIN_IRQ_CAUSE_OFS = 0x20020, + SOC_HC_MAIN_IRQ_MASK_OFS = 0x20024, + ERR_IRQ = (1 << 0), /* shift by port # */ + DONE_IRQ = (1 << 1), /* shift by port # */ HC0_IRQ_PEND = 0x1ff, /* bits 0-8 = HC0's ports */ HC_SHIFT = 9, /* bits 9-17 = HC1's ports */ PCI_ERR = (1 << 18), @@ -189,18 +196,14 @@ enum { TWSI_INT = (1 << 24), HC_MAIN_RSVD = (0x7f << 25), /* bits 31-25 */ HC_MAIN_RSVD_5 = (0x1fff << 19), /* bits 31-19 */ - HC_MAIN_MASKED_IRQS = (TRAN_LO_DONE | TRAN_HI_DONE | - PORTS_0_7_COAL_DONE | GPIO_INT | TWSI_INT | - HC_MAIN_RSVD), - HC_MAIN_MASKED_IRQS_5 = (PORTS_0_3_COAL_DONE | PORTS_4_7_COAL_DONE | - HC_MAIN_RSVD_5), + HC_MAIN_RSVD_SOC = (0x3fffffb << 6), /* bits 31-9, 7-6 */ /* SATAHC registers */ HC_CFG_OFS = 0, HC_IRQ_CAUSE_OFS = 0x14, - CRPB_DMA_DONE = (1 << 0), /* shift by port # */ - HC_IRQ_COAL = (1 << 4), /* IRQ coalescing */ + DMA_IRQ = (1 << 0), /* shift by port # */ + HC_COAL_IRQ = (1 << 4), /* IRQ coalescing */ DEV_IRQ = (1 << 8), /* shift by port # */ /* Shadow block registers */ @@ -210,23 +213,45 @@ enum { /* SATA registers */ SATA_STATUS_OFS = 0x300, /* ctrl, err regs follow status */ SATA_ACTIVE_OFS = 0x350, + SATA_FIS_IRQ_CAUSE_OFS = 0x364, + SATA_FIS_IRQ_AN = (1 << 9), /* async notification */ + + LTMODE_OFS = 0x30c, + LTMODE_BIT8 = (1 << 8), /* unknown, but necessary */ + PHY_MODE3 = 0x310, PHY_MODE4 = 0x314, + PHY_MODE4_CFG_MASK = 0x00000003, /* phy internal config field */ + PHY_MODE4_CFG_VALUE = 0x00000001, /* phy internal config field */ + PHY_MODE4_RSVD_ZEROS = 0x5de3fffa, /* Gen2e always write zeros */ + PHY_MODE4_RSVD_ONES = 0x00000005, /* Gen2e always write ones */ + PHY_MODE2 = 0x330, + SATA_IFCTL_OFS = 0x344, + SATA_TESTCTL_OFS = 0x348, + SATA_IFSTAT_OFS = 0x34c, + VENDOR_UNIQUE_FIS_OFS = 0x35c, + + FISCFG_OFS = 0x360, + FISCFG_WAIT_DEV_ERR = (1 << 8), /* wait for host on DevErr */ + FISCFG_SINGLE_SYNC = (1 << 16), /* SYNC on DMA activation */ + MV5_PHY_MODE = 0x74, - MV5_LT_MODE = 0x30, - MV5_PHY_CTL = 0x0C, - SATA_INTERFACE_CTL = 0x050, + MV5_LTMODE_OFS = 0x30, + MV5_PHY_CTL_OFS = 0x0C, + SATA_INTERFACE_CFG_OFS = 0x050, MV_M2_PREAMP_MASK = 0x7e0, /* Port registers */ EDMA_CFG_OFS = 0, - EDMA_CFG_Q_DEPTH = 0, /* queueing disabled */ - EDMA_CFG_NCQ = (1 << 5), - EDMA_CFG_NCQ_GO_ON_ERR = (1 << 14), /* continue on error */ - EDMA_CFG_RD_BRST_EXT = (1 << 11), /* read burst 512B */ - EDMA_CFG_WR_BUFF_LEN = (1 << 13), /* write buffer 512B */ + EDMA_CFG_Q_DEPTH = 0x1f, /* max device queue depth */ + EDMA_CFG_NCQ = (1 << 5), /* for R/W FPDMA queued */ + EDMA_CFG_NCQ_GO_ON_ERR = (1 << 14), /* continue on error */ + EDMA_CFG_RD_BRST_EXT = (1 << 11), /* read burst 512B */ + EDMA_CFG_WR_BUFF_LEN = (1 << 13), /* write buffer 512B */ + EDMA_CFG_EDMA_FBS = (1 << 16), /* EDMA FIS-Based Switching */ + EDMA_CFG_FBS = (1 << 26), /* FIS-Based Switching */ EDMA_ERR_IRQ_CAUSE_OFS = 0x8, EDMA_ERR_IRQ_MASK_OFS = 0xc, @@ -244,14 +269,33 @@ enum { EDMA_ERR_CRPB_PAR = (1 << 10), /* CRPB parity error */ EDMA_ERR_INTRL_PAR = (1 << 11), /* internal parity error */ EDMA_ERR_IORDY = (1 << 12), /* IORdy timeout */ + EDMA_ERR_LNK_CTRL_RX = (0xf << 13), /* link ctrl rx error */ - EDMA_ERR_LNK_CTRL_RX_2 = (1 << 15), + EDMA_ERR_LNK_CTRL_RX_0 = (1 << 13), /* transient: CRC err */ + EDMA_ERR_LNK_CTRL_RX_1 = (1 << 14), /* transient: FIFO err */ + EDMA_ERR_LNK_CTRL_RX_2 = (1 << 15), /* fatal: caught SYNC */ + EDMA_ERR_LNK_CTRL_RX_3 = (1 << 16), /* transient: FIS rx err */ + EDMA_ERR_LNK_DATA_RX = (0xf << 17), /* link data rx error */ + EDMA_ERR_LNK_CTRL_TX = (0x1f << 21), /* link ctrl tx error */ + EDMA_ERR_LNK_CTRL_TX_0 = (1 << 21), /* transient: CRC err */ + EDMA_ERR_LNK_CTRL_TX_1 = (1 << 22), /* transient: FIFO err */ + EDMA_ERR_LNK_CTRL_TX_2 = (1 << 23), /* transient: caught SYNC */ + EDMA_ERR_LNK_CTRL_TX_3 = (1 << 24), /* transient: caught DMAT */ + EDMA_ERR_LNK_CTRL_TX_4 = (1 << 25), /* transient: FIS collision */ + EDMA_ERR_LNK_DATA_TX = (0x1f << 26), /* link data tx error */ + EDMA_ERR_TRANS_PROTO = (1 << 31), /* transport protocol error */ EDMA_ERR_OVERRUN_5 = (1 << 5), EDMA_ERR_UNDERRUN_5 = (1 << 6), + + EDMA_ERR_IRQ_TRANSIENT = EDMA_ERR_LNK_CTRL_RX_0 | + EDMA_ERR_LNK_CTRL_RX_1 | + EDMA_ERR_LNK_CTRL_RX_3 | + EDMA_ERR_LNK_CTRL_TX, + EDMA_EH_FREEZE = EDMA_ERR_D_PAR | EDMA_ERR_PRD_PAR | EDMA_ERR_DEV_DCON | @@ -266,6 +310,7 @@ enum { EDMA_ERR_LNK_DATA_RX | EDMA_ERR_LNK_DATA_TX | EDMA_ERR_TRANS_PROTO, + EDMA_EH_FREEZE_5 = EDMA_ERR_D_PAR | EDMA_ERR_PRD_PAR | EDMA_ERR_DEV_DCON | @@ -292,10 +337,18 @@ enum { EDMA_CMD_OFS = 0x28, /* EDMA command register */ EDMA_EN = (1 << 0), /* enable EDMA */ EDMA_DS = (1 << 1), /* disable EDMA; self-negated */ - ATA_RST = (1 << 2), /* reset trans/link/phy */ + EDMA_RESET = (1 << 2), /* reset eng/trans/link/phy */ + + EDMA_STATUS_OFS = 0x30, /* EDMA engine status */ + EDMA_STATUS_CACHE_EMPTY = (1 << 6), /* GenIIe command cache empty */ + EDMA_STATUS_IDLE = (1 << 7), /* GenIIe EDMA enabled/idle */ - EDMA_IORDY_TMOUT = 0x34, - EDMA_ARB_CFG = 0x38, + EDMA_IORDY_TMOUT_OFS = 0x34, + EDMA_ARB_CFG_OFS = 0x38, + + EDMA_HALTCOND_OFS = 0x60, /* GenIIe halt conditions */ + + GEN_II_NCQ_MAX_SECTORS = 256, /* max sects/io on Gen2 w/NCQ */ /* Host private flags (hp_flags) */ MV_HP_FLAG_MSI = (1 << 0), @@ -303,20 +356,25 @@ enum { MV_HP_ERRATA_50XXB2 = (1 << 2), MV_HP_ERRATA_60X1B2 = (1 << 3), MV_HP_ERRATA_60X1C0 = (1 << 4), - MV_HP_ERRATA_XX42A0 = (1 << 5), MV_HP_GEN_I = (1 << 6), /* Generation I: 50xx */ MV_HP_GEN_II = (1 << 7), /* Generation II: 60xx */ MV_HP_GEN_IIE = (1 << 8), /* Generation IIE: 6042/7042 */ MV_HP_PCIE = (1 << 9), /* PCIe bus/regs: 7042 */ + MV_HP_CUT_THROUGH = (1 << 10), /* can use EDMA cut-through */ + MV_HP_FLAG_SOC = (1 << 11), /* SystemOnChip, no PCI */ /* Port private flags (pp_flags) */ MV_PP_FLAG_EDMA_EN = (1 << 0), /* is EDMA engine enabled? */ - MV_PP_FLAG_HAD_A_RESET = (1 << 2), /* 1st hard reset complete? */ + MV_PP_FLAG_NCQ_EN = (1 << 1), /* is EDMA set up for NCQ? */ + MV_PP_FLAG_FBS_EN = (1 << 2), /* is EDMA set up for FBS? */ + MV_PP_FLAG_DELAYED_EH = (1 << 3), /* delayed dev err handling */ }; #define IS_GEN_I(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_I) #define IS_GEN_II(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_II) #define IS_GEN_IIE(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_IIE) +#define IS_PCIE(hpriv) ((hpriv)->hp_flags & MV_HP_PCIE) +#define IS_SOC(hpriv) ((hpriv)->hp_flags & MV_HP_FLAG_SOC) enum { /* DMA boundary 0xffff is required by the s/g splitting @@ -341,6 +399,7 @@ enum chip_type { chip_608x, chip_6042, chip_7042, + chip_soc, }; /* Command ReQuest Block: 32B */ @@ -379,13 +438,14 @@ struct mv_port_priv { dma_addr_t crqb_dma; struct mv_crpb *crpb; dma_addr_t crpb_dma; - struct mv_sg *sg_tbl; - dma_addr_t sg_tbl_dma; + struct mv_sg *sg_tbl[MV_MAX_Q_DEPTH]; + dma_addr_t sg_tbl_dma[MV_MAX_Q_DEPTH]; unsigned int req_idx; unsigned int resp_idx; u32 pp_flags; + unsigned int delayed_eh_pmp_map; }; struct mv_port_signal { @@ -395,11 +455,24 @@ struct mv_port_signal { struct mv_host_priv { u32 hp_flags; + u32 main_irq_mask; struct mv_port_signal signal[8]; const struct mv_hw_ops *ops; + int n_ports; + void __iomem *base; + void __iomem *main_irq_cause_addr; + void __iomem *main_irq_mask_addr; u32 irq_cause_ofs; u32 irq_mask_ofs; u32 unmask_all_irqs; + /* + * These consistent DMA memory pools give us guaranteed + * alignment for hardware-accessed data structures, + * and less memory waste in accomplishing the alignment. + */ + struct dma_pool *crqb_pool; + struct dma_pool *crpb_pool; + struct dma_pool *sg_tbl_pool; }; struct mv_hw_ops { @@ -411,24 +484,24 @@ struct mv_hw_ops { int (*reset_hc)(struct mv_host_priv *hpriv, void __iomem *mmio, unsigned int n_hc); void (*reset_flash)(struct mv_host_priv *hpriv, void __iomem *mmio); - void (*reset_bus)(struct pci_dev *pdev, void __iomem *mmio); + void (*reset_bus)(struct ata_host *host, void __iomem *mmio); }; -static void mv_irq_clear(struct ata_port *ap); static int mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val); static int mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); static int mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val); static int mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); static int mv_port_start(struct ata_port *ap); static void mv_port_stop(struct ata_port *ap); +static int mv_qc_defer(struct ata_queued_cmd *qc); static void mv_qc_prep(struct ata_queued_cmd *qc); static void mv_qc_prep_iie(struct ata_queued_cmd *qc); static unsigned int mv_qc_issue(struct ata_queued_cmd *qc); -static void mv_error_handler(struct ata_port *ap); -static void mv_post_int_cmd(struct ata_queued_cmd *qc); +static int mv_hardreset(struct ata_link *link, unsigned int *class, + unsigned long deadline); static void mv_eh_freeze(struct ata_port *ap); static void mv_eh_thaw(struct ata_port *ap); -static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); +static void mv6_dev_config(struct ata_device *dev); static void mv5_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio, unsigned int port); @@ -438,7 +511,7 @@ static void mv5_read_preamp(struct mv_host_priv *hpriv, int idx, static int mv5_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio, unsigned int n_hc); static void mv5_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio); -static void mv5_reset_bus(struct pci_dev *pdev, void __iomem *mmio); +static void mv5_reset_bus(struct ata_host *host, void __iomem *mmio); static void mv6_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio, unsigned int port); @@ -448,66 +521,61 @@ static void mv6_read_preamp(struct mv_host_priv *hpriv, int idx, static int mv6_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio, unsigned int n_hc); static void mv6_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio); -static void mv_reset_pci_bus(struct pci_dev *pdev, void __iomem *mmio); -static void mv_channel_reset(struct mv_host_priv *hpriv, void __iomem *mmio, +static void mv_soc_enable_leds(struct mv_host_priv *hpriv, + void __iomem *mmio); +static void mv_soc_read_preamp(struct mv_host_priv *hpriv, int idx, + void __iomem *mmio); +static int mv_soc_reset_hc(struct mv_host_priv *hpriv, + void __iomem *mmio, unsigned int n_hc); +static void mv_soc_reset_flash(struct mv_host_priv *hpriv, + void __iomem *mmio); +static void mv_soc_reset_bus(struct ata_host *host, void __iomem *mmio); + +static void mv_reset_pci_bus(struct ata_host *host, void __iomem *mmio); +static void mv_reset_channel(struct mv_host_priv *hpriv, void __iomem *mmio, unsigned int port_no); - +static int mv_stop_edma(struct ata_port *ap); +static int mv_stop_edma_engine(void __iomem *port_mmio); +static void mv_edma_cfg(struct ata_port *ap, int want_ncq); + +static void mv_pmp_select(struct ata_port *ap, int pmp); +static int mv_pmp_hardreset(struct ata_link *link, unsigned int *class, + unsigned long deadline); +static int mv_softreset(struct ata_link *link, unsigned int *class, + unsigned long deadline); +static void mv_pmp_error_handler(struct ata_port *ap); +static void mv_process_crpb_entries(struct ata_port *ap, + struct mv_port_priv *pp); + +/* .sg_tablesize is (MV_MAX_SG_CT / 2) in the structures below + * because we have to allow room for worst case splitting of + * PRDs for 64K boundaries in mv_fill_sg(). + */ static struct scsi_host_template mv5_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, + ATA_BASE_SHT(DRV_NAME), .sg_tablesize = MV_MAX_SG_CT / 2, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = 1, - .proc_name = DRV_NAME, .dma_boundary = MV_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, }; static struct scsi_host_template mv6_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, + ATA_NCQ_SHT(DRV_NAME), + .can_queue = MV_MAX_Q_DEPTH - 1, .sg_tablesize = MV_MAX_SG_CT / 2, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = 1, - .proc_name = DRV_NAME, .dma_boundary = MV_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, }; -static const struct ata_port_operations mv5_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .cable_detect = ata_cable_sata, +static struct ata_port_operations mv5_ops = { + .inherits = &ata_sff_port_ops, + .qc_defer = mv_qc_defer, .qc_prep = mv_qc_prep, .qc_issue = mv_qc_issue, - .data_xfer = ata_data_xfer, - - .irq_clear = mv_irq_clear, - .irq_on = ata_irq_on, - .error_handler = mv_error_handler, - .post_internal_cmd = mv_post_int_cmd, .freeze = mv_eh_freeze, .thaw = mv_eh_thaw, + .hardreset = mv_hardreset, + .error_handler = ata_std_error_handler, /* avoid SFF EH */ + .post_internal_cmd = ATA_OP_NULL, .scr_read = mv5_scr_read, .scr_write = mv5_scr_write, @@ -516,60 +584,22 @@ static const struct ata_port_operations mv5_ops = { .port_stop = mv_port_stop, }; -static const struct ata_port_operations mv6_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .cable_detect = ata_cable_sata, - - .qc_prep = mv_qc_prep, - .qc_issue = mv_qc_issue, - .data_xfer = ata_data_xfer, - - .irq_clear = mv_irq_clear, - .irq_on = ata_irq_on, - - .error_handler = mv_error_handler, - .post_internal_cmd = mv_post_int_cmd, - .freeze = mv_eh_freeze, - .thaw = mv_eh_thaw, - +static struct ata_port_operations mv6_ops = { + .inherits = &mv5_ops, + .dev_config = mv6_dev_config, .scr_read = mv_scr_read, .scr_write = mv_scr_write, - .port_start = mv_port_start, - .port_stop = mv_port_stop, + .pmp_hardreset = mv_pmp_hardreset, + .pmp_softreset = mv_softreset, + .softreset = mv_softreset, + .error_handler = mv_pmp_error_handler, }; -static const struct ata_port_operations mv_iie_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .cable_detect = ata_cable_sata, - +static struct ata_port_operations mv_iie_ops = { + .inherits = &mv6_ops, + .dev_config = ATA_OP_NULL, .qc_prep = mv_qc_prep_iie, - .qc_issue = mv_qc_issue, - .data_xfer = ata_data_xfer, - - .irq_clear = mv_irq_clear, - .irq_on = ata_irq_on, - - .error_handler = mv_error_handler, - .post_internal_cmd = mv_post_int_cmd, - .freeze = mv_eh_freeze, - .thaw = mv_eh_thaw, - - .scr_read = mv_scr_read, - .scr_write = mv_scr_write, - - .port_start = mv_port_start, - .port_stop = mv_port_stop, }; static const struct ata_port_info mv_port_info[] = { @@ -592,26 +622,35 @@ static const struct ata_port_info mv_port_info[] = { .port_ops = &mv5_ops, }, { /* chip_604x */ - .flags = MV_COMMON_FLAGS | MV_6XXX_FLAGS, + .flags = MV_COMMON_FLAGS | MV_6XXX_FLAGS | + ATA_FLAG_PMP | ATA_FLAG_ACPI_SATA | + ATA_FLAG_NCQ, .pio_mask = 0x1f, /* pio0-4 */ .udma_mask = ATA_UDMA6, .port_ops = &mv6_ops, }, { /* chip_608x */ .flags = MV_COMMON_FLAGS | MV_6XXX_FLAGS | - MV_FLAG_DUAL_HC, + ATA_FLAG_PMP | ATA_FLAG_ACPI_SATA | + ATA_FLAG_NCQ | MV_FLAG_DUAL_HC, .pio_mask = 0x1f, /* pio0-4 */ .udma_mask = ATA_UDMA6, .port_ops = &mv6_ops, }, { /* chip_6042 */ - .flags = MV_COMMON_FLAGS | MV_6XXX_FLAGS, + .flags = MV_GENIIE_FLAGS, .pio_mask = 0x1f, /* pio0-4 */ .udma_mask = ATA_UDMA6, .port_ops = &mv_iie_ops, }, { /* chip_7042 */ - .flags = MV_COMMON_FLAGS | MV_6XXX_FLAGS, + .flags = MV_GENIIE_FLAGS, + .pio_mask = 0x1f, /* pio0-4 */ + .udma_mask = ATA_UDMA6, + .port_ops = &mv_iie_ops, + }, + { /* chip_soc */ + .flags = MV_GENIIE_FLAGS, .pio_mask = 0x1f, /* pio0-4 */ .udma_mask = ATA_UDMA6, .port_ops = &mv_iie_ops, @@ -648,13 +687,6 @@ static const struct pci_device_id mv_pci_tbl[] = { { } /* terminate list */ }; -static struct pci_driver mv_pci_driver = { - .name = DRV_NAME, - .id_table = mv_pci_tbl, - .probe = mv_init_one, - .remove = ata_pci_remove_one, -}; - static const struct mv_hw_ops mv5xxx_ops = { .phy_errata = mv5_phy_errata, .enable_leds = mv5_enable_leds, @@ -673,44 +705,14 @@ static const struct mv_hw_ops mv6xxx_ops = { .reset_bus = mv_reset_pci_bus, }; -/* - * module options - */ -static int msi; /* Use PCI msi; either zero (off, default) or non-zero */ - - -/* move to PCI layer or libata core? */ -static int pci_go_64(struct pci_dev *pdev) -{ - int rc; - - if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { - rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); - if (rc) { - rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); - if (rc) { - dev_printk(KERN_ERR, &pdev->dev, - "64-bit DMA enable failed\n"); - return rc; - } - } - } else { - rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); - if (rc) { - dev_printk(KERN_ERR, &pdev->dev, - "32-bit DMA enable failed\n"); - return rc; - } - rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); - if (rc) { - dev_printk(KERN_ERR, &pdev->dev, - "32-bit consistent DMA enable failed\n"); - return rc; - } - } - - return rc; -} +static const struct mv_hw_ops mv_soc_ops = { + .phy_errata = mv6_phy_errata, + .enable_leds = mv_soc_enable_leds, + .read_preamp = mv_soc_read_preamp, + .reset_hc = mv_soc_reset_hc, + .reset_flash = mv_soc_reset_flash, + .reset_bus = mv_soc_reset_bus, +}; /* * Functions @@ -722,11 +724,6 @@ static inline void writelfl(unsigned long data, void __iomem *addr) (void) readl(addr); /* flush to avoid PCI posted write */ } -static inline void __iomem *mv_hc_base(void __iomem *base, unsigned int hc) -{ - return (base + MV_SATAHC0_REG_BASE + (hc * MV_SATAHC_REG_SZ)); -} - static inline unsigned int mv_hc_from_port(unsigned int port) { return port >> MV_PORT_HC_SHIFT; @@ -737,6 +734,29 @@ static inline unsigned int mv_hardport_from_port(unsigned int port) return port & MV_PORT_MASK; } +/* + * Consolidate some rather tricky bit shift calculations. + * This is hot-path stuff, so not a function. + * Simple code, with two return values, so macro rather than inline. + * + * port is the sole input, in range 0..7. + * shift is one output, for use with main_irq_cause / main_irq_mask registers. + * hardport is the other output, in range 0..3. + * + * Note that port and hardport may be the same variable in some cases. + */ +#define MV_PORT_TO_SHIFT_AND_HARDPORT(port, shift, hardport) \ +{ \ + shift = mv_hc_from_port(port) * HC_SHIFT; \ + hardport = mv_hardport_from_port(port); \ + shift += hardport * 2; \ +} + +static inline void __iomem *mv_hc_base(void __iomem *base, unsigned int hc) +{ + return (base + MV_SATAHC0_REG_BASE + (hc * MV_SATAHC_REG_SZ)); +} + static inline void __iomem *mv_hc_base_from_port(void __iomem *base, unsigned int port) { @@ -750,18 +770,28 @@ static inline void __iomem *mv_port_base(void __iomem *base, unsigned int port) (mv_hardport_from_port(port) * MV_PORT_REG_SZ); } -static inline void __iomem *mv_ap_base(struct ata_port *ap) +static void __iomem *mv5_phy_base(void __iomem *mmio, unsigned int port) { - return mv_port_base(ap->host->iomap[MV_PRIMARY_BAR], ap->port_no); + void __iomem *hc_mmio = mv_hc_base_from_port(mmio, port); + unsigned long ofs = (mv_hardport_from_port(port) + 1) * 0x100UL; + + return hc_mmio + ofs; } -static inline int mv_get_hc_count(unsigned long port_flags) +static inline void __iomem *mv_host_base(struct ata_host *host) { - return ((port_flags & MV_FLAG_DUAL_HC) ? 2 : 1); + struct mv_host_priv *hpriv = host->private_data; + return hpriv->base; +} + +static inline void __iomem *mv_ap_base(struct ata_port *ap) +{ + return mv_port_base(mv_host_base(ap->host), ap->port_no); } -static void mv_irq_clear(struct ata_port *ap) +static inline int mv_get_hc_count(unsigned long port_flags) { + return ((port_flags & MV_FLAG_DUAL_HC) ? 2 : 1); } static void mv_set_edma_ptrs(void __iomem *port_mmio, @@ -773,37 +803,55 @@ static void mv_set_edma_ptrs(void __iomem *port_mmio, /* * initialize request queue */ - index = (pp->req_idx & MV_MAX_Q_DEPTH_MASK) << EDMA_REQ_Q_PTR_SHIFT; + pp->req_idx &= MV_MAX_Q_DEPTH_MASK; /* paranoia */ + index = pp->req_idx << EDMA_REQ_Q_PTR_SHIFT; WARN_ON(pp->crqb_dma & 0x3ff); writel((pp->crqb_dma >> 16) >> 16, port_mmio + EDMA_REQ_Q_BASE_HI_OFS); writelfl((pp->crqb_dma & EDMA_REQ_Q_BASE_LO_MASK) | index, port_mmio + EDMA_REQ_Q_IN_PTR_OFS); - - if (hpriv->hp_flags & MV_HP_ERRATA_XX42A0) - writelfl((pp->crqb_dma & 0xffffffff) | index, - port_mmio + EDMA_REQ_Q_OUT_PTR_OFS); - else - writelfl(index, port_mmio + EDMA_REQ_Q_OUT_PTR_OFS); + writelfl(index, port_mmio + EDMA_REQ_Q_OUT_PTR_OFS); /* * initialize response queue */ - index = (pp->resp_idx & MV_MAX_Q_DEPTH_MASK) << EDMA_RSP_Q_PTR_SHIFT; + pp->resp_idx &= MV_MAX_Q_DEPTH_MASK; /* paranoia */ + index = pp->resp_idx << EDMA_RSP_Q_PTR_SHIFT; WARN_ON(pp->crpb_dma & 0xff); writel((pp->crpb_dma >> 16) >> 16, port_mmio + EDMA_RSP_Q_BASE_HI_OFS); - - if (hpriv->hp_flags & MV_HP_ERRATA_XX42A0) - writelfl((pp->crpb_dma & 0xffffffff) | index, - port_mmio + EDMA_RSP_Q_IN_PTR_OFS); - else - writelfl(index, port_mmio + EDMA_RSP_Q_IN_PTR_OFS); - + writelfl(index, port_mmio + EDMA_RSP_Q_IN_PTR_OFS); writelfl((pp->crpb_dma & EDMA_RSP_Q_BASE_LO_MASK) | index, port_mmio + EDMA_RSP_Q_OUT_PTR_OFS); } +static void mv_set_main_irq_mask(struct ata_host *host, + u32 disable_bits, u32 enable_bits) +{ + struct mv_host_priv *hpriv = host->private_data; + u32 old_mask, new_mask; + + old_mask = hpriv->main_irq_mask; + new_mask = (old_mask & ~disable_bits) | enable_bits; + if (new_mask != old_mask) { + hpriv->main_irq_mask = new_mask; + writelfl(new_mask, hpriv->main_irq_mask_addr); + } +} + +static void mv_enable_port_irqs(struct ata_port *ap, + unsigned int port_bits) +{ + unsigned int shift, hardport, port = ap->port_no; + u32 disable_bits, enable_bits; + + MV_PORT_TO_SHIFT_AND_HARDPORT(port, shift, hardport); + + disable_bits = (DONE_IRQ | ERR_IRQ) << shift; + enable_bits = port_bits << shift; + mv_set_main_irq_mask(ap->host, disable_bits, enable_bits); +} + /** * mv_start_dma - Enable eDMA engine * @base: port base address @@ -815,74 +863,109 @@ static void mv_set_edma_ptrs(void __iomem *port_mmio, * LOCKING: * Inherited from caller. */ -static void mv_start_dma(void __iomem *base, struct mv_host_priv *hpriv, - struct mv_port_priv *pp) +static void mv_start_dma(struct ata_port *ap, void __iomem *port_mmio, + struct mv_port_priv *pp, u8 protocol) { + int want_ncq = (protocol == ATA_PROT_NCQ); + + if (pp->pp_flags & MV_PP_FLAG_EDMA_EN) { + int using_ncq = ((pp->pp_flags & MV_PP_FLAG_NCQ_EN) != 0); + if (want_ncq != using_ncq) + mv_stop_edma(ap); + } if (!(pp->pp_flags & MV_PP_FLAG_EDMA_EN)) { + struct mv_host_priv *hpriv = ap->host->private_data; + int hardport = mv_hardport_from_port(ap->port_no); + void __iomem *hc_mmio = mv_hc_base_from_port( + mv_host_base(ap->host), hardport); + u32 hc_irq_cause, ipending; + /* clear EDMA event indicators, if any */ - writelfl(0, base + EDMA_ERR_IRQ_CAUSE_OFS); + writelfl(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS); + + /* clear EDMA interrupt indicator, if any */ + hc_irq_cause = readl(hc_mmio + HC_IRQ_CAUSE_OFS); + ipending = (DEV_IRQ | DMA_IRQ) << hardport; + if (hc_irq_cause & ipending) { + writelfl(hc_irq_cause & ~ipending, + hc_mmio + HC_IRQ_CAUSE_OFS); + } + + mv_edma_cfg(ap, want_ncq); - mv_set_edma_ptrs(base, hpriv, pp); + /* clear FIS IRQ Cause */ + if (IS_GEN_IIE(hpriv)) + writelfl(0, port_mmio + SATA_FIS_IRQ_CAUSE_OFS); - writelfl(EDMA_EN, base + EDMA_CMD_OFS); + mv_set_edma_ptrs(port_mmio, hpriv, pp); + mv_enable_port_irqs(ap, DONE_IRQ|ERR_IRQ); + + writelfl(EDMA_EN, port_mmio + EDMA_CMD_OFS); pp->pp_flags |= MV_PP_FLAG_EDMA_EN; } - WARN_ON(!(EDMA_EN & readl(base + EDMA_CMD_OFS))); +} + +static void mv_wait_for_edma_empty_idle(struct ata_port *ap) +{ + void __iomem *port_mmio = mv_ap_base(ap); + const u32 empty_idle = (EDMA_STATUS_CACHE_EMPTY | EDMA_STATUS_IDLE); + const int per_loop = 5, timeout = (15 * 1000 / per_loop); + int i; + + /* + * Wait for the EDMA engine to finish transactions in progress. + * No idea what a good "timeout" value might be, but measurements + * indicate that it often requires hundreds of microseconds + * with two drives in-use. So we use the 15msec value above + * as a rough guess at what even more drives might require. + */ + for (i = 0; i < timeout; ++i) { + u32 edma_stat = readl(port_mmio + EDMA_STATUS_OFS); + if ((edma_stat & empty_idle) == empty_idle) + break; + udelay(per_loop); + } + /* ata_port_printk(ap, KERN_INFO, "%s: %u+ usecs\n", __func__, i); */ } /** - * __mv_stop_dma - Disable eDMA engine - * @ap: ATA channel to manipulate - * - * Verify the local cache of the eDMA state is accurate with a - * WARN_ON. + * mv_stop_edma_engine - Disable eDMA engine + * @port_mmio: io base address * * LOCKING: * Inherited from caller. */ -static int __mv_stop_dma(struct ata_port *ap) +static int mv_stop_edma_engine(void __iomem *port_mmio) { - void __iomem *port_mmio = mv_ap_base(ap); - struct mv_port_priv *pp = ap->private_data; - u32 reg; - int i, err = 0; + int i; - if (pp->pp_flags & MV_PP_FLAG_EDMA_EN) { - /* Disable EDMA if active. The disable bit auto clears. - */ - writelfl(EDMA_DS, port_mmio + EDMA_CMD_OFS); - pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN; - } else { - WARN_ON(EDMA_EN & readl(port_mmio + EDMA_CMD_OFS)); - } + /* Disable eDMA. The disable bit auto clears. */ + writelfl(EDMA_DS, port_mmio + EDMA_CMD_OFS); - /* now properly wait for the eDMA to stop */ - for (i = 1000; i > 0; i--) { - reg = readl(port_mmio + EDMA_CMD_OFS); + /* Wait for the chip to confirm eDMA is off. */ + for (i = 10000; i > 0; i--) { + u32 reg = readl(port_mmio + EDMA_CMD_OFS); if (!(reg & EDMA_EN)) - break; - - udelay(100); - } - - if (reg & EDMA_EN) { - ata_port_printk(ap, KERN_ERR, "Unable to stop eDMA\n"); - err = -EIO; + return 0; + udelay(10); } - - return err; + return -EIO; } -static int mv_stop_dma(struct ata_port *ap) +static int mv_stop_edma(struct ata_port *ap) { - unsigned long flags; - int rc; - - spin_lock_irqsave(&ap->host->lock, flags); - rc = __mv_stop_dma(ap); - spin_unlock_irqrestore(&ap->host->lock, flags); + void __iomem *port_mmio = mv_ap_base(ap); + struct mv_port_priv *pp = ap->private_data; - return rc; + if (!(pp->pp_flags & MV_PP_FLAG_EDMA_EN)) + return 0; + pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN; + mv_wait_for_edma_empty_idle(ap); + if (mv_stop_edma_engine(port_mmio)) { + ata_port_printk(ap, KERN_ERR, "Unable to stop eDMA\n"); + return -EIO; + } + return 0; } #ifdef ATA_DEBUG @@ -1003,38 +1086,205 @@ static int mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) return -EINVAL; } -static void mv_edma_cfg(struct ata_port *ap, struct mv_host_priv *hpriv, - void __iomem *port_mmio) +static void mv6_dev_config(struct ata_device *adev) +{ + /* + * Deal with Gen-II ("mv6") hardware quirks/restrictions: + * + * Gen-II does not support NCQ over a port multiplier + * (no FIS-based switching). + * + * We don't have hob_nsect when doing NCQ commands on Gen-II. + * See mv_qc_prep() for more info. + */ + if (adev->flags & ATA_DFLAG_NCQ) { + if (sata_pmp_attached(adev->link->ap)) { + adev->flags &= ~ATA_DFLAG_NCQ; + ata_dev_printk(adev, KERN_INFO, + "NCQ disabled for command-based switching\n"); + } else if (adev->max_sectors > GEN_II_NCQ_MAX_SECTORS) { + adev->max_sectors = GEN_II_NCQ_MAX_SECTORS; + ata_dev_printk(adev, KERN_INFO, + "max_sectors limited to %u for NCQ\n", + adev->max_sectors); + } + } +} + +static int mv_qc_defer(struct ata_queued_cmd *qc) +{ + struct ata_link *link = qc->dev->link; + struct ata_port *ap = link->ap; + struct mv_port_priv *pp = ap->private_data; + + /* + * Don't allow new commands if we're in a delayed EH state + * for NCQ and/or FIS-based switching. + */ + if (pp->pp_flags & MV_PP_FLAG_DELAYED_EH) + return ATA_DEFER_PORT; + /* + * If the port is completely idle, then allow the new qc. + */ + if (ap->nr_active_links == 0) + return 0; + + if (pp->pp_flags & MV_PP_FLAG_EDMA_EN) { + /* + * The port is operating in host queuing mode (EDMA). + * It can accomodate a new qc if the qc protocol + * is compatible with the current host queue mode. + */ + if (pp->pp_flags & MV_PP_FLAG_NCQ_EN) { + /* + * The host queue (EDMA) is in NCQ mode. + * If the new qc is also an NCQ command, + * then allow the new qc. + */ + if (qc->tf.protocol == ATA_PROT_NCQ) + return 0; + } else { + /* + * The host queue (EDMA) is in non-NCQ, DMA mode. + * If the new qc is also a non-NCQ, DMA command, + * then allow the new qc. + */ + if (qc->tf.protocol == ATA_PROT_DMA) + return 0; + } + } + return ATA_DEFER_PORT; +} + +static void mv_config_fbs(void __iomem *port_mmio, int want_ncq, int want_fbs) +{ + u32 new_fiscfg, old_fiscfg; + u32 new_ltmode, old_ltmode; + u32 new_haltcond, old_haltcond; + + old_fiscfg = readl(port_mmio + FISCFG_OFS); + old_ltmode = readl(port_mmio + LTMODE_OFS); + old_haltcond = readl(port_mmio + EDMA_HALTCOND_OFS); + + new_fiscfg = old_fiscfg & ~(FISCFG_SINGLE_SYNC | FISCFG_WAIT_DEV_ERR); + new_ltmode = old_ltmode & ~LTMODE_BIT8; + new_haltcond = old_haltcond | EDMA_ERR_DEV; + + if (want_fbs) { + new_fiscfg = old_fiscfg | FISCFG_SINGLE_SYNC; + new_ltmode = old_ltmode | LTMODE_BIT8; + if (want_ncq) + new_haltcond &= ~EDMA_ERR_DEV; + else + new_fiscfg |= FISCFG_WAIT_DEV_ERR; + } + + if (new_fiscfg != old_fiscfg) + writelfl(new_fiscfg, port_mmio + FISCFG_OFS); + if (new_ltmode != old_ltmode) + writelfl(new_ltmode, port_mmio + LTMODE_OFS); + if (new_haltcond != old_haltcond) + writelfl(new_haltcond, port_mmio + EDMA_HALTCOND_OFS); +} + +static void mv_60x1_errata_sata25(struct ata_port *ap, int want_ncq) +{ + struct mv_host_priv *hpriv = ap->host->private_data; + u32 old, new; + + /* workaround for 88SX60x1 FEr SATA#25 (part 1) */ + old = readl(hpriv->base + MV_GPIO_PORT_CTL_OFS); + if (want_ncq) + new = old | (1 << 22); + else + new = old & ~(1 << 22); + if (new != old) + writel(new, hpriv->base + MV_GPIO_PORT_CTL_OFS); +} + +static void mv_edma_cfg(struct ata_port *ap, int want_ncq) { - u32 cfg = readl(port_mmio + EDMA_CFG_OFS); + u32 cfg; + struct mv_port_priv *pp = ap->private_data; + struct mv_host_priv *hpriv = ap->host->private_data; + void __iomem *port_mmio = mv_ap_base(ap); /* set up non-NCQ EDMA configuration */ - cfg &= ~(1 << 9); /* disable eQue */ + cfg = EDMA_CFG_Q_DEPTH; /* always 0x1f for *all* chips */ + pp->pp_flags &= ~MV_PP_FLAG_FBS_EN; - if (IS_GEN_I(hpriv)) { - cfg &= ~0x1f; /* clear queue depth */ + if (IS_GEN_I(hpriv)) cfg |= (1 << 8); /* enab config burst size mask */ - } else if (IS_GEN_II(hpriv)) { - cfg &= ~0x1f; /* clear queue depth */ cfg |= EDMA_CFG_RD_BRST_EXT | EDMA_CFG_WR_BUFF_LEN; - cfg &= ~(EDMA_CFG_NCQ | EDMA_CFG_NCQ_GO_ON_ERR); /* clear NCQ */ - } + mv_60x1_errata_sata25(ap, want_ncq); + + } else if (IS_GEN_IIE(hpriv)) { + int want_fbs = sata_pmp_attached(ap); + /* + * Possible future enhancement: + * + * The chip can use FBS with non-NCQ, if we allow it, + * But first we need to have the error handling in place + * for this mode (datasheet section 7.3.15.4.2.3). + * So disallow non-NCQ FBS for now. + */ + want_fbs &= want_ncq; + + mv_config_fbs(port_mmio, want_ncq, want_fbs); + + if (want_fbs) { + pp->pp_flags |= MV_PP_FLAG_FBS_EN; + cfg |= EDMA_CFG_EDMA_FBS; /* FIS-based switching */ + } - else if (IS_GEN_IIE(hpriv)) { cfg |= (1 << 23); /* do not mask PM field in rx'd FIS */ cfg |= (1 << 22); /* enab 4-entry host queue cache */ - cfg &= ~(1 << 19); /* dis 128-entry queue (for now?) */ - cfg |= (1 << 18); /* enab early completion */ - cfg |= (1 << 17); /* enab cut-through (dis stor&forwrd) */ - cfg &= ~(1 << 16); /* dis FIS-based switching (for now) */ - cfg &= ~(EDMA_CFG_NCQ); /* clear NCQ */ + if (!IS_SOC(hpriv)) + cfg |= (1 << 18); /* enab early completion */ + if (hpriv->hp_flags & MV_HP_CUT_THROUGH) + cfg |= (1 << 17); /* enab cut-thru (dis stor&forwrd) */ } + if (want_ncq) { + cfg |= EDMA_CFG_NCQ; + pp->pp_flags |= MV_PP_FLAG_NCQ_EN; + } else + pp->pp_flags &= ~MV_PP_FLAG_NCQ_EN; + writelfl(cfg, port_mmio + EDMA_CFG_OFS); } +static void mv_port_free_dma_mem(struct ata_port *ap) +{ + struct mv_host_priv *hpriv = ap->host->private_data; + struct mv_port_priv *pp = ap->private_data; + int tag; + + if (pp->crqb) { + dma_pool_free(hpriv->crqb_pool, pp->crqb, pp->crqb_dma); + pp->crqb = NULL; + } + if (pp->crpb) { + dma_pool_free(hpriv->crpb_pool, pp->crpb, pp->crpb_dma); + pp->crpb = NULL; + } + /* + * For GEN_I, there's no NCQ, so we have only a single sg_tbl. + * For later hardware, we have one unique sg_tbl per NCQ tag. + */ + for (tag = 0; tag < MV_MAX_Q_DEPTH; ++tag) { + if (pp->sg_tbl[tag]) { + if (tag == 0 || !IS_GEN_I(hpriv)) + dma_pool_free(hpriv->sg_tbl_pool, + pp->sg_tbl[tag], + pp->sg_tbl_dma[tag]); + pp->sg_tbl[tag] = NULL; + } + } +} + /** * mv_port_start - Port specific init/start routine. * @ap: ATA channel to manipulate @@ -1050,62 +1300,47 @@ static int mv_port_start(struct ata_port *ap) struct device *dev = ap->host->dev; struct mv_host_priv *hpriv = ap->host->private_data; struct mv_port_priv *pp; - void __iomem *port_mmio = mv_ap_base(ap); - void *mem; - dma_addr_t mem_dma; - unsigned long flags; - int rc; + int tag, rc; pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL); if (!pp) return -ENOMEM; - - mem = dmam_alloc_coherent(dev, MV_PORT_PRIV_DMA_SZ, &mem_dma, - GFP_KERNEL); - if (!mem) - return -ENOMEM; - memset(mem, 0, MV_PORT_PRIV_DMA_SZ); + ap->private_data = pp; rc = ata_pad_alloc(ap, dev); if (rc) return rc; - /* First item in chunk of DMA memory: - * 32-slot command request table (CRQB), 32 bytes each in size - */ - pp->crqb = mem; - pp->crqb_dma = mem_dma; - mem += MV_CRQB_Q_SZ; - mem_dma += MV_CRQB_Q_SZ; - - /* Second item: - * 32-slot command response table (CRPB), 8 bytes each in size - */ - pp->crpb = mem; - pp->crpb_dma = mem_dma; - mem += MV_CRPB_Q_SZ; - mem_dma += MV_CRPB_Q_SZ; - - /* Third item: - * Table of scatter-gather descriptors (ePRD), 16 bytes each - */ - pp->sg_tbl = mem; - pp->sg_tbl_dma = mem_dma; - - spin_lock_irqsave(&ap->host->lock, flags); - - mv_edma_cfg(ap, hpriv, port_mmio); - - mv_set_edma_ptrs(port_mmio, hpriv, pp); + pp->crqb = dma_pool_alloc(hpriv->crqb_pool, GFP_KERNEL, &pp->crqb_dma); + if (!pp->crqb) + return -ENOMEM; + memset(pp->crqb, 0, MV_CRQB_Q_SZ); - spin_unlock_irqrestore(&ap->host->lock, flags); + pp->crpb = dma_pool_alloc(hpriv->crpb_pool, GFP_KERNEL, &pp->crpb_dma); + if (!pp->crpb) + goto out_port_free_dma_mem; + memset(pp->crpb, 0, MV_CRPB_Q_SZ); - /* Don't turn on EDMA here...do it before DMA commands only. Else - * we'll be unable to send non-data, PIO, etc due to restricted access - * to shadow regs. + /* + * For GEN_I, there's no NCQ, so we only allocate a single sg_tbl. + * For later hardware, we need one unique sg_tbl per NCQ tag. */ - ap->private_data = pp; + for (tag = 0; tag < MV_MAX_Q_DEPTH; ++tag) { + if (tag == 0 || !IS_GEN_I(hpriv)) { + pp->sg_tbl[tag] = dma_pool_alloc(hpriv->sg_tbl_pool, + GFP_KERNEL, &pp->sg_tbl_dma[tag]); + if (!pp->sg_tbl[tag]) + goto out_port_free_dma_mem; + } else { + pp->sg_tbl[tag] = pp->sg_tbl[0]; + pp->sg_tbl_dma[tag] = pp->sg_tbl_dma[0]; + } + } return 0; + +out_port_free_dma_mem: + mv_port_free_dma_mem(ap); + return -ENOMEM; } /** @@ -1119,7 +1354,9 @@ static int mv_port_start(struct ata_port *ap) */ static void mv_port_stop(struct ata_port *ap) { - mv_stop_dma(ap); + mv_stop_edma(ap); + mv_enable_port_irqs(ap, 0); + mv_port_free_dma_mem(ap); } /** @@ -1137,7 +1374,7 @@ static void mv_fill_sg(struct ata_queued_cmd *qc) struct scatterlist *sg; struct mv_sg *mv_sg, *last_sg = NULL; - mv_sg = pp->sg_tbl; + mv_sg = pp->sg_tbl[qc->tag]; ata_for_each_sg(sg, qc) { dma_addr_t addr = sg_dma_address(sg); u32 sg_len = sg_dma_len(sg); @@ -1193,7 +1430,8 @@ static void mv_qc_prep(struct ata_queued_cmd *qc) u16 flags = 0; unsigned in_index; - if (qc->tf.protocol != ATA_PROT_DMA) + if ((qc->tf.protocol != ATA_PROT_DMA) && + (qc->tf.protocol != ATA_PROT_NCQ)) return; /* Fill in command request block @@ -1202,15 +1440,15 @@ static void mv_qc_prep(struct ata_queued_cmd *qc) flags |= CRQB_FLAG_READ; WARN_ON(MV_MAX_Q_DEPTH <= qc->tag); flags |= qc->tag << CRQB_TAG_SHIFT; - flags |= qc->tag << CRQB_IOID_SHIFT; /* 50xx appears to ignore this*/ + flags |= (qc->dev->link->pmp & 0xf) << CRQB_PMP_SHIFT; /* get current queue index from software */ - in_index = pp->req_idx & MV_MAX_Q_DEPTH_MASK; + in_index = pp->req_idx; pp->crqb[in_index].sg_addr = - cpu_to_le32(pp->sg_tbl_dma & 0xffffffff); + cpu_to_le32(pp->sg_tbl_dma[qc->tag] & 0xffffffff); pp->crqb[in_index].sg_addr_hi = - cpu_to_le32((pp->sg_tbl_dma >> 16) >> 16); + cpu_to_le32((pp->sg_tbl_dma[qc->tag] >> 16) >> 16); pp->crqb[in_index].ctrl_flags = cpu_to_le16(flags); cw = &pp->crqb[in_index].ata_cmd[0]; @@ -1230,13 +1468,11 @@ static void mv_qc_prep(struct ata_queued_cmd *qc) case ATA_CMD_WRITE_FUA_EXT: mv_crqb_pack_cmd(cw++, tf->hob_nsect, ATA_REG_NSECT, 0); break; -#ifdef LIBATA_NCQ /* FIXME: remove this line when NCQ added */ case ATA_CMD_FPDMA_READ: case ATA_CMD_FPDMA_WRITE: mv_crqb_pack_cmd(cw++, tf->hob_feature, ATA_REG_FEATURE, 0); mv_crqb_pack_cmd(cw++, tf->feature, ATA_REG_FEATURE, 0); break; -#endif /* FIXME: remove this line when NCQ added */ default: /* The only other commands EDMA supports in non-queued and * non-NCQ mode are: [RW] STREAM DMA and W DMA FUA EXT, none @@ -1285,25 +1521,25 @@ static void mv_qc_prep_iie(struct ata_queued_cmd *qc) unsigned in_index; u32 flags = 0; - if (qc->tf.protocol != ATA_PROT_DMA) + if ((qc->tf.protocol != ATA_PROT_DMA) && + (qc->tf.protocol != ATA_PROT_NCQ)) return; - /* Fill in Gen IIE command request block - */ + /* Fill in Gen IIE command request block */ if (!(qc->tf.flags & ATA_TFLAG_WRITE)) flags |= CRQB_FLAG_READ; WARN_ON(MV_MAX_Q_DEPTH <= qc->tag); flags |= qc->tag << CRQB_TAG_SHIFT; - flags |= qc->tag << CRQB_IOID_SHIFT; /* "I/O Id" is -really- - what we use as our tag */ + flags |= qc->tag << CRQB_HOSTQ_SHIFT; + flags |= (qc->dev->link->pmp & 0xf) << CRQB_PMP_SHIFT; /* get current queue index from software */ - in_index = pp->req_idx & MV_MAX_Q_DEPTH_MASK; + in_index = pp->req_idx; crqb = (struct mv_crqb_iie *) &pp->crqb[in_index]; - crqb->addr = cpu_to_le32(pp->sg_tbl_dma & 0xffffffff); - crqb->addr_hi = cpu_to_le32((pp->sg_tbl_dma >> 16) >> 16); + crqb->addr = cpu_to_le32(pp->sg_tbl_dma[qc->tag] & 0xffffffff); + crqb->addr_hi = cpu_to_le32((pp->sg_tbl_dma[qc->tag] >> 16) >> 16); crqb->flags = cpu_to_le32(flags); tf = &qc->tf; @@ -1350,29 +1586,25 @@ static unsigned int mv_qc_issue(struct ata_queued_cmd *qc) struct ata_port *ap = qc->ap; void __iomem *port_mmio = mv_ap_base(ap); struct mv_port_priv *pp = ap->private_data; - struct mv_host_priv *hpriv = ap->host->private_data; u32 in_index; - if (qc->tf.protocol != ATA_PROT_DMA) { - /* We're about to send a non-EDMA capable command to the + if ((qc->tf.protocol != ATA_PROT_DMA) && + (qc->tf.protocol != ATA_PROT_NCQ)) { + /* + * We're about to send a non-EDMA capable command to the * port. Turn off EDMA so there won't be problems accessing * shadow block, etc registers. */ - __mv_stop_dma(ap); - return ata_qc_issue_prot(qc); + mv_stop_edma(ap); + mv_enable_port_irqs(ap, ERR_IRQ); + mv_pmp_select(ap, qc->dev->link->pmp); + return ata_sff_qc_issue(qc); } - mv_start_dma(port_mmio, hpriv, pp); - - in_index = pp->req_idx & MV_MAX_Q_DEPTH_MASK; + mv_start_dma(ap, port_mmio, pp, qc->tf.protocol); - /* until we do queuing, the queue should be empty at this point */ - WARN_ON(in_index != ((readl(port_mmio + EDMA_REQ_Q_OUT_PTR_OFS) - >> EDMA_REQ_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK)); - - pp->req_idx++; - - in_index = (pp->req_idx & MV_MAX_Q_DEPTH_MASK) << EDMA_REQ_Q_PTR_SHIFT; + pp->req_idx = (pp->req_idx + 1) & MV_MAX_Q_DEPTH_MASK; + in_index = pp->req_idx << EDMA_REQ_Q_PTR_SHIFT; /* and write the request in pointer to kick the EDMA to life */ writelfl((pp->crqb_dma & EDMA_REQ_Q_BASE_LO_MASK) | in_index, @@ -1381,94 +1613,328 @@ static unsigned int mv_qc_issue(struct ata_queued_cmd *qc) return 0; } +static struct ata_queued_cmd *mv_get_active_qc(struct ata_port *ap) +{ + struct mv_port_priv *pp = ap->private_data; + struct ata_queued_cmd *qc; + + if (pp->pp_flags & MV_PP_FLAG_NCQ_EN) + return NULL; + qc = ata_qc_from_tag(ap, ap->link.active_tag); + if (qc && (qc->tf.flags & ATA_TFLAG_POLLING)) + qc = NULL; + return qc; +} + +static void mv_pmp_error_handler(struct ata_port *ap) +{ + unsigned int pmp, pmp_map; + struct mv_port_priv *pp = ap->private_data; + + if (pp->pp_flags & MV_PP_FLAG_DELAYED_EH) { + /* + * Perform NCQ error analysis on failed PMPs + * before we freeze the port entirely. + * + * The failed PMPs are marked earlier by mv_pmp_eh_prep(). + */ + pmp_map = pp->delayed_eh_pmp_map; + pp->pp_flags &= ~MV_PP_FLAG_DELAYED_EH; + for (pmp = 0; pmp_map != 0; pmp++) { + unsigned int this_pmp = (1 << pmp); + if (pmp_map & this_pmp) { + struct ata_link *link = &ap->pmp_link[pmp]; + pmp_map &= ~this_pmp; + ata_eh_analyze_ncq_error(link); + } + } + ata_port_freeze(ap); + } + sata_pmp_error_handler(ap); +} + +static unsigned int mv_get_err_pmp_map(struct ata_port *ap) +{ + void __iomem *port_mmio = mv_ap_base(ap); + + return readl(port_mmio + SATA_TESTCTL_OFS) >> 16; +} + +static void mv_pmp_eh_prep(struct ata_port *ap, unsigned int pmp_map) +{ + struct ata_eh_info *ehi; + unsigned int pmp; + + /* + * Initialize EH info for PMPs which saw device errors + */ + ehi = &ap->link.eh_info; + for (pmp = 0; pmp_map != 0; pmp++) { + unsigned int this_pmp = (1 << pmp); + if (pmp_map & this_pmp) { + struct ata_link *link = &ap->pmp_link[pmp]; + + pmp_map &= ~this_pmp; + ehi = &link->eh_info; + ata_ehi_clear_desc(ehi); + ata_ehi_push_desc(ehi, "dev err"); + ehi->err_mask |= AC_ERR_DEV; + ehi->action |= ATA_EH_RESET; + ata_link_abort(link); + } + } +} + +static int mv_req_q_empty(struct ata_port *ap) +{ + void __iomem *port_mmio = mv_ap_base(ap); + u32 in_ptr, out_ptr; + + in_ptr = (readl(port_mmio + EDMA_REQ_Q_IN_PTR_OFS) + >> EDMA_REQ_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK; + out_ptr = (readl(port_mmio + EDMA_REQ_Q_OUT_PTR_OFS) + >> EDMA_REQ_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK; + return (in_ptr == out_ptr); /* 1 == queue_is_empty */ +} + +static int mv_handle_fbs_ncq_dev_err(struct ata_port *ap) +{ + struct mv_port_priv *pp = ap->private_data; + int failed_links; + unsigned int old_map, new_map; + + /* + * Device error during FBS+NCQ operation: + * + * Set a port flag to prevent further I/O being enqueued. + * Leave the EDMA running to drain outstanding commands from this port. + * Perform the post-mortem/EH only when all responses are complete. + * Follow recovery sequence from 6042/7042 datasheet (7.3.15.4.2.2). + */ + if (!(pp->pp_flags & MV_PP_FLAG_DELAYED_EH)) { + pp->pp_flags |= MV_PP_FLAG_DELAYED_EH; + pp->delayed_eh_pmp_map = 0; + } + old_map = pp->delayed_eh_pmp_map; + new_map = old_map | mv_get_err_pmp_map(ap); + + if (old_map != new_map) { + pp->delayed_eh_pmp_map = new_map; + mv_pmp_eh_prep(ap, new_map & ~old_map); + } + failed_links = hweight16(new_map); + + ata_port_printk(ap, KERN_INFO, "%s: pmp_map=%04x qc_map=%04x " + "failed_links=%d nr_active_links=%d\n", + __func__, pp->delayed_eh_pmp_map, + ap->qc_active, failed_links, + ap->nr_active_links); + + if (ap->nr_active_links <= failed_links && mv_req_q_empty(ap)) { + mv_process_crpb_entries(ap, pp); + mv_stop_edma(ap); + mv_eh_freeze(ap); + ata_port_printk(ap, KERN_INFO, "%s: done\n", __func__); + return 1; /* handled */ + } + ata_port_printk(ap, KERN_INFO, "%s: waiting\n", __func__); + return 1; /* handled */ +} + +static int mv_handle_fbs_non_ncq_dev_err(struct ata_port *ap) +{ + /* + * Possible future enhancement: + * + * FBS+non-NCQ operation is not yet implemented. + * See related notes in mv_edma_cfg(). + * + * Device error during FBS+non-NCQ operation: + * + * We need to snapshot the shadow registers for each failed command. + * Follow recovery sequence from 6042/7042 datasheet (7.3.15.4.2.3). + */ + return 0; /* not handled */ +} + +static int mv_handle_dev_err(struct ata_port *ap, u32 edma_err_cause) +{ + struct mv_port_priv *pp = ap->private_data; + + if (!(pp->pp_flags & MV_PP_FLAG_EDMA_EN)) + return 0; /* EDMA was not active: not handled */ + if (!(pp->pp_flags & MV_PP_FLAG_FBS_EN)) + return 0; /* FBS was not active: not handled */ + + if (!(edma_err_cause & EDMA_ERR_DEV)) + return 0; /* non DEV error: not handled */ + edma_err_cause &= ~EDMA_ERR_IRQ_TRANSIENT; + if (edma_err_cause & ~(EDMA_ERR_DEV | EDMA_ERR_SELF_DIS)) + return 0; /* other problems: not handled */ + + if (pp->pp_flags & MV_PP_FLAG_NCQ_EN) { + /* + * EDMA should NOT have self-disabled for this case. + * If it did, then something is wrong elsewhere, + * and we cannot handle it here. + */ + if (edma_err_cause & EDMA_ERR_SELF_DIS) { + ata_port_printk(ap, KERN_WARNING, + "%s: err_cause=0x%x pp_flags=0x%x\n", + __func__, edma_err_cause, pp->pp_flags); + return 0; /* not handled */ + } + return mv_handle_fbs_ncq_dev_err(ap); + } else { + /* + * EDMA should have self-disabled for this case. + * If it did not, then something is wrong elsewhere, + * and we cannot handle it here. + */ + if (!(edma_err_cause & EDMA_ERR_SELF_DIS)) { + ata_port_printk(ap, KERN_WARNING, + "%s: err_cause=0x%x pp_flags=0x%x\n", + __func__, edma_err_cause, pp->pp_flags); + return 0; /* not handled */ + } + return mv_handle_fbs_non_ncq_dev_err(ap); + } + return 0; /* not handled */ +} + +static void mv_unexpected_intr(struct ata_port *ap, int edma_was_enabled) +{ + struct ata_eh_info *ehi = &ap->link.eh_info; + char *when = "idle"; + + ata_ehi_clear_desc(ehi); + if (!ap || (ap->flags & ATA_FLAG_DISABLED)) { + when = "disabled"; + } else if (edma_was_enabled) { + when = "EDMA enabled"; + } else { + struct ata_queued_cmd *qc = ata_qc_from_tag(ap, ap->link.active_tag); + if (qc && (qc->tf.flags & ATA_TFLAG_POLLING)) + when = "polling"; + } + ata_ehi_push_desc(ehi, "unexpected device interrupt while %s", when); + ehi->err_mask |= AC_ERR_OTHER; + ehi->action |= ATA_EH_RESET; + ata_port_freeze(ap); +} + /** * mv_err_intr - Handle error interrupts on the port * @ap: ATA channel to manipulate - * @reset_allowed: bool: 0 == don't trigger from reset here + * @qc: affected command (non-NCQ), or NULL * - * In most cases, just clear the interrupt and move on. However, - * some cases require an eDMA reset, which is done right before - * the COMRESET in mv_phy_reset(). The SERR case requires a - * clear of pending errors in the SATA SERROR register. Finally, - * if the port disabled DMA, update our cached copy to match. + * Most cases require a full reset of the chip's state machine, + * which also performs a COMRESET. + * Also, if the port disabled DMA, update our cached copy to match. * * LOCKING: * Inherited from caller. */ -static void mv_err_intr(struct ata_port *ap, struct ata_queued_cmd *qc) +static void mv_err_intr(struct ata_port *ap) { void __iomem *port_mmio = mv_ap_base(ap); u32 edma_err_cause, eh_freeze_mask, serr = 0; + u32 fis_cause = 0; struct mv_port_priv *pp = ap->private_data; struct mv_host_priv *hpriv = ap->host->private_data; - unsigned int edma_enabled = (pp->pp_flags & MV_PP_FLAG_EDMA_EN); unsigned int action = 0, err_mask = 0; struct ata_eh_info *ehi = &ap->link.eh_info; + struct ata_queued_cmd *qc; + int abort = 0; - ata_ehi_clear_desc(ehi); - - if (!edma_enabled) { - /* just a guess: do we need to do this? should we - * expand this, and do it in all cases? - */ - sata_scr_read(&ap->link, SCR_ERROR, &serr); - sata_scr_write_flush(&ap->link, SCR_ERROR, serr); - } + /* + * Read and clear the SError and err_cause bits. + * For GenIIe, if EDMA_ERR_TRANS_IRQ_7 is set, we also must read/clear + * the FIS_IRQ_CAUSE register before clearing edma_err_cause. + */ + sata_scr_read(&ap->link, SCR_ERROR, &serr); + sata_scr_write_flush(&ap->link, SCR_ERROR, serr); edma_err_cause = readl(port_mmio + EDMA_ERR_IRQ_CAUSE_OFS); + if (IS_GEN_IIE(hpriv) && (edma_err_cause & EDMA_ERR_TRANS_IRQ_7)) { + fis_cause = readl(port_mmio + SATA_FIS_IRQ_CAUSE_OFS); + writelfl(~fis_cause, port_mmio + SATA_FIS_IRQ_CAUSE_OFS); + } + writelfl(~edma_err_cause, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS); - ata_ehi_push_desc(ehi, "edma_err 0x%08x", edma_err_cause); + if (edma_err_cause & EDMA_ERR_DEV) { + /* + * Device errors during FIS-based switching operation + * require special handling. + */ + if (mv_handle_dev_err(ap, edma_err_cause)) + return; + } + qc = mv_get_active_qc(ap); + ata_ehi_clear_desc(ehi); + ata_ehi_push_desc(ehi, "edma_err_cause=%08x pp_flags=%08x", + edma_err_cause, pp->pp_flags); + + if (IS_GEN_IIE(hpriv) && (edma_err_cause & EDMA_ERR_TRANS_IRQ_7)) { + ata_ehi_push_desc(ehi, "fis_cause=%08x", fis_cause); + if (fis_cause & SATA_FIS_IRQ_AN) { + u32 ec = edma_err_cause & + ~(EDMA_ERR_TRANS_IRQ_7 | EDMA_ERR_IRQ_TRANSIENT); + sata_async_notification(ap); + if (!ec) + return; /* Just an AN; no need for the nukes */ + ata_ehi_push_desc(ehi, "SDB notify"); + } + } /* - * all generations share these EDMA error cause bits + * All generations share these EDMA error cause bits: */ - - if (edma_err_cause & EDMA_ERR_DEV) + if (edma_err_cause & EDMA_ERR_DEV) { err_mask |= AC_ERR_DEV; + action |= ATA_EH_RESET; + ata_ehi_push_desc(ehi, "dev error"); + } if (edma_err_cause & (EDMA_ERR_D_PAR | EDMA_ERR_PRD_PAR | EDMA_ERR_CRQB_PAR | EDMA_ERR_CRPB_PAR | EDMA_ERR_INTRL_PAR)) { err_mask |= AC_ERR_ATA_BUS; - action |= ATA_EH_HARDRESET; + action |= ATA_EH_RESET; ata_ehi_push_desc(ehi, "parity error"); } if (edma_err_cause & (EDMA_ERR_DEV_DCON | EDMA_ERR_DEV_CON)) { ata_ehi_hotplugged(ehi); ata_ehi_push_desc(ehi, edma_err_cause & EDMA_ERR_DEV_DCON ? "dev disconnect" : "dev connect"); + action |= ATA_EH_RESET; } + /* + * Gen-I has a different SELF_DIS bit, + * different FREEZE bits, and no SERR bit: + */ if (IS_GEN_I(hpriv)) { eh_freeze_mask = EDMA_EH_FREEZE_5; - if (edma_err_cause & EDMA_ERR_SELF_DIS_5) { - struct mv_port_priv *pp = ap->private_data; pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN; ata_ehi_push_desc(ehi, "EDMA self-disable"); } } else { eh_freeze_mask = EDMA_EH_FREEZE; - if (edma_err_cause & EDMA_ERR_SELF_DIS) { - struct mv_port_priv *pp = ap->private_data; pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN; ata_ehi_push_desc(ehi, "EDMA self-disable"); } - if (edma_err_cause & EDMA_ERR_SERR) { - sata_scr_read(&ap->link, SCR_ERROR, &serr); - sata_scr_write_flush(&ap->link, SCR_ERROR, serr); - err_mask = AC_ERR_ATA_BUS; - action |= ATA_EH_HARDRESET; + ata_ehi_push_desc(ehi, "SError=%08x", serr); + err_mask |= AC_ERR_ATA_BUS; + action |= ATA_EH_RESET; } } - /* Clear EDMA now that SERR cleanup done */ - writelfl(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS); - if (!err_mask) { err_mask = AC_ERR_OTHER; - action |= ATA_EH_HARDRESET; + action |= ATA_EH_RESET; } ehi->serror |= serr; @@ -1479,183 +1945,207 @@ static void mv_err_intr(struct ata_port *ap, struct ata_queued_cmd *qc) else ehi->err_mask |= err_mask; - if (edma_err_cause & eh_freeze_mask) + if (err_mask == AC_ERR_DEV) { + /* + * Cannot do ata_port_freeze() here, + * because it would kill PIO access, + * which is needed for further diagnosis. + */ + mv_eh_freeze(ap); + abort = 1; + } else if (edma_err_cause & eh_freeze_mask) { + /* + * Note to self: ata_port_freeze() calls ata_port_abort() + */ ata_port_freeze(ap); - else - ata_port_abort(ap); + } else { + abort = 1; + } + + if (abort) { + if (qc) + ata_link_abort(qc->dev->link); + else + ata_port_abort(ap); + } } -static void mv_intr_pio(struct ata_port *ap) +static void mv_process_crpb_response(struct ata_port *ap, + struct mv_crpb *response, unsigned int tag, int ncq_enabled) { - struct ata_queued_cmd *qc; - u8 ata_status; - - /* ignore spurious intr if drive still BUSY */ - ata_status = readb(ap->ioaddr.status_addr); - if (unlikely(ata_status & ATA_BUSY)) - return; + struct ata_queued_cmd *qc = ata_qc_from_tag(ap, tag); - /* get active ATA command */ - qc = ata_qc_from_tag(ap, ap->link.active_tag); - if (unlikely(!qc)) /* no active tag */ - return; - if (qc->tf.flags & ATA_TFLAG_POLLING) /* polling; we don't own qc */ - return; - - /* and finally, complete the ATA command */ - qc->err_mask |= ac_err_mask(ata_status); - ata_qc_complete(qc); + if (qc) { + u8 ata_status; + u16 edma_status = le16_to_cpu(response->flags); + /* + * edma_status from a response queue entry: + * LSB is from EDMA_ERR_IRQ_CAUSE_OFS (non-NCQ only). + * MSB is saved ATA status from command completion. + */ + if (!ncq_enabled) { + u8 err_cause = edma_status & 0xff & ~EDMA_ERR_DEV; + if (err_cause) { + /* + * Error will be seen/handled by mv_err_intr(). + * So do nothing at all here. + */ + return; + } + } + ata_status = edma_status >> CRPB_FLAG_STATUS_SHIFT; + if (!ac_err_mask(ata_status)) + ata_qc_complete(qc); + /* else: leave it for mv_err_intr() */ + } else { + ata_port_printk(ap, KERN_ERR, "%s: no qc for tag=%d\n", + __func__, tag); + } } -static void mv_intr_edma(struct ata_port *ap) +static void mv_process_crpb_entries(struct ata_port *ap, struct mv_port_priv *pp) { void __iomem *port_mmio = mv_ap_base(ap); struct mv_host_priv *hpriv = ap->host->private_data; - struct mv_port_priv *pp = ap->private_data; - struct ata_queued_cmd *qc; - u32 out_index, in_index; - int work_done = 0; + u32 in_index; + bool work_done = false; + int ncq_enabled = (pp->pp_flags & MV_PP_FLAG_NCQ_EN); - /* get h/w response queue pointer */ + /* Get the hardware queue position index */ in_index = (readl(port_mmio + EDMA_RSP_Q_IN_PTR_OFS) >> EDMA_RSP_Q_PTR_SHIFT) & MV_MAX_Q_DEPTH_MASK; - while (1) { - u16 status; + /* Process new responses from since the last time we looked */ + while (in_index != pp->resp_idx) { unsigned int tag; + struct mv_crpb *response = &pp->crpb[pp->resp_idx]; - /* get s/w response queue last-read pointer, and compare */ - out_index = pp->resp_idx & MV_MAX_Q_DEPTH_MASK; - if (in_index == out_index) - break; + pp->resp_idx = (pp->resp_idx + 1) & MV_MAX_Q_DEPTH_MASK; - /* 50xx: get active ATA command */ - if (IS_GEN_I(hpriv)) + if (IS_GEN_I(hpriv)) { + /* 50xx: no NCQ, only one command active at a time */ tag = ap->link.active_tag; - - /* Gen II/IIE: get active ATA command via tag, to enable - * support for queueing. this works transparently for - * queued and non-queued modes. - */ - else if (IS_GEN_II(hpriv)) - tag = (le16_to_cpu(pp->crpb[out_index].id) - >> CRPB_IOID_SHIFT_6) & 0x3f; - - else /* IS_GEN_IIE */ - tag = (le16_to_cpu(pp->crpb[out_index].id) - >> CRPB_IOID_SHIFT_7) & 0x3f; - - qc = ata_qc_from_tag(ap, tag); - - /* lower 8 bits of status are EDMA_ERR_IRQ_CAUSE_OFS - * bits (WARNING: might not necessarily be associated - * with this command), which -should- be clear - * if all is well - */ - status = le16_to_cpu(pp->crpb[out_index].flags); - if (unlikely(status & 0xff)) { - mv_err_intr(ap, qc); - return; - } - - /* and finally, complete the ATA command */ - if (qc) { - qc->err_mask |= - ac_err_mask(status >> CRPB_FLAG_STATUS_SHIFT); - ata_qc_complete(qc); + } else { + /* Gen II/IIE: get command tag from CRPB entry */ + tag = le16_to_cpu(response->id) & 0x1f; } - - /* advance software response queue pointer, to - * indicate (after the loop completes) to hardware - * that we have consumed a response queue entry. - */ - work_done = 1; - pp->resp_idx++; + mv_process_crpb_response(ap, response, tag, ncq_enabled); + work_done = true; } + /* Update the software queue position index in hardware */ if (work_done) writelfl((pp->crpb_dma & EDMA_RSP_Q_BASE_LO_MASK) | - (out_index << EDMA_RSP_Q_PTR_SHIFT), + (pp->resp_idx << EDMA_RSP_Q_PTR_SHIFT), port_mmio + EDMA_RSP_Q_OUT_PTR_OFS); } +static void mv_port_intr(struct ata_port *ap, u32 port_cause) +{ + struct mv_port_priv *pp; + int edma_was_enabled; + + if (!ap || (ap->flags & ATA_FLAG_DISABLED)) { + mv_unexpected_intr(ap, 0); + return; + } + /* + * Grab a snapshot of the EDMA_EN flag setting, + * so that we have a consistent view for this port, + * even if something we call of our routines changes it. + */ + pp = ap->private_data; + edma_was_enabled = (pp->pp_flags & MV_PP_FLAG_EDMA_EN); + /* + * Process completed CRPB response(s) before other events. + */ + if (edma_was_enabled && (port_cause & DONE_IRQ)) { + mv_process_crpb_entries(ap, pp); + if (pp->pp_flags & MV_PP_FLAG_DELAYED_EH) + mv_handle_fbs_ncq_dev_err(ap); + } + /* + * Handle chip-reported errors, or continue on to handle PIO. + */ + if (unlikely(port_cause & ERR_IRQ)) { + mv_err_intr(ap); + } else if (!edma_was_enabled) { + struct ata_queued_cmd *qc = mv_get_active_qc(ap); + if (qc) + ata_sff_host_intr(ap, qc); + else + mv_unexpected_intr(ap, edma_was_enabled); + } +} + /** * mv_host_intr - Handle all interrupts on the given host controller * @host: host specific structure - * @relevant: port error bits relevant to this host controller - * @hc: which host controller we're to look at - * - * Read then write clear the HC interrupt status then walk each - * port connected to the HC and see if it needs servicing. Port - * success ints are reported in the HC interrupt status reg, the - * port error ints are reported in the higher level main - * interrupt status register and thus are passed in via the - * 'relevant' argument. + * @main_irq_cause: Main interrupt cause register for the chip. * * LOCKING: * Inherited from caller. */ -static void mv_host_intr(struct ata_host *host, u32 relevant, unsigned int hc) +static int mv_host_intr(struct ata_host *host, u32 main_irq_cause) { - void __iomem *mmio = host->iomap[MV_PRIMARY_BAR]; - void __iomem *hc_mmio = mv_hc_base(mmio, hc); - u32 hc_irq_cause; - int port, port0; - - if (hc == 0) - port0 = 0; - else - port0 = MV_PORTS_PER_HC; - - /* we'll need the HC success int register in most cases */ - hc_irq_cause = readl(hc_mmio + HC_IRQ_CAUSE_OFS); - if (!hc_irq_cause) - return; - - writelfl(~hc_irq_cause, hc_mmio + HC_IRQ_CAUSE_OFS); - - VPRINTK("ENTER, hc%u relevant=0x%08x HC IRQ cause=0x%08x\n", - hc, relevant, hc_irq_cause); + struct mv_host_priv *hpriv = host->private_data; + void __iomem *mmio = hpriv->base, *hc_mmio; + unsigned int handled = 0, port; - for (port = port0; port < port0 + MV_PORTS_PER_HC; port++) { + for (port = 0; port < hpriv->n_ports; port++) { struct ata_port *ap = host->ports[port]; - struct mv_port_priv *pp = ap->private_data; - int have_err_bits, hard_port, shift; - - if ((!ap) || (ap->flags & ATA_FLAG_DISABLED)) - continue; - - shift = port << 1; /* (port * 2) */ - if (port >= MV_PORTS_PER_HC) { - shift++; /* skip bit 8 in the HC Main IRQ reg */ - } - have_err_bits = ((PORT0_ERR << shift) & relevant); - - if (unlikely(have_err_bits)) { - struct ata_queued_cmd *qc; + unsigned int p, shift, hardport, port_cause; - qc = ata_qc_from_tag(ap, ap->link.active_tag); - if (qc && (qc->tf.flags & ATA_TFLAG_POLLING)) + MV_PORT_TO_SHIFT_AND_HARDPORT(port, shift, hardport); + /* + * Each hc within the host has its own hc_irq_cause register, + * where the interrupting ports bits get ack'd. + */ + if (hardport == 0) { /* first port on this hc ? */ + u32 hc_cause = (main_irq_cause >> shift) & HC0_IRQ_PEND; + u32 port_mask, ack_irqs; + /* + * Skip this entire hc if nothing pending for any ports + */ + if (!hc_cause) { + port += MV_PORTS_PER_HC - 1; continue; - - mv_err_intr(ap, qc); - continue; - } - - hard_port = mv_hardport_from_port(port); /* range 0..3 */ - - if (pp->pp_flags & MV_PP_FLAG_EDMA_EN) { - if ((CRPB_DMA_DONE << hard_port) & hc_irq_cause) - mv_intr_edma(ap); - } else { - if ((DEV_IRQ << hard_port) & hc_irq_cause) - mv_intr_pio(ap); + } + /* + * We don't need/want to read the hc_irq_cause register, + * because doing so hurts performance, and + * main_irq_cause already gives us everything we need. + * + * But we do have to *write* to the hc_irq_cause to ack + * the ports that we are handling this time through. + * + * This requires that we create a bitmap for those + * ports which interrupted us, and use that bitmap + * to ack (only) those ports via hc_irq_cause. + */ + ack_irqs = 0; + for (p = 0; p < MV_PORTS_PER_HC; ++p) { + if ((port + p) >= hpriv->n_ports) + break; + port_mask = (DONE_IRQ | ERR_IRQ) << (p * 2); + if (hc_cause & port_mask) + ack_irqs |= (DMA_IRQ | DEV_IRQ) << p; + } + hc_mmio = mv_hc_base_from_port(mmio, port); + writelfl(~ack_irqs, hc_mmio + HC_IRQ_CAUSE_OFS); + handled = 1; } + /* + * Handle interrupts signalled for this port: + */ + port_cause = (main_irq_cause >> shift) & (DONE_IRQ | ERR_IRQ); + if (port_cause) + mv_port_intr(ap, port_cause); } - VPRINTK("EXIT\n"); + return handled; } -static void mv_pci_error(struct ata_host *host, void __iomem *mmio) +static int mv_pci_error(struct ata_host *host, void __iomem *mmio) { struct mv_host_priv *hpriv = host->private_data; struct ata_port *ap; @@ -1683,7 +2173,7 @@ static void mv_pci_error(struct ata_host *host, void __iomem *mmio) ata_ehi_push_desc(ehi, "PCI err cause 0x%08x", err_cause); err_mask = AC_ERR_HOST_BUS; - ehi->action = ATA_EH_HARDRESET; + ehi->action = ATA_EH_RESET; qc = ata_qc_from_tag(ap, ap->link.active_tag); if (qc) qc->err_mask |= err_mask; @@ -1693,6 +2183,7 @@ static void mv_pci_error(struct ata_host *host, void __iomem *mmio) ata_port_freeze(ap); } } + return 1; /* handled */ } /** @@ -1709,52 +2200,31 @@ static void mv_pci_error(struct ata_host *host, void __iomem *mmio) * This routine holds the host lock while processing pending * interrupts. */ -static irqreturn_t mv_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs) +static irqreturn_t mv_interrupt(int irq, void *dev_instance, + struct pt_regs *regs) { struct ata_host *host = dev_instance; - unsigned int hc, handled = 0, n_hcs; - void __iomem *mmio = host->iomap[MV_PRIMARY_BAR]; - u32 irq_stat; - - irq_stat = readl(mmio + HC_MAIN_IRQ_CAUSE_OFS); - - /* check the cases where we either have nothing pending or have read - * a bogus register value which can indicate HW removal or PCI fault - */ - if (!irq_stat || (0xffffffffU == irq_stat)) - return IRQ_NONE; + struct mv_host_priv *hpriv = host->private_data; + unsigned int handled = 0; + u32 main_irq_cause, pending_irqs; - n_hcs = mv_get_hc_count(host->ports[0]->flags); spin_lock(&host->lock); - - if (unlikely(irq_stat & PCI_ERR)) { - mv_pci_error(host, mmio); - handled = 1; - goto out_unlock; /* skip all other HC irq handling */ - } - - for (hc = 0; hc < n_hcs; hc++) { - u32 relevant = irq_stat & (HC0_IRQ_PEND << (hc * HC_SHIFT)); - if (relevant) { - mv_host_intr(host, relevant, hc); - handled = 1; - } + main_irq_cause = readl(hpriv->main_irq_cause_addr); + pending_irqs = main_irq_cause & hpriv->main_irq_mask; + /* + * Deal with cases where we either have nothing pending, or have read + * a bogus register value which can indicate HW removal or PCI fault. + */ + if (pending_irqs && main_irq_cause != 0xffffffffU) { + if (unlikely((pending_irqs & PCI_ERR) && !IS_SOC(hpriv))) + handled = mv_pci_error(host, hpriv->base); + else + handled = mv_host_intr(host, pending_irqs); } - -out_unlock: spin_unlock(&host->lock); - return IRQ_RETVAL(handled); } -static void __iomem *mv5_phy_base(void __iomem *mmio, unsigned int port) -{ - void __iomem *hc_mmio = mv_hc_base_from_port(mmio, port); - unsigned long ofs = (mv_hardport_from_port(port) + 1) * 0x100UL; - - return hc_mmio + ofs; -} - static unsigned int mv5_scr_offset(unsigned int sc_reg_in) { unsigned int ofs; @@ -1774,7 +2244,8 @@ static unsigned int mv5_scr_offset(unsigned int sc_reg_in) static int mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val) { - void __iomem *mmio = ap->host->iomap[MV_PRIMARY_BAR]; + struct mv_host_priv *hpriv = ap->host->private_data; + void __iomem *mmio = hpriv->base; void __iomem *addr = mv5_phy_base(mmio, ap->port_no); unsigned int ofs = mv5_scr_offset(sc_reg_in); @@ -1787,7 +2258,8 @@ static int mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val) static int mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) { - void __iomem *mmio = ap->host->iomap[MV_PRIMARY_BAR]; + struct mv_host_priv *hpriv = ap->host->private_data; + void __iomem *mmio = hpriv->base; void __iomem *addr = mv5_phy_base(mmio, ap->port_no); unsigned int ofs = mv5_scr_offset(sc_reg_in); @@ -1798,13 +2270,12 @@ static int mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) return -EINVAL; } -static void mv5_reset_bus(struct pci_dev *pdev, void __iomem *mmio) +static void mv5_reset_bus(struct ata_host *host, void __iomem *mmio) { + struct pci_dev *pdev = to_pci_dev(host->dev); int early_5080; - u8 revision; - pci_read_config_byte(pdev, PCI_REVISION_ID, &revision); - early_5080 = (pdev->device == 0x5080) && (revision == 0); + early_5080 = (pdev->device == 0x5080) && (pdev->revision == 0); if (!early_5080) { u32 tmp = readl(mmio + MV_PCI_EXP_ROM_BAR_CTL); @@ -1812,12 +2283,12 @@ static void mv5_reset_bus(struct pci_dev *pdev, void __iomem *mmio) writel(tmp, mmio + MV_PCI_EXP_ROM_BAR_CTL); } - mv_reset_pci_bus(pdev, mmio); + mv_reset_pci_bus(host, mmio); } static void mv5_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio) { - writel(0x0fcfffff, mmio + MV_FLASH_CTL); + writel(0x0fcfffff, mmio + MV_FLASH_CTL_OFS); } static void mv5_read_preamp(struct mv_host_priv *hpriv, int idx, @@ -1836,7 +2307,7 @@ static void mv5_enable_leds(struct mv_host_priv *hpriv, void __iomem *mmio) { u32 tmp; - writel(0, mmio + MV_GPIO_PORT_CTL); + writel(0, mmio + MV_GPIO_PORT_CTL_OFS); /* FIXME: handle MV_HP_ERRATA_50XXB2 errata */ @@ -1854,14 +2325,14 @@ static void mv5_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio, int fix_apm_sq = (hpriv->hp_flags & MV_HP_ERRATA_50XXB0); if (fix_apm_sq) { - tmp = readl(phy_mmio + MV5_LT_MODE); + tmp = readl(phy_mmio + MV5_LTMODE_OFS); tmp |= (1 << 19); - writel(tmp, phy_mmio + MV5_LT_MODE); + writel(tmp, phy_mmio + MV5_LTMODE_OFS); - tmp = readl(phy_mmio + MV5_PHY_CTL); + tmp = readl(phy_mmio + MV5_PHY_CTL_OFS); tmp &= ~0x3; tmp |= 0x1; - writel(tmp, phy_mmio + MV5_PHY_CTL); + writel(tmp, phy_mmio + MV5_PHY_CTL_OFS); } tmp = readl(phy_mmio + MV5_PHY_MODE); @@ -1879,9 +2350,7 @@ static void mv5_reset_hc_port(struct mv_host_priv *hpriv, void __iomem *mmio, { void __iomem *port_mmio = mv_port_base(mmio, port); - writelfl(EDMA_DS, port_mmio + EDMA_CMD_OFS); - - mv_channel_reset(hpriv, mmio, port); + mv_reset_channel(hpriv, mmio, port); ZERO(0x028); /* command */ writel(0x11f, port_mmio + EDMA_CFG_OFS); @@ -1895,7 +2364,7 @@ static void mv5_reset_hc_port(struct mv_host_priv *hpriv, void __iomem *mmio, ZERO(0x024); /* respq outp */ ZERO(0x020); /* respq inp */ ZERO(0x02c); /* test control */ - writel(0xbc, port_mmio + EDMA_IORDY_TMOUT); + writel(0xbc, port_mmio + EDMA_IORDY_TMOUT_OFS); } #undef ZERO @@ -1936,20 +2405,18 @@ static int mv5_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio, #undef ZERO #define ZERO(reg) writel(0, mmio + (reg)) -static void mv_reset_pci_bus(struct pci_dev *pdev, void __iomem *mmio) +static void mv_reset_pci_bus(struct ata_host *host, void __iomem *mmio) { - struct ata_host *host = dev_get_drvdata(&pdev->dev); struct mv_host_priv *hpriv = host->private_data; u32 tmp; - tmp = readl(mmio + MV_PCI_MODE); + tmp = readl(mmio + MV_PCI_MODE_OFS); tmp &= 0xff00ffff; - writel(tmp, mmio + MV_PCI_MODE); + writel(tmp, mmio + MV_PCI_MODE_OFS); ZERO(MV_PCI_DISC_TIMER); ZERO(MV_PCI_MSI_TRIGGER); - writel(0x000100ff, mmio + MV_PCI_XBAR_TMOUT); - ZERO(HC_MAIN_IRQ_MASK_OFS); + writel(0x000100ff, mmio + MV_PCI_XBAR_TMOUT_OFS); ZERO(MV_PCI_SERR_MASK); ZERO(hpriv->irq_cause_ofs); ZERO(hpriv->irq_mask_ofs); @@ -1966,10 +2433,10 @@ static void mv6_reset_flash(struct mv_host_priv *hpriv, void __iomem *mmio) mv5_reset_flash(hpriv, mmio); - tmp = readl(mmio + MV_GPIO_PORT_CTL); + tmp = readl(mmio + MV_GPIO_PORT_CTL_OFS); tmp &= 0x3; tmp |= (1 << 5) | (1 << 6); - writel(tmp, mmio + MV_GPIO_PORT_CTL); + writel(tmp, mmio + MV_GPIO_PORT_CTL_OFS); } /** @@ -2042,7 +2509,7 @@ static void mv6_read_preamp(struct mv_host_priv *hpriv, int idx, void __iomem *port_mmio; u32 tmp; - tmp = readl(mmio + MV_RESET_CFG); + tmp = readl(mmio + MV_RESET_CFG_OFS); if ((tmp & (1 << 0)) == 0) { hpriv->signal[idx].amps = 0x7 << 8; hpriv->signal[idx].pre = 0x1 << 5; @@ -2058,7 +2525,7 @@ static void mv6_read_preamp(struct mv_host_priv *hpriv, int idx, static void mv6_enable_leds(struct mv_host_priv *hpriv, void __iomem *mmio) { - writel(0x00000060, mmio + MV_GPIO_PORT_CTL); + writel(0x00000060, mmio + MV_GPIO_PORT_CTL_OFS); } static void mv6_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio, @@ -2071,7 +2538,7 @@ static void mv6_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio, hp_flags & (MV_HP_ERRATA_60X1B2 | MV_HP_ERRATA_60X1C0); int fix_phy_mode4 = hp_flags & (MV_HP_ERRATA_60X1B2 | MV_HP_ERRATA_60X1C0); - u32 m2, tmp; + u32 m2, m3; if (fix_phy_mode2) { m2 = readl(port_mmio + PHY_MODE2); @@ -2088,27 +2555,36 @@ static void mv6_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio, udelay(200); } - /* who knows what this magic does */ - tmp = readl(port_mmio + PHY_MODE3); - tmp &= ~0x7F800000; - tmp |= 0x2A800000; - writel(tmp, port_mmio + PHY_MODE3); - - if (fix_phy_mode4) { - u32 m4; - - m4 = readl(port_mmio + PHY_MODE4); - - if (hp_flags & MV_HP_ERRATA_60X1B2) - tmp = readl(port_mmio + 0x310); + /* + * Gen-II/IIe PHY_MODE3 errata RM#2: + * Achieves better receiver noise performance than the h/w default: + */ + m3 = readl(port_mmio + PHY_MODE3); + m3 = (m3 & 0x1f) | (0x5555601 << 5); - m4 = (m4 & ~(1 << 1)) | (1 << 0); + /* Guideline 88F5182 (GL# SATA-S11) */ + if (IS_SOC(hpriv)) + m3 &= ~0x1c; + if (fix_phy_mode4) { + u32 m4 = readl(port_mmio + PHY_MODE4); + /* + * Enforce reserved-bit restrictions on GenIIe devices only. + * For earlier chipsets, force only the internal config field + * (workaround for errata FEr SATA#10 part 1). + */ + if (IS_GEN_IIE(hpriv)) + m4 = (m4 & ~PHY_MODE4_RSVD_ZEROS) | PHY_MODE4_RSVD_ONES; + else + m4 = (m4 & ~PHY_MODE4_CFG_MASK) | PHY_MODE4_CFG_VALUE; writel(m4, port_mmio + PHY_MODE4); - - if (hp_flags & MV_HP_ERRATA_60X1B2) - writel(tmp, port_mmio + 0x310); } + /* + * Workaround for 60x1-B2 errata SATA#13: + * Any write to PHY_MODE4 (above) may corrupt PHY_MODE3, + * so we must always rewrite PHY_MODE3 after PHY_MODE4. + */ + writel(m3, port_mmio + PHY_MODE3); /* Revert values of pre-emphasis and signal amps to the saved ones */ m2 = readl(port_mmio + PHY_MODE2); @@ -2127,265 +2603,221 @@ static void mv6_phy_errata(struct mv_host_priv *hpriv, void __iomem *mmio, writel(m2, port_mmio + PHY_MODE2); } -static void mv_channel_reset(struct mv_host_priv *hpriv, void __iomem *mmio, - unsigned int port_no) +/* TODO: use the generic LED interface to configure the SATA Presence */ +/* & Acitivy LEDs on the board */ +static void mv_soc_enable_leds(struct mv_host_priv *hpriv, + void __iomem *mmio) { - void __iomem *port_mmio = mv_port_base(mmio, port_no); - - writelfl(ATA_RST, port_mmio + EDMA_CMD_OFS); - - if (IS_GEN_II(hpriv)) { - u32 ifctl = readl(port_mmio + SATA_INTERFACE_CTL); - ifctl |= (1 << 7); /* enable gen2i speed */ - ifctl = (ifctl & 0xfff) | 0x9b1000; /* from chip spec */ - writelfl(ifctl, port_mmio + SATA_INTERFACE_CTL); - } - - udelay(25); /* allow reset propagation */ - - /* Spec never mentions clearing the bit. Marvell's driver does - * clear the bit, however. - */ - writelfl(0, port_mmio + EDMA_CMD_OFS); - - hpriv->ops->phy_errata(hpriv, mmio, port_no); - - if (IS_GEN_I(hpriv)) - mdelay(1); + return; } -/** - * mv_phy_reset - Perform eDMA reset followed by COMRESET - * @ap: ATA channel to manipulate - * - * Part of this is taken from __sata_phy_reset and modified to - * not sleep since this routine gets called from interrupt level. - * - * LOCKING: - * Inherited from caller. This is coded to safe to call at - * interrupt level, i.e. it does not sleep. - */ -static void mv_phy_reset(struct ata_port *ap, unsigned int *class, - unsigned long deadline) +static void mv_soc_read_preamp(struct mv_host_priv *hpriv, int idx, + void __iomem *mmio) { - struct mv_port_priv *pp = ap->private_data; - struct mv_host_priv *hpriv = ap->host->private_data; - void __iomem *port_mmio = mv_ap_base(ap); - int retry = 5; - u32 sstatus; - - VPRINTK("ENTER, port %u, mmio 0x%p\n", ap->port_no, port_mmio); - -#ifdef DEBUG - { - u32 sstatus, serror, scontrol; - - mv_scr_read(ap, SCR_STATUS, &sstatus); - mv_scr_read(ap, SCR_ERROR, &serror); - mv_scr_read(ap, SCR_CONTROL, &scontrol); - DPRINTK("S-regs after ATA_RST: SStat 0x%08x SErr 0x%08x " - "SCtrl 0x%08x\n", sstatus, serror, scontrol); - } -#endif + void __iomem *port_mmio; + u32 tmp; - /* Issue COMRESET via SControl */ -comreset_retry: - sata_scr_write_flush(&ap->link, SCR_CONTROL, 0x301); - msleep(1); + port_mmio = mv_port_base(mmio, idx); + tmp = readl(port_mmio + PHY_MODE2); - sata_scr_write_flush(&ap->link, SCR_CONTROL, 0x300); - msleep(20); + hpriv->signal[idx].amps = tmp & 0x700; /* bits 10:8 */ + hpriv->signal[idx].pre = tmp & 0xe0; /* bits 7:5 */ +} - do { - sata_scr_read(&ap->link, SCR_STATUS, &sstatus); - if (((sstatus & 0x3) == 3) || ((sstatus & 0x3) == 0)) - break; +#undef ZERO +#define ZERO(reg) writel(0, port_mmio + (reg)) +static void mv_soc_reset_hc_port(struct mv_host_priv *hpriv, + void __iomem *mmio, unsigned int port) +{ + void __iomem *port_mmio = mv_port_base(mmio, port); - msleep(1); - } while (time_before(jiffies, deadline)); + mv_reset_channel(hpriv, mmio, port); - /* work around errata */ - if (IS_GEN_II(hpriv) && - (sstatus != 0x0) && (sstatus != 0x113) && (sstatus != 0x123) && - (retry-- > 0)) - goto comreset_retry; + ZERO(0x028); /* command */ + writel(0x101f, port_mmio + EDMA_CFG_OFS); + ZERO(0x004); /* timer */ + ZERO(0x008); /* irq err cause */ + ZERO(0x00c); /* irq err mask */ + ZERO(0x010); /* rq bah */ + ZERO(0x014); /* rq inp */ + ZERO(0x018); /* rq outp */ + ZERO(0x01c); /* respq bah */ + ZERO(0x024); /* respq outp */ + ZERO(0x020); /* respq inp */ + ZERO(0x02c); /* test control */ + writel(0xbc, port_mmio + EDMA_IORDY_TMOUT_OFS); +} -#ifdef DEBUG - { - u32 sstatus, serror, scontrol; +#undef ZERO - mv_scr_read(ap, SCR_STATUS, &sstatus); - mv_scr_read(ap, SCR_ERROR, &serror); - mv_scr_read(ap, SCR_CONTROL, &scontrol); - DPRINTK("S-regs after PHY wake: SStat 0x%08x SErr 0x%08x " - "SCtrl 0x%08x\n", sstatus, serror, scontrol); - } -#endif +#define ZERO(reg) writel(0, hc_mmio + (reg)) +static void mv_soc_reset_one_hc(struct mv_host_priv *hpriv, + void __iomem *mmio) +{ + void __iomem *hc_mmio = mv_hc_base(mmio, 0); - if (ata_link_offline(&ap->link)) { - *class = ATA_DEV_NONE; - return; - } + ZERO(0x00c); + ZERO(0x010); + ZERO(0x014); - /* even after SStatus reflects that device is ready, - * it seems to take a while for link to be fully - * established (and thus Status no longer 0x80/0x7F), - * so we poll a bit for that, here. - */ - retry = 20; - while (1) { - u8 drv_stat = ata_check_status(ap); - if ((drv_stat != 0x80) && (drv_stat != 0x7f)) - break; - msleep(500); - if (retry-- <= 0) - break; - if (time_after(jiffies, deadline)) - break; - } +} - /* FIXME: if we passed the deadline, the following - * code probably produces an invalid result - */ +#undef ZERO - /* finally, read device signature from TF registers */ - *class = ata_dev_try_classify(ap->link.device, 1, NULL); +static int mv_soc_reset_hc(struct mv_host_priv *hpriv, + void __iomem *mmio, unsigned int n_hc) +{ + unsigned int port; - writelfl(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS); + for (port = 0; port < hpriv->n_ports; port++) + mv_soc_reset_hc_port(hpriv, mmio, port); - WARN_ON(pp->pp_flags & MV_PP_FLAG_EDMA_EN); + mv_soc_reset_one_hc(hpriv, mmio); - VPRINTK("EXIT\n"); + return 0; } -static int mv_prereset(struct ata_link *link, unsigned long deadline) +static void mv_soc_reset_flash(struct mv_host_priv *hpriv, + void __iomem *mmio) { - struct ata_port *ap = link->ap; - struct mv_port_priv *pp = ap->private_data; - struct ata_eh_context *ehc = &link->eh_context; - int rc; - - rc = mv_stop_dma(ap); - if (rc) - ehc->i.action |= ATA_EH_HARDRESET; - - if (!(pp->pp_flags & MV_PP_FLAG_HAD_A_RESET)) { - pp->pp_flags |= MV_PP_FLAG_HAD_A_RESET; - ehc->i.action |= ATA_EH_HARDRESET; - } + return; +} - /* if we're about to do hardreset, nothing more to do */ - if (ehc->i.action & ATA_EH_HARDRESET) - return 0; +static void mv_soc_reset_bus(struct ata_host *host, void __iomem *mmio) +{ + return; +} - if (ata_link_online(link)) - rc = ata_wait_ready(ap, deadline); - else - rc = -ENODEV; +static void mv_setup_ifcfg(void __iomem *port_mmio, int want_gen2i) +{ + u32 ifcfg = readl(port_mmio + SATA_INTERFACE_CFG_OFS); - return rc; + ifcfg = (ifcfg & 0xf7f) | 0x9b1000; /* from chip spec */ + if (want_gen2i) + ifcfg |= (1 << 7); /* enable gen2i speed */ + writelfl(ifcfg, port_mmio + SATA_INTERFACE_CFG_OFS); } -static int mv_hardreset(struct ata_link *link, unsigned int *class, - unsigned long deadline) +static void mv_reset_channel(struct mv_host_priv *hpriv, void __iomem *mmio, + unsigned int port_no) { - struct ata_port *ap = link->ap; - struct mv_host_priv *hpriv = ap->host->private_data; - void __iomem *mmio = ap->host->iomap[MV_PRIMARY_BAR]; + void __iomem *port_mmio = mv_port_base(mmio, port_no); - mv_stop_dma(ap); + /* + * The datasheet warns against setting EDMA_RESET when EDMA is active + * (but doesn't say what the problem might be). So we first try + * to disable the EDMA engine before doing the EDMA_RESET operation. + */ + mv_stop_edma_engine(port_mmio); + writelfl(EDMA_RESET, port_mmio + EDMA_CMD_OFS); - mv_channel_reset(hpriv, mmio, ap->port_no); + if (!IS_GEN_I(hpriv)) { + /* Enable 3.0gb/s link speed: this survives EDMA_RESET */ + mv_setup_ifcfg(port_mmio, 1); + } + /* + * Strobing EDMA_RESET here causes a hard reset of the SATA transport, + * link, and physical layers. It resets all SATA interface registers + * (except for SATA_INTERFACE_CFG), and issues a COMRESET to the dev. + */ + writelfl(EDMA_RESET, port_mmio + EDMA_CMD_OFS); + udelay(25); /* allow reset propagation */ + writelfl(0, port_mmio + EDMA_CMD_OFS); - mv_phy_reset(ap, class, deadline); + hpriv->ops->phy_errata(hpriv, mmio, port_no); - return 0; + if (IS_GEN_I(hpriv)) + mdelay(1); } -static void mv_postreset(struct ata_link *link, unsigned int *classes) +static void mv_pmp_select(struct ata_port *ap, int pmp) { - struct ata_port *ap = link->ap; - u32 serr; + if (sata_pmp_supported(ap)) { + void __iomem *port_mmio = mv_ap_base(ap); + u32 reg = readl(port_mmio + SATA_IFCTL_OFS); + int old = reg & 0xf; - /* print link status */ - sata_print_link_status(link); - - /* clear SError */ - sata_scr_read(link, SCR_ERROR, &serr); - sata_scr_write_flush(link, SCR_ERROR, serr); - - /* bail out if no device is present */ - if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { - DPRINTK("EXIT, no device\n"); - return; + if (old != pmp) { + reg = (reg & ~0xf) | pmp; + writelfl(reg, port_mmio + SATA_IFCTL_OFS); + } } - - /* set up device control */ - iowrite8(ap->ctl, ap->ioaddr.ctl_addr); } -static void mv_error_handler(struct ata_port *ap) +static int mv_pmp_hardreset(struct ata_link *link, unsigned int *class, + unsigned long deadline) { - ata_do_eh(ap, mv_prereset, ata_std_softreset, - mv_hardreset, mv_postreset); + mv_pmp_select(link->ap, sata_srst_pmp(link)); + return sata_std_hardreset(link, class, deadline); } -static void mv_post_int_cmd(struct ata_queued_cmd *qc) +static int mv_softreset(struct ata_link *link, unsigned int *class, + unsigned long deadline) { - mv_stop_dma(qc->ap); + mv_pmp_select(link->ap, sata_srst_pmp(link)); + return ata_sff_softreset(link, class, deadline); } -static void mv_eh_freeze(struct ata_port *ap) +static int mv_hardreset(struct ata_link *link, unsigned int *class, + unsigned long deadline) { - void __iomem *mmio = ap->host->iomap[MV_PRIMARY_BAR]; - unsigned int hc = (ap->port_no > 3) ? 1 : 0; - u32 tmp, mask; - unsigned int shift; + struct ata_port *ap = link->ap; + struct mv_host_priv *hpriv = ap->host->private_data; + struct mv_port_priv *pp = ap->private_data; + void __iomem *mmio = hpriv->base; + int rc, attempts = 0, extra = 0; + u32 sstatus; + bool online; - /* FIXME: handle coalescing completion events properly */ + mv_reset_channel(hpriv, mmio, ap->port_no); + pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN; - shift = ap->port_no * 2; - if (hc > 0) - shift++; + /* Workaround for errata FEr SATA#10 (part 2) */ + do { + const unsigned long *timing = + sata_ehc_deb_timing(&link->eh_context); - mask = 0x3 << shift; + rc = sata_link_hardreset(link, timing, deadline + extra, + &online, NULL); + rc = online ? -EAGAIN : rc; + if (rc) + return rc; + sata_scr_read(link, SCR_STATUS, &sstatus); + if (!IS_GEN_I(hpriv) && ++attempts >= 5 && sstatus == 0x121) { + /* Force 1.5gb/s link speed and try again */ + mv_setup_ifcfg(mv_ap_base(ap), 0); + if (time_after(jiffies + HZ, deadline)) + extra = HZ; /* only extend it once, max */ + } + } while (sstatus != 0x0 && sstatus != 0x113 && sstatus != 0x123); - /* disable assertion of portN err, done events */ - tmp = readl(mmio + HC_MAIN_IRQ_MASK_OFS); - writelfl(tmp & ~mask, mmio + HC_MAIN_IRQ_MASK_OFS); + return rc; +} + +static void mv_eh_freeze(struct ata_port *ap) +{ + mv_stop_edma(ap); + mv_enable_port_irqs(ap, 0); } static void mv_eh_thaw(struct ata_port *ap) { - void __iomem *mmio = ap->host->iomap[MV_PRIMARY_BAR]; - unsigned int hc = (ap->port_no > 3) ? 1 : 0; - void __iomem *hc_mmio = mv_hc_base(mmio, hc); + struct mv_host_priv *hpriv = ap->host->private_data; + unsigned int port = ap->port_no; + unsigned int hardport = mv_hardport_from_port(port); + void __iomem *hc_mmio = mv_hc_base_from_port(hpriv->base, port); void __iomem *port_mmio = mv_ap_base(ap); - u32 tmp, mask, hc_irq_cause; - unsigned int shift, hc_port_no = ap->port_no; - - /* FIXME: handle coalescing completion events properly */ - - shift = ap->port_no * 2; - if (hc > 0) { - shift++; - hc_port_no -= 4; - } - - mask = 0x3 << shift; + u32 hc_irq_cause; /* clear EDMA errors on this port */ writel(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS); /* clear pending irq events */ hc_irq_cause = readl(hc_mmio + HC_IRQ_CAUSE_OFS); - hc_irq_cause &= ~(1 << hc_port_no); /* clear CRPB-done */ - hc_irq_cause &= ~(1 << (hc_port_no + 8)); /* clear Device int */ - writel(hc_irq_cause, hc_mmio + HC_IRQ_CAUSE_OFS); + hc_irq_cause &= ~((DEV_IRQ | DMA_IRQ) << hardport); + writelfl(hc_irq_cause, hc_mmio + HC_IRQ_CAUSE_OFS); - /* enable assertion of portN err, done events */ - tmp = readl(mmio + HC_MAIN_IRQ_MASK_OFS); - writelfl(tmp | mask, mmio + HC_MAIN_IRQ_MASK_OFS); + mv_enable_port_irqs(ap, ERR_IRQ); } /** @@ -2428,8 +2860,8 @@ static void mv_port_init(struct ata_ioports *port, void __iomem *port_mmio) writelfl(readl(port_mmio + serr_ofs), port_mmio + serr_ofs); writelfl(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS); - /* unmask all EDMA error interrupts */ - writelfl(~0, port_mmio + EDMA_ERR_IRQ_MASK_OFS); + /* unmask all non-transient EDMA error interrupts */ + writelfl(~EDMA_ERR_IRQ_TRANSIENT, port_mmio + EDMA_ERR_IRQ_MASK_OFS); VPRINTK("EDMA cfg=0x%08x EDMA IRQ err cause/mask=0x%08x/0x%08x\n", readl(port_mmio + EDMA_CFG_OFS), @@ -2437,21 +2869,46 @@ static void mv_port_init(struct ata_ioports *port, void __iomem *port_mmio) readl(port_mmio + EDMA_ERR_IRQ_MASK_OFS)); } +static unsigned int mv_in_pcix_mode(struct ata_host *host) +{ + struct mv_host_priv *hpriv = host->private_data; + void __iomem *mmio = hpriv->base; + u32 reg; + + if (IS_SOC(hpriv) || !IS_PCIE(hpriv)) + return 0; /* not PCI-X capable */ + reg = readl(mmio + MV_PCI_MODE_OFS); + if ((reg & MV_PCI_MODE_MASK) == 0) + return 0; /* conventional PCI mode */ + return 1; /* chip is in PCI-X mode */ +} + +static int mv_pci_cut_through_okay(struct ata_host *host) +{ + struct mv_host_priv *hpriv = host->private_data; + void __iomem *mmio = hpriv->base; + u32 reg; + + if (!mv_in_pcix_mode(host)) { + reg = readl(mmio + PCI_COMMAND_OFS); + if (reg & PCI_COMMAND_MRDTRIG) + return 0; /* not okay */ + } + return 1; /* okay */ +} + static int mv_chip_id(struct ata_host *host, unsigned int board_idx) { struct pci_dev *pdev = to_pci_dev(host->dev); struct mv_host_priv *hpriv = host->private_data; u32 hp_flags = hpriv->hp_flags; - u8 pdev_revision; - - pci_read_config_byte(pdev, PCI_REVISION_ID, &pdev_revision); switch (board_idx) { case chip_5080: hpriv->ops = &mv5xxx_ops; hp_flags |= MV_HP_GEN_I; - switch (pdev_revision) { + switch (pdev->revision) { case 0x1: hp_flags |= MV_HP_ERRATA_50XXB0; break; @@ -2471,7 +2928,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) hpriv->ops = &mv5xxx_ops; hp_flags |= MV_HP_GEN_I; - switch (pdev_revision) { + switch (pdev->revision) { case 0x0: hp_flags |= MV_HP_ERRATA_50XXB0; break; @@ -2491,7 +2948,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) hpriv->ops = &mv6xxx_ops; hp_flags |= MV_HP_GEN_II; - switch (pdev_revision) { + switch (pdev->revision) { case 0x7: hp_flags |= MV_HP_ERRATA_60X1B2; break; @@ -2507,7 +2964,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) break; case chip_7042: - hp_flags |= MV_HP_PCIE; + hp_flags |= MV_HP_PCIE | MV_HP_CUT_THROUGH; if (pdev->vendor == PCI_VENDOR_ID_TTI && (pdev->device == 0x2300 || pdev->device == 0x2310)) { @@ -2537,15 +2994,15 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) " and avoid the final two gigabytes on" " all RocketRAID BIOS initialized drives.\n"); } + /* drop through */ case chip_6042: hpriv->ops = &mv6xxx_ops; hp_flags |= MV_HP_GEN_IIE; + if (board_idx == chip_6042 && mv_pci_cut_through_okay(host)) + hp_flags |= MV_HP_CUT_THROUGH; - switch (pdev_revision) { - case 0x0: - hp_flags |= MV_HP_ERRATA_XX42A0; - break; - case 0x1: + switch (pdev->revision) { + case 0x2: /* Rev.B0: the first/only public release */ hp_flags |= MV_HP_ERRATA_60X1C0; break; default: @@ -2555,9 +3012,13 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) break; } break; + case chip_soc: + hpriv->ops = &mv_soc_ops; + hp_flags |= MV_HP_FLAG_SOC | MV_HP_ERRATA_60X1C0; + break; default: - dev_printk(KERN_ERR, &pdev->dev, + dev_printk(KERN_ERR, host->dev, "BUG: invalid board index %u\n", board_idx); return 1; } @@ -2590,17 +3051,24 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) static int mv_init_host(struct ata_host *host, unsigned int board_idx) { int rc = 0, n_hc, port, hc; - struct pci_dev *pdev = to_pci_dev(host->dev); - void __iomem *mmio = host->iomap[MV_PRIMARY_BAR]; struct mv_host_priv *hpriv = host->private_data; - - /* global interrupt mask */ - writel(0, mmio + HC_MAIN_IRQ_MASK_OFS); + void __iomem *mmio = hpriv->base; rc = mv_chip_id(host, board_idx); if (rc) goto done; + if (IS_SOC(hpriv)) { + hpriv->main_irq_cause_addr = mmio + SOC_HC_MAIN_IRQ_CAUSE_OFS; + hpriv->main_irq_mask_addr = mmio + SOC_HC_MAIN_IRQ_MASK_OFS; + } else { + hpriv->main_irq_cause_addr = mmio + PCI_HC_MAIN_IRQ_CAUSE_OFS; + hpriv->main_irq_mask_addr = mmio + PCI_HC_MAIN_IRQ_MASK_OFS; + } + + /* global interrupt mask: 0 == mask everything */ + mv_set_main_irq_mask(host, ~0, 0); + n_hc = mv_get_hc_count(host->ports[0]->flags); for (port = 0; port < host->n_ports; port++) @@ -2611,31 +3079,22 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx) goto done; hpriv->ops->reset_flash(hpriv, mmio); - hpriv->ops->reset_bus(pdev, mmio); + hpriv->ops->reset_bus(host, mmio); hpriv->ops->enable_leds(hpriv, mmio); for (port = 0; port < host->n_ports; port++) { - if (IS_GEN_II(hpriv)) { - void __iomem *port_mmio = mv_port_base(mmio, port); - - u32 ifctl = readl(port_mmio + SATA_INTERFACE_CTL); - ifctl |= (1 << 7); /* enable gen2i speed */ - ifctl = (ifctl & 0xfff) | 0x9b1000; /* from chip spec */ - writelfl(ifctl, port_mmio + SATA_INTERFACE_CTL); - } - - hpriv->ops->phy_errata(hpriv, mmio, port); - } - - for (port = 0; port < host->n_ports; port++) { struct ata_port *ap = host->ports[port]; void __iomem *port_mmio = mv_port_base(mmio, port); - unsigned int offset = port_mmio - mmio; mv_port_init(&ap->ioaddr, port_mmio); - ata_port_pbar_desc(ap, MV_PRIMARY_BAR, -1, "mmio"); - ata_port_pbar_desc(ap, MV_PRIMARY_BAR, offset, "port"); +#ifdef CONFIG_PCI + if (!IS_SOC(hpriv)) { + unsigned int offset = port_mmio - mmio; + ata_port_pbar_desc(ap, MV_PRIMARY_BAR, -1, "mmio"); + ata_port_pbar_desc(ap, MV_PRIMARY_BAR, offset, "port"); + } +#endif } for (hc = 0; hc < n_hc; hc++) { @@ -2650,25 +3109,71 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx) writelfl(0, hc_mmio + HC_IRQ_CAUSE_OFS); } - /* Clear any currently outstanding host interrupt conditions */ - writelfl(0, mmio + hpriv->irq_cause_ofs); + if (!IS_SOC(hpriv)) { + /* Clear any currently outstanding host interrupt conditions */ + writelfl(0, mmio + hpriv->irq_cause_ofs); - /* and unmask interrupt generation for host regs */ - writelfl(hpriv->unmask_all_irqs, mmio + hpriv->irq_mask_ofs); + /* and unmask interrupt generation for host regs */ + writelfl(hpriv->unmask_all_irqs, mmio + hpriv->irq_mask_ofs); - if (IS_GEN_I(hpriv)) - writelfl(~HC_MAIN_MASKED_IRQS_5, mmio + HC_MAIN_IRQ_MASK_OFS); - else - writelfl(~HC_MAIN_MASKED_IRQS, mmio + HC_MAIN_IRQ_MASK_OFS); + /* + * enable only global host interrupts for now. + * The per-port interrupts get done later as ports are set up. + */ + mv_set_main_irq_mask(host, 0, PCI_ERR); + } +done: + return rc; +} - VPRINTK("HC MAIN IRQ cause/mask=0x%08x/0x%08x " - "PCI int cause/mask=0x%08x/0x%08x\n", - readl(mmio + HC_MAIN_IRQ_CAUSE_OFS), - readl(mmio + HC_MAIN_IRQ_MASK_OFS), - readl(mmio + hpriv->irq_cause_ofs), - readl(mmio + hpriv->irq_mask_ofs)); +#ifdef CONFIG_PCI +static int mv_pci_init_one(struct pci_dev *pdev, + const struct pci_device_id *ent); + + +static struct pci_driver mv_pci_driver = { + .name = DRV_NAME, + .id_table = mv_pci_tbl, + .probe = mv_pci_init_one, + .remove = ata_pci_remove_one, +}; + +/* + * module options + */ +static int msi; /* Use PCI msi; either zero (off, default) or non-zero */ + + +/* move to PCI layer or libata core? */ +static int pci_go_64(struct pci_dev *pdev) +{ + int rc; + + if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { + rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); + if (rc) { + rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); + if (rc) { + dev_printk(KERN_ERR, &pdev->dev, + "64-bit DMA enable failed\n"); + return rc; + } + } + } else { + rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); + if (rc) { + dev_printk(KERN_ERR, &pdev->dev, + "32-bit DMA enable failed\n"); + return rc; + } + rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); + if (rc) { + dev_printk(KERN_ERR, &pdev->dev, + "32-bit consistent DMA enable failed\n"); + return rc; + } + } -done: return rc; } @@ -2714,15 +3219,36 @@ static void mv_print_info(struct ata_host *host) scc_s, (MV_HP_FLAG_MSI & hpriv->hp_flags) ? "MSI" : "INTx"); } +static int mv_create_dma_pools(struct mv_host_priv *hpriv, struct device *dev) +{ + hpriv->crqb_pool = dmam_pool_create("crqb_q", dev, MV_CRQB_Q_SZ, + MV_CRQB_Q_SZ, 0); + if (!hpriv->crqb_pool) + return -ENOMEM; + + hpriv->crpb_pool = dmam_pool_create("crpb_q", dev, MV_CRPB_Q_SZ, + MV_CRPB_Q_SZ, 0); + if (!hpriv->crpb_pool) + return -ENOMEM; + + hpriv->sg_tbl_pool = dmam_pool_create("sg_tbl", dev, MV_SG_TBL_SZ, + MV_SG_TBL_SZ, 0); + if (!hpriv->sg_tbl_pool) + return -ENOMEM; + + return 0; +} + /** - * mv_init_one - handle a positive probe of a Marvell host + * mv_pci_init_one - handle a positive probe of a PCI Marvell host * @pdev: PCI device found * @ent: PCI device ID entry for the matched host * * LOCKING: * Inherited from caller. */ -static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) +static int mv_pci_init_one(struct pci_dev *pdev, + const struct pci_device_id *ent) { static int printed_version; unsigned int board_idx = (unsigned int)ent->driver_data; @@ -2742,6 +3268,7 @@ static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) if (!host || !hpriv) return -ENOMEM; host->private_data = hpriv; + hpriv->n_ports = n_ports; /* acquire resources */ rc = pcim_enable_device(pdev); @@ -2754,11 +3281,16 @@ static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) if (rc) return rc; host->iomap = pcim_iomap_table(pdev); + hpriv->base = host->iomap[MV_PRIMARY_BAR]; rc = pci_go_64(pdev); if (rc) return rc; + rc = mv_create_dma_pools(hpriv, &pdev->dev); + if (rc) + return rc; + /* initialize adapter */ rc = mv_init_host(host, board_idx); if (rc) @@ -2776,15 +3308,29 @@ static int mv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) return ata_host_activate(host, pdev->irq, mv_interrupt, IRQF_SHARED, IS_GEN_I(hpriv) ? &mv5_sht : &mv6_sht); } +#endif static int __init mv_init(void) { - return pci_register_driver(&mv_pci_driver); + int rc = -ENODEV; +#ifdef CONFIG_PCI + rc = pci_register_driver(&mv_pci_driver); + if (rc < 0) + return rc; +#endif + +#ifdef CONFIG_PCI + if (rc < 0) + pci_unregister_driver(&mv_pci_driver); +#endif + return rc; } static void __exit mv_exit(void) { +#ifdef CONFIG_PCI pci_unregister_driver(&mv_pci_driver); +#endif } MODULE_AUTHOR("Brett Russ"); @@ -2793,8 +3339,10 @@ MODULE_LICENSE("GPL"); MODULE_DEVICE_TABLE(pci, mv_pci_tbl); MODULE_VERSION(DRV_VERSION); +#ifdef CONFIG_PCI module_param(msi, int, 0444); MODULE_PARM_DESC(msi, "Enable use of PCI MSI (0=off, 1=on)"); +#endif module_init(mv_init); module_exit(mv_exit); diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c index ae341a2..e620ca1 100644 --- a/drivers/ata/sata_nv.c +++ b/drivers/ata/sata_nv.c @@ -247,6 +247,7 @@ struct nv_adma_port_priv { void __iomem *ctl_block; void __iomem *gen_block; void __iomem *notifier_clear_block; + u64 adma_dma_mask; u8 flags; int last_issue_ncq; }; @@ -298,9 +299,12 @@ static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); static int nv_pci_device_resume(struct pci_dev *pdev); #endif static void nv_ck804_host_stop(struct ata_host *host); -static irqreturn_t nv_generic_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs); -static irqreturn_t nv_nf2_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs); -static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs); +static irqreturn_t nv_generic_interrupt(int irq, void *dev_instance, + struct pt_regs *regs); +static irqreturn_t nv_nf2_interrupt(int irq, void *dev_instance, + struct pt_regs *regs); +static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance, + struct pt_regs *regs); static int nv_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); static int nv_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); @@ -308,7 +312,8 @@ static void nv_nf2_freeze(struct ata_port *ap); static void nv_nf2_thaw(struct ata_port *ap); static void nv_ck804_freeze(struct ata_port *ap); static void nv_ck804_thaw(struct ata_port *ap); -static void nv_error_handler(struct ata_port *ap); +static int nv_hardreset(struct ata_link *link, unsigned int *class, + unsigned long deadline); static int nv_adma_slave_config(struct scsi_device *sdev); static int nv_adma_check_atapi_dma(struct ata_queued_cmd *qc); static void nv_adma_qc_prep(struct ata_queued_cmd *qc); @@ -384,157 +389,60 @@ static struct pci_driver nv_pci_driver = { }; static struct scsi_host_template nv_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; static struct scsi_host_template nv_adma_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .change_queue_depth = ata_scsi_change_queue_depth, + ATA_NCQ_SHT(DRV_NAME), .can_queue = NV_ADMA_MAX_CPBS, - .this_id = ATA_SHT_THIS_ID, .sg_tablesize = NV_ADMA_SGTBL_TOTAL_LEN, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, .dma_boundary = NV_ADMA_DMA_BOUNDARY, .slave_configure = nv_adma_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, }; static struct scsi_host_template nv_swncq_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .change_queue_depth = ata_scsi_change_queue_depth, + ATA_NCQ_SHT(DRV_NAME), .can_queue = ATA_MAX_QUEUE, - .this_id = ATA_SHT_THIS_ID, .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, .dma_boundary = ATA_DMA_BOUNDARY, .slave_configure = nv_swncq_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, }; -static const struct ata_port_operations nv_generic_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .exec_command = ata_exec_command, - .check_status = ata_check_status, - .dev_select = ata_std_dev_select, - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = nv_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .data_xfer = ata_data_xfer, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, +static struct ata_port_operations nv_generic_ops = { + .inherits = &ata_bmdma_port_ops, + .hardreset = nv_hardreset, .scr_read = nv_scr_read, .scr_write = nv_scr_write, - .port_start = ata_port_start, }; -static const struct ata_port_operations nv_nf2_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .exec_command = ata_exec_command, - .check_status = ata_check_status, - .dev_select = ata_std_dev_select, - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, +static struct ata_port_operations nv_nf2_ops = { + .inherits = &nv_generic_ops, .freeze = nv_nf2_freeze, .thaw = nv_nf2_thaw, - .error_handler = nv_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .data_xfer = ata_data_xfer, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - .scr_read = nv_scr_read, - .scr_write = nv_scr_write, - .port_start = ata_port_start, }; -static const struct ata_port_operations nv_ck804_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .exec_command = ata_exec_command, - .check_status = ata_check_status, - .dev_select = ata_std_dev_select, - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, +static struct ata_port_operations nv_ck804_ops = { + .inherits = &nv_generic_ops, .freeze = nv_ck804_freeze, .thaw = nv_ck804_thaw, - .error_handler = nv_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .data_xfer = ata_data_xfer, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - .scr_read = nv_scr_read, - .scr_write = nv_scr_write, - .port_start = ata_port_start, .host_stop = nv_ck804_host_stop, }; -static const struct ata_port_operations nv_adma_ops = { - .tf_load = ata_tf_load, - .tf_read = nv_adma_tf_read, +static struct ata_port_operations nv_adma_ops = { + .inherits = &nv_generic_ops, + .check_atapi_dma = nv_adma_check_atapi_dma, - .exec_command = ata_exec_command, - .check_status = ata_check_status, - .dev_select = ata_std_dev_select, - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, + .sff_tf_read = nv_adma_tf_read, .qc_defer = ata_std_qc_defer, .qc_prep = nv_adma_qc_prep, .qc_issue = nv_adma_qc_issue, + .sff_irq_clear = nv_adma_irq_clear, + .freeze = nv_adma_freeze, .thaw = nv_adma_thaw, .error_handler = nv_adma_error_handler, .post_internal_cmd = nv_adma_post_internal_cmd, - .data_xfer = ata_data_xfer, - .irq_clear = nv_adma_irq_clear, - .irq_on = ata_irq_on, - .scr_read = nv_scr_read, - .scr_write = nv_scr_write, + .port_start = nv_adma_port_start, .port_stop = nv_adma_port_stop, #ifdef CONFIG_PM @@ -544,28 +452,17 @@ static const struct ata_port_operations nv_adma_ops = { .host_stop = nv_adma_host_stop, }; -static const struct ata_port_operations nv_swncq_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .exec_command = ata_exec_command, - .check_status = ata_check_status, - .dev_select = ata_std_dev_select, - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, +static struct ata_port_operations nv_swncq_ops = { + .inherits = &nv_generic_ops, + .qc_defer = ata_std_qc_defer, .qc_prep = nv_swncq_qc_prep, .qc_issue = nv_swncq_qc_issue, + .freeze = nv_mcp55_freeze, .thaw = nv_mcp55_thaw, .error_handler = nv_swncq_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .data_xfer = ata_data_xfer, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - .scr_read = nv_scr_read, - .scr_write = nv_scr_write, + #ifdef CONFIG_PM .port_suspend = nv_swncq_port_suspend, .port_resume = nv_swncq_port_resume, @@ -573,63 +470,61 @@ static const struct ata_port_operations nv_swncq_ops = { .port_start = nv_swncq_port_start, }; +struct nv_pi_priv { + irq_handler_t irq_handler; + struct scsi_host_template *sht; +}; + +#define NV_PI_PRIV(_irq_handler, _sht) \ + &(struct nv_pi_priv){ .irq_handler = _irq_handler, .sht = _sht } + static const struct ata_port_info nv_port_info[] = { /* generic */ { - .sht = &nv_sht, .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, - .link_flags = ATA_LFLAG_HRST_TO_RESUME, .pio_mask = NV_PIO_MASK, .mwdma_mask = NV_MWDMA_MASK, .udma_mask = NV_UDMA_MASK, .port_ops = &nv_generic_ops, - .irq_handler = nv_generic_interrupt, + .private_data = NV_PI_PRIV(nv_generic_interrupt, &nv_sht), }, /* nforce2/3 */ { - .sht = &nv_sht, .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, - .link_flags = ATA_LFLAG_HRST_TO_RESUME, .pio_mask = NV_PIO_MASK, .mwdma_mask = NV_MWDMA_MASK, .udma_mask = NV_UDMA_MASK, .port_ops = &nv_nf2_ops, - .irq_handler = nv_nf2_interrupt, + .private_data = NV_PI_PRIV(nv_nf2_interrupt, &nv_sht), }, /* ck804 */ { - .sht = &nv_sht, .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, - .link_flags = ATA_LFLAG_HRST_TO_RESUME, .pio_mask = NV_PIO_MASK, .mwdma_mask = NV_MWDMA_MASK, .udma_mask = NV_UDMA_MASK, .port_ops = &nv_ck804_ops, - .irq_handler = nv_ck804_interrupt, + .private_data = NV_PI_PRIV(nv_ck804_interrupt, &nv_sht), }, /* ADMA */ { - .sht = &nv_adma_sht, .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO | ATA_FLAG_NCQ, - .link_flags = ATA_LFLAG_HRST_TO_RESUME, .pio_mask = NV_PIO_MASK, .mwdma_mask = NV_MWDMA_MASK, .udma_mask = NV_UDMA_MASK, .port_ops = &nv_adma_ops, - .irq_handler = nv_adma_interrupt, + .private_data = NV_PI_PRIV(nv_adma_interrupt, &nv_adma_sht), }, /* SWNCQ */ { - .sht = &nv_swncq_sht, .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | ATA_FLAG_NCQ, - .link_flags = ATA_LFLAG_HRST_TO_RESUME, .pio_mask = NV_PIO_MASK, .mwdma_mask = NV_MWDMA_MASK, .udma_mask = NV_UDMA_MASK, .port_ops = &nv_swncq_ops, - .irq_handler = nv_swncq_interrupt, + .private_data = NV_PI_PRIV(nv_swncq_interrupt, &nv_swncq_sht), }, }; @@ -639,8 +534,8 @@ MODULE_LICENSE("GPL"); MODULE_DEVICE_TABLE(pci, nv_pci_tbl); MODULE_VERSION(DRV_VERSION); -static int adma_enabled = 1; -static int swncq_enabled; +static int adma_enabled; +static int swncq_enabled = 1; static void nv_adma_register_mode(struct ata_port *ap) { @@ -715,9 +610,10 @@ static int nv_adma_slave_config(struct scsi_device *sdev) { struct ata_port *ap = ata_shost_to_port(sdev->host); struct nv_adma_port_priv *pp = ap->private_data; + struct nv_adma_port_priv *port0, *port1; + struct scsi_device *sdev0, *sdev1; struct pci_dev *pdev = to_pci_dev(ap->host->dev); - u64 bounce_limit; - unsigned long segment_boundary; + unsigned long segment_boundary, flags; unsigned short sg_tablesize; int rc; int adma_enable; @@ -729,6 +625,8 @@ static int nv_adma_slave_config(struct scsi_device *sdev) /* Not a proper libata device, ignore */ return rc; + spin_lock_irqsave(ap->lock, flags); + if (ap->link.device[sdev->id].class == ATA_DEV_ATAPI) { /* * NVIDIA reports that ADMA mode does not support ATAPI commands. @@ -737,7 +635,6 @@ static int nv_adma_slave_config(struct scsi_device *sdev) * Restrict DMA parameters as required by the legacy interface * when an ATAPI device is connected. */ - bounce_limit = ATA_DMA_MASK; segment_boundary = ATA_DMA_BOUNDARY; /* Subtract 1 since an extra entry may be needed for padding, see libata-scsi.c */ @@ -748,7 +645,6 @@ static int nv_adma_slave_config(struct scsi_device *sdev) adma_enable = 0; nv_adma_register_mode(ap); } else { - bounce_limit = *ap->dev->dma_mask; segment_boundary = NV_ADMA_DMA_BOUNDARY; sg_tablesize = NV_ADMA_SGTBL_TOTAL_LEN; adma_enable = 1; @@ -774,12 +670,49 @@ static int nv_adma_slave_config(struct scsi_device *sdev) if (current_reg != new_reg) pci_write_config_dword(pdev, NV_MCP_SATA_CFG_20, new_reg); - blk_queue_bounce_limit(sdev->request_queue, bounce_limit); + port0 = ap->host->ports[0]->private_data; + port1 = ap->host->ports[1]->private_data; + sdev0 = ap->host->ports[0]->link.device[0].sdev; + sdev1 = ap->host->ports[1]->link.device[0].sdev; + if ((port0->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) || + (port1->flags & NV_ADMA_ATAPI_SETUP_COMPLETE)) { + /** We have to set the DMA mask to 32-bit if either port is in + ATAPI mode, since they are on the same PCI device which is + used for DMA mapping. If we set the mask we also need to set + the bounce limit on both ports to ensure that the block + layer doesn't feed addresses that cause DMA mapping to + choke. If either SCSI device is not allocated yet, it's OK + since that port will discover its correct setting when it + does get allocated. + Note: Setting 32-bit mask should not fail. */ + if (sdev0) + blk_queue_bounce_limit(sdev0->request_queue, + ATA_DMA_MASK); + if (sdev1) + blk_queue_bounce_limit(sdev1->request_queue, + ATA_DMA_MASK); + + pci_set_dma_mask(pdev, ATA_DMA_MASK); + } else { + /** This shouldn't fail as it was set to this value before */ + pci_set_dma_mask(pdev, pp->adma_dma_mask); + if (sdev0) + blk_queue_bounce_limit(sdev0->request_queue, + pp->adma_dma_mask); + if (sdev1) + blk_queue_bounce_limit(sdev1->request_queue, + pp->adma_dma_mask); + } + blk_queue_segment_boundary(sdev->request_queue, segment_boundary); blk_queue_max_hw_segments(sdev->request_queue, sg_tablesize); ata_port_printk(ap, KERN_INFO, - "bounce limit 0x%llX, segment boundary 0x%lX, hw segs %hu\n", - (unsigned long long)bounce_limit, segment_boundary, sg_tablesize); + "DMA mask 0x%llX, segment boundary 0x%lX, hw segs %hu\n", + (unsigned long long)*ap->host->dev->dma_mask, + segment_boundary, sg_tablesize); + + spin_unlock_irqrestore(ap->lock, flags); + return rc; } @@ -800,7 +733,7 @@ static void nv_adma_tf_read(struct ata_port *ap, struct ata_taskfile *tf) ADMA mode could abort outstanding commands. */ nv_adma_register_mode(ap); - ata_tf_read(ap, tf); + ata_sff_tf_read(ap, tf); } static unsigned int nv_adma_tf_to_cpb(struct ata_taskfile *tf, __le16 *cpb) @@ -890,7 +823,7 @@ static int nv_adma_check_cpb(struct ata_port *ap, int cpb_num, int force_err) "notifier for tag %d with no cmd?\n", cpb_num); ehi->err_mask |= AC_ERR_HSM; - ehi->action |= ATA_EH_SOFTRESET; + ehi->action |= ATA_EH_RESET; ata_port_freeze(ap); return 1; } @@ -914,12 +847,12 @@ static int nv_host_intr(struct ata_port *ap, u8 irq_stat) /* DEV interrupt w/ no active qc? */ if (unlikely(!qc || (qc->tf.flags & ATA_TFLAG_POLLING))) { - ata_check_status(ap); + ata_sff_check_status(ap); return 1; } /* handle interrupt */ - return ata_host_intr(ap, qc); + return ata_sff_host_intr(ap, qc); } static irqreturn_t nv_adma_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs) @@ -928,8 +861,6 @@ static irqreturn_t nv_adma_interrupt(int irq, void *dev_instance, struct pt_regs int i, handled = 0; u32 notifier_clears[2]; - DPRINTK("ENTER\n"); - spin_lock(&host->lock); for (i = 0; i < host->n_ports; i++) { @@ -1019,7 +950,7 @@ static irqreturn_t nv_adma_interrupt(int irq, void *dev_instance, struct pt_regs int pos, error = 0; if (status & NV_ADMA_STAT_CPBERR) { - /* Check all active commands */ + /* Check all active commands */ if (ata_tag_valid(ap->link.active_tag)) check_commands = 1 << ap->link.active_tag; @@ -1100,7 +1031,7 @@ static void nv_adma_irq_clear(struct ata_port *ap) u32 notifier_clears[2]; if (pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) { - ata_bmdma_irq_clear(ap); + ata_sff_irq_clear(ap); return; } @@ -1131,7 +1062,7 @@ static void nv_adma_post_internal_cmd(struct ata_queued_cmd *qc) struct nv_adma_port_priv *pp = qc->ap->private_data; if (pp->flags & NV_ADMA_PORT_REGISTER_MODE) - ata_bmdma_post_internal_cmd(qc); + ata_sff_post_internal_cmd(qc); } static int nv_adma_port_start(struct ata_port *ap) @@ -1142,10 +1073,20 @@ static int nv_adma_port_start(struct ata_port *ap) void *mem; dma_addr_t mem_dma; void __iomem *mmio; + struct pci_dev *pdev = to_pci_dev(dev); u16 tmp; VPRINTK("ENTER\n"); + /* Ensure DMA mask is set to 32-bit before allocating legacy PRD and + pad buffers */ + rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); + if (rc) + return rc; + rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); + if (rc) + return rc; + rc = ata_port_start(ap); if (rc) return rc; @@ -1161,6 +1102,15 @@ static int nv_adma_port_start(struct ata_port *ap) pp->notifier_clear_block = pp->gen_block + NV_ADMA_NOTIFIER_CLEAR + (4 * ap->port_no); + /* Now that the legacy PRD and padding buffer are allocated we can + safely raise the DMA mask to allocate the CPB/APRD table. + These are allowed to fail since we store the value that ends up + being used to set as the bounce limit in slave_config later if + needed. */ + pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); + pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); + pp->adma_dma_mask = *dev->dma_mask; + mem = dmam_alloc_coherent(dev, NV_ADMA_PORT_PRIV_DMA_SZ, &mem_dma, GFP_KERNEL); if (!mem) @@ -1356,7 +1306,6 @@ static void nv_adma_fill_sg(struct ata_queued_cmd *qc, struct nv_adma_cpb *cpb) aprd = (idx < 5) ? &cpb->aprd[idx] : &pp->aprd[NV_ADMA_SGTBL_LEN * qc->tag + (idx-5)]; nv_adma_fill_aprd(qc, sg, idx, aprd); - idx++; } if (idx > 5) cpb->next_aprd = cpu_to_le64(((u64)(pp->aprd_dma + NV_ADMA_SGTBL_SZ * qc->tag))); @@ -1392,7 +1341,7 @@ static void nv_adma_qc_prep(struct ata_queued_cmd *qc) BUG_ON(!(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) && (qc->flags & ATA_QCFLAG_DMAMAP)); nv_adma_register_mode(qc->ap); - ata_qc_prep(qc); + ata_sff_qc_prep(qc); return; } @@ -1451,7 +1400,7 @@ static unsigned int nv_adma_qc_issue(struct ata_queued_cmd *qc) BUG_ON(!(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) && (qc->flags & ATA_QCFLAG_DMAMAP)); nv_adma_register_mode(qc->ap); - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } else nv_adma_mode(qc->ap); @@ -1473,15 +1422,14 @@ static unsigned int nv_adma_qc_issue(struct ata_queued_cmd *qc) return 0; } -static irqreturn_t nv_generic_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs) +static irqreturn_t nv_generic_interrupt(int irq, void *dev_instance, + struct pt_regs *regs) { struct ata_host *host = dev_instance; unsigned int i; unsigned int handled = 0; unsigned long flags; - DPRINTK("ENTER\n"); - spin_lock_irqsave(&host->lock, flags); for (i = 0; i < host->n_ports; i++) { @@ -1494,11 +1442,11 @@ static irqreturn_t nv_generic_interrupt(int irq, void *dev_instance, struct pt_r qc = ata_qc_from_tag(ap, ap->link.active_tag); if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING))) - handled += ata_host_intr(ap, qc); + handled += ata_sff_host_intr(ap, qc); else // No request pending? Clear interrupt status // anyway, in case there's one pending. - ap->ops->check_status(ap); + ap->ops->sff_check_status(ap); } } @@ -1512,8 +1460,6 @@ static irqreturn_t nv_do_interrupt(struct ata_host *host, u8 irq_stat) { int i, handled = 0; - DPRINTK("ENTER\n"); - for (i = 0; i < host->n_ports; i++) { struct ata_port *ap = host->ports[i]; @@ -1526,14 +1472,13 @@ static irqreturn_t nv_do_interrupt(struct ata_host *host, u8 irq_stat) return IRQ_RETVAL(handled); } -static irqreturn_t nv_nf2_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs) +static irqreturn_t nv_nf2_interrupt(int irq, void *dev_instance, + struct pt_regs *regs) { struct ata_host *host = dev_instance; u8 irq_stat; irqreturn_t ret; - DPRINTK("ENTER\n"); - spin_lock(&host->lock); irq_stat = ioread8(host->ports[0]->ioaddr.scr_addr + NV_INT_STATUS); ret = nv_do_interrupt(host, irq_stat); @@ -1542,14 +1487,13 @@ static irqreturn_t nv_nf2_interrupt(int irq, void *dev_instance, struct pt_regs return ret; } -static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs) +static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance, + struct pt_regs *regs) { struct ata_host *host = dev_instance; u8 irq_stat; irqreturn_t ret; - DPRINTK("ENTER\n"); - spin_lock(&host->lock); irq_stat = readb(host->iomap[NV_MMIO_BAR] + NV_INT_STATUS_CK804); ret = nv_do_interrupt(host, irq_stat); @@ -1635,7 +1579,7 @@ static void nv_mcp55_freeze(struct ata_port *ap) mask = readl(mmio_base + NV_INT_ENABLE_MCP55); mask &= ~(NV_INT_ALL_MCP55 << shift); writel(mask, mmio_base + NV_INT_ENABLE_MCP55); - ata_bmdma_freeze(ap); + ata_sff_freeze(ap); } static void nv_mcp55_thaw(struct ata_port *ap) @@ -1649,25 +1593,22 @@ static void nv_mcp55_thaw(struct ata_port *ap) mask = readl(mmio_base + NV_INT_ENABLE_MCP55); mask |= (NV_INT_MASK_MCP55 << shift); writel(mask, mmio_base + NV_INT_ENABLE_MCP55); - ata_bmdma_thaw(ap); + ata_sff_thaw(ap); } static int nv_hardreset(struct ata_link *link, unsigned int *class, unsigned long deadline) { - unsigned int dummy; + int rc; /* SATA hardreset fails to retrieve proper device signature on - * some controllers. Don't classify on hardreset. For more - * info, see http://bugzilla.kernel.org/show_bug.cgi?id=3352 + * some controllers. Request follow up SRST. For more info, + * see http://bugzilla.kernel.org/show_bug.cgi?id=3352 */ - return sata_std_hardreset(link, &dummy, deadline); -} - -static void nv_error_handler(struct ata_port *ap) -{ - ata_bmdma_drive_eh(ap, ata_std_prereset, ata_std_softreset, - nv_hardreset, ata_std_postreset); + rc = sata_sff_hardreset(link, class, deadline); + if (rc) + return rc; + return -EAGAIN; } static void nv_adma_error_handler(struct ata_port *ap) @@ -1723,8 +1664,7 @@ static void nv_adma_error_handler(struct ata_port *ap) readw(mmio + NV_ADMA_CTL); /* flush posted write */ } - ata_bmdma_drive_eh(ap, ata_std_prereset, ata_std_softreset, - nv_hardreset, ata_std_postreset); + ata_sff_error_handler(ap); } static void nv_swncq_qc_to_dq(struct ata_port *ap, struct ata_queued_cmd *qc) @@ -1810,7 +1750,7 @@ static void nv_swncq_ncq_stop(struct ata_port *ap) pp->dhfis_bits, pp->dmafis_bits, pp->sdbfis_bits); ata_port_printk(ap, KERN_ERR, "ATA_REG 0x%X ERR_REG 0x%X\n", - ap->ops->check_status(ap), + ap->ops->sff_check_status(ap), ioread8(ap->ioaddr.error_addr)); sactive = readl(pp->sactive_block); @@ -1836,7 +1776,7 @@ static void nv_swncq_ncq_stop(struct ata_port *ap) } nv_swncq_pp_reinit(ap); - ap->ops->irq_clear(ap); + ap->ops->sff_irq_clear(ap); __ata_bmdma_stop(ap); nv_swncq_irq_clear(ap, 0xffff); } @@ -1847,11 +1787,10 @@ static void nv_swncq_error_handler(struct ata_port *ap) if (ap->link.sactive) { nv_swncq_ncq_stop(ap); - ehc->i.action |= ATA_EH_HARDRESET; + ehc->i.action |= ATA_EH_RESET; } - ata_bmdma_drive_eh(ap, ata_std_prereset, ata_std_softreset, - nv_hardreset, ata_std_postreset); + ata_sff_error_handler(ap); } #ifdef CONFIG_PM @@ -1997,7 +1936,7 @@ static int nv_swncq_port_start(struct ata_port *ap) static void nv_swncq_qc_prep(struct ata_queued_cmd *qc) { if (qc->tf.protocol != ATA_PROT_NCQ) { - ata_qc_prep(qc); + ata_sff_qc_prep(qc); return; } @@ -2018,6 +1957,7 @@ static void nv_swncq_fill_sg(struct ata_queued_cmd *qc) WARN_ON(qc->__sg == NULL); WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); + prd = pp->prd + ATA_MAX_PRD * qc->tag; idx = 0; @@ -2063,8 +2003,8 @@ static unsigned int nv_swncq_issue_atacmd(struct ata_port *ap, pp->dmafis_bits &= ~(1 << qc->tag); pp->qc_active |= (0x1 << qc->tag); - ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ - ap->ops->exec_command(ap, &qc->tf); + ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */ + ap->ops->sff_exec_command(ap, &qc->tf); DPRINTK("Issued tag %u\n", qc->tag); @@ -2077,7 +2017,7 @@ static unsigned int nv_swncq_qc_issue(struct ata_queued_cmd *qc) struct nv_swncq_port_priv *pp = ap->private_data; if (qc->tf.protocol != ATA_PROT_NCQ) - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); DPRINTK("Enter\n"); @@ -2132,11 +2072,11 @@ static int nv_swncq_sdbfis(struct ata_port *ap) ata_ehi_clear_desc(ehi); ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); ehi->err_mask |= AC_ERR_HOST_BUS; - ehi->action |= ATA_EH_SOFTRESET; + ehi->action |= ATA_EH_RESET; return -EINVAL; } - ap->ops->irq_clear(ap); + ap->ops->sff_irq_clear(ap); __ata_bmdma_stop(ap); sactive = readl(pp->sactive_block); @@ -2147,7 +2087,7 @@ static int nv_swncq_sdbfis(struct ata_port *ap) ata_ehi_push_desc(ehi, "illegal SWNCQ:qc_active transition" "(%08x->%08x)", pp->qc_active, sactive); ehi->err_mask |= AC_ERR_HSM; - ehi->action |= ATA_EH_HARDRESET; + ehi->action |= ATA_EH_RESET; return -EINVAL; } for (i = 0; i < ATA_MAX_QUEUE; i++) { @@ -2258,7 +2198,7 @@ static void nv_swncq_host_interrupt(struct ata_port *ap, u16 fis) u8 ata_stat; int rc = 0; - ata_stat = ap->ops->check_status(ap); + ata_stat = ap->ops->sff_check_status(ap); nv_swncq_irq_clear(ap, fis); if (!fis) return; @@ -2283,7 +2223,7 @@ static void nv_swncq_host_interrupt(struct ata_port *ap, u16 fis) ata_ehi_push_desc(ehi, "Ata error. fis:0x%X", fis); ehi->err_mask |= AC_ERR_DEV; ehi->serror |= serror; - ehi->action |= ATA_EH_SOFTRESET; + ehi->action |= ATA_EH_RESET; ata_port_freeze(ap); return; } @@ -2315,13 +2255,13 @@ static void nv_swncq_host_interrupt(struct ata_port *ap, u16 fis) if (pp->ncq_flags & (ncq_saw_sdb | ncq_saw_backout)) { ata_ehi_push_desc(ehi, "illegal fis transaction"); ehi->err_mask |= AC_ERR_HSM; - ehi->action |= ATA_EH_HARDRESET; + ehi->action |= ATA_EH_RESET; goto irq_error; } if (!(fis & NV_SWNCQ_IRQ_DMASETUP) && !(pp->ncq_flags & ncq_saw_dmas)) { - ata_stat = ap->ops->check_status(ap); + ata_stat = ap->ops->sff_check_status(ap); if (ata_stat & ATA_BUSY) goto irq_exit; @@ -2358,8 +2298,6 @@ static irqreturn_t nv_swncq_interrupt(int irq, void *dev_instance, struct pt_reg unsigned long flags; u32 irq_stat; - DPRINTK("ENTER\n"); - spin_lock_irqsave(&host->lock, flags); irq_stat = readl(host->iomap[NV_MMIO_BAR] + NV_INT_STATUS_MCP55); @@ -2390,6 +2328,7 @@ static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) { static int printed_version; const struct ata_port_info *ppi[] = { NULL, NULL }; + struct nv_pi_priv *ipriv; struct ata_host *host; struct nv_host_priv *hpriv; int rc; @@ -2426,7 +2365,8 @@ static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) } ppi[0] = &nv_port_info[type]; - rc = ata_pci_prepare_sff_host(pdev, ppi, &host); + ipriv = ppi[0]->private_data; + rc = ata_pci_sff_prepare_host(pdev, ppi, &host); if (rc) return rc; @@ -2436,12 +2376,6 @@ static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) hpriv->type = type; host->private_data = hpriv; - /* set 64bit dma masks, may fail */ - if (type == ADMA) { - if (pci_set_dma_mask(pdev, DMA_64BIT_MASK) == 0) - pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); - } - /* request and iomap NV_MMIO_BAR */ rc = pcim_iomap_regions(pdev, 1 << NV_MMIO_BAR, DRV_NAME); if (rc) @@ -2470,8 +2404,8 @@ static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) nv_swncq_host_init(host); pci_set_master(pdev); - return ata_host_activate(host, pdev->irq, ppi[0]->irq_handler, - IRQF_SHARED, ppi[0]->sht); + return ata_host_activate(host, pdev->irq, ipriv->irq_handler, + IRQF_SHARED, ipriv->sht); } #ifdef CONFIG_PM @@ -2567,5 +2501,5 @@ module_exit(nv_exit); module_param_named(adma, adma_enabled, bool, 0444); MODULE_PARM_DESC(adma, "Enable use of ADMA (Default: true)"); module_param_named(swncq, swncq_enabled, bool, 0444); -MODULE_PARM_DESC(swncq, "Enable use of SWNCQ (Default: false)"); +MODULE_PARM_DESC(swncq, "Enable use of SWNCQ (Default: true)"); diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c index 31592cf..3d25b9f 100644 --- a/drivers/ata/sata_promise.c +++ b/drivers/ata/sata_promise.c @@ -46,14 +46,22 @@ #include "sata_promise.h" #define DRV_NAME "sata_promise" -#define DRV_VERSION "2.11" +#define DRV_VERSION "2.12" enum { PDC_MAX_PORTS = 4, PDC_MMIO_BAR = 3, PDC_MAX_PRD = LIBATA_MAX_PRD - 1, /* -1 for ASIC PRD bug workaround */ - /* register offsets */ + /* host register offsets (from host->iomap[PDC_MMIO_BAR]) */ + PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */ + PDC_FLASH_CTL = 0x44, /* Flash control register */ + PDC_SATA_PLUG_CSR = 0x6C, /* SATA Plug control/status reg */ + PDC2_SATA_PLUG_CSR = 0x60, /* SATAII Plug control/status reg */ + PDC_TBG_MODE = 0x41C, /* TBG mode (not SATAII) */ + PDC_SLEW_CTL = 0x470, /* slew rate control reg (not SATAII) */ + + /* per-port ATA register offsets (from ap->ioaddr.cmd_addr) */ PDC_FEATURE = 0x04, /* Feature/Error reg (per port) */ PDC_SECTOR_COUNT = 0x08, /* Sector count reg (per port) */ PDC_SECTOR_NUMBER = 0x0C, /* Sector number reg (per port) */ @@ -63,14 +71,11 @@ enum { PDC_COMMAND = 0x1C, /* Command/status reg (per port) */ PDC_ALTSTATUS = 0x38, /* Alternate-status/device-control reg (per port) */ PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */ - PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */ - PDC_FLASH_CTL = 0x44, /* Flash control register */ PDC_GLOBAL_CTL = 0x48, /* Global control/status (per port) */ PDC_CTLSTAT = 0x60, /* IDE control and status (per port) */ - PDC_SATA_PLUG_CSR = 0x6C, /* SATA Plug control/status reg */ - PDC2_SATA_PLUG_CSR = 0x60, /* SATAII Plug control/status reg */ - PDC_TBG_MODE = 0x41C, /* TBG mode (not SATAII) */ - PDC_SLEW_CTL = 0x470, /* slew rate control reg (not SATAII) */ + + /* per-port SATA register offsets (from ap->ioaddr.scr_addr) */ + PDC_PHYMODE4 = 0x14, /* PDC_GLOBAL_CTL bit definitions */ PDC_PH_ERR = (1 << 8), /* PCI error while loading packet */ @@ -134,7 +139,7 @@ struct pdc_port_priv { static int pdc_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); static int pdc_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); -static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); +static int pdc_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); static int pdc_common_port_start(struct ata_port *ap); static int pdc_sata_port_start(struct ata_port *ap); static void pdc_qc_prep(struct ata_queued_cmd *qc); @@ -143,101 +148,57 @@ static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile static int pdc_check_atapi_dma(struct ata_queued_cmd *qc); static int pdc_old_sata_check_atapi_dma(struct ata_queued_cmd *qc); static void pdc_irq_clear(struct ata_port *ap); -static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc); +static unsigned int pdc_qc_issue(struct ata_queued_cmd *qc); static void pdc_freeze(struct ata_port *ap); +static void pdc_sata_freeze(struct ata_port *ap); static void pdc_thaw(struct ata_port *ap); -static void pdc_pata_error_handler(struct ata_port *ap); -static void pdc_sata_error_handler(struct ata_port *ap); +static void pdc_sata_thaw(struct ata_port *ap); +static void pdc_error_handler(struct ata_port *ap); static void pdc_post_internal_cmd(struct ata_queued_cmd *qc); static int pdc_pata_cable_detect(struct ata_port *ap); static int pdc_sata_cable_detect(struct ata_port *ap); static struct scsi_host_template pdc_ata_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, + ATA_BASE_SHT(DRV_NAME), .sg_tablesize = PDC_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, }; -static const struct ata_port_operations pdc_sata_ops = { - .tf_load = pdc_tf_load_mmio, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = pdc_exec_command_mmio, - .dev_select = ata_std_dev_select, - .check_atapi_dma = pdc_check_atapi_dma, +static const struct ata_port_operations pdc_common_ops = { + .inherits = &ata_sff_port_ops, + .sff_tf_load = pdc_tf_load_mmio, + .sff_exec_command = pdc_exec_command_mmio, + .check_atapi_dma = pdc_check_atapi_dma, .qc_prep = pdc_qc_prep, - .qc_issue = pdc_qc_issue_prot, - .freeze = pdc_freeze, - .thaw = pdc_thaw, - .error_handler = pdc_sata_error_handler, + .qc_issue = pdc_qc_issue, + .sff_irq_clear = pdc_irq_clear, + .post_internal_cmd = pdc_post_internal_cmd, - .cable_detect = pdc_sata_cable_detect, - .data_xfer = ata_data_xfer, - .irq_clear = pdc_irq_clear, - .irq_on = ata_irq_on, + .error_handler = pdc_error_handler, +}; +static struct ata_port_operations pdc_sata_ops = { + .inherits = &pdc_common_ops, + .cable_detect = pdc_sata_cable_detect, + .freeze = pdc_sata_freeze, + .thaw = pdc_sata_thaw, .scr_read = pdc_sata_scr_read, .scr_write = pdc_sata_scr_write, .port_start = pdc_sata_port_start, }; /* First-generation chips need a more restrictive ->check_atapi_dma op */ -static const struct ata_port_operations pdc_old_sata_ops = { - .tf_load = pdc_tf_load_mmio, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = pdc_exec_command_mmio, - .dev_select = ata_std_dev_select, +static struct ata_port_operations pdc_old_sata_ops = { + .inherits = &pdc_sata_ops, .check_atapi_dma = pdc_old_sata_check_atapi_dma, - - .qc_prep = pdc_qc_prep, - .qc_issue = pdc_qc_issue_prot, - .freeze = pdc_freeze, - .thaw = pdc_thaw, - .error_handler = pdc_sata_error_handler, - .post_internal_cmd = pdc_post_internal_cmd, - .cable_detect = pdc_sata_cable_detect, - .data_xfer = ata_data_xfer, - .irq_clear = pdc_irq_clear, - .irq_on = ata_irq_on, - - .scr_read = pdc_sata_scr_read, - .scr_write = pdc_sata_scr_write, - .port_start = pdc_sata_port_start, }; -static const struct ata_port_operations pdc_pata_ops = { - .tf_load = pdc_tf_load_mmio, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = pdc_exec_command_mmio, - .dev_select = ata_std_dev_select, - .check_atapi_dma = pdc_check_atapi_dma, - - .qc_prep = pdc_qc_prep, - .qc_issue = pdc_qc_issue_prot, +static struct ata_port_operations pdc_pata_ops = { + .inherits = &pdc_common_ops, + .cable_detect = pdc_pata_cable_detect, .freeze = pdc_freeze, .thaw = pdc_thaw, - .error_handler = pdc_pata_error_handler, - .post_internal_cmd = pdc_post_internal_cmd, - .cable_detect = pdc_pata_cable_detect, - .data_xfer = ata_data_xfer, - .irq_clear = pdc_irq_clear, - .irq_on = ata_irq_on, - .port_start = pdc_common_port_start, }; @@ -376,12 +337,12 @@ static int pdc_sata_port_start(struct ata_port *ap) /* fix up PHYMODE4 align timing */ if (ap->flags & PDC_FLAG_GEN_II) { - void __iomem *mmio = ap->ioaddr.scr_addr; + void __iomem *sata_mmio = ap->ioaddr.scr_addr; unsigned int tmp; - tmp = readl(mmio + 0x014); + tmp = readl(sata_mmio + PDC_PHYMODE4); tmp = (tmp & ~3) | 1; /* set bits 1:0 = 0:1 */ - writel(tmp, mmio + 0x014); + writel(tmp, sata_mmio + PDC_PHYMODE4); } return 0; @@ -389,32 +350,32 @@ static int pdc_sata_port_start(struct ata_port *ap) static void pdc_reset_port(struct ata_port *ap) { - void __iomem *mmio = ap->ioaddr.cmd_addr + PDC_CTLSTAT; + void __iomem *ata_ctlstat_mmio = ap->ioaddr.cmd_addr + PDC_CTLSTAT; unsigned int i; u32 tmp; for (i = 11; i > 0; i--) { - tmp = readl(mmio); + tmp = readl(ata_ctlstat_mmio); if (tmp & PDC_RESET) break; udelay(100); tmp |= PDC_RESET; - writel(tmp, mmio); + writel(tmp, ata_ctlstat_mmio); } tmp &= ~PDC_RESET; - writel(tmp, mmio); - readl(mmio); /* flush */ + writel(tmp, ata_ctlstat_mmio); + readl(ata_ctlstat_mmio); /* flush */ } static int pdc_pata_cable_detect(struct ata_port *ap) { u8 tmp; - void __iomem *mmio = ap->ioaddr.cmd_addr + PDC_CTLSTAT + 0x03; + void __iomem *ata_mmio = ap->ioaddr.cmd_addr; - tmp = readb(mmio); + tmp = readb(ata_mmio + PDC_CTLSTAT + 3); if (tmp & 0x01) return ATA_CBL_PATA40; return ATA_CBL_PATA80; @@ -449,20 +410,20 @@ static void pdc_atapi_pkt(struct ata_queued_cmd *qc) u8 *cdb = qc->cdb; struct pdc_port_priv *pp = ap->private_data; u8 *buf = pp->pkt; - u32 *buf32 = (u32 *) buf; - unsigned int dev_sel, feature, nbytes; + __le32 *buf32 = (__le32 *) buf; + unsigned int dev_sel, feature; /* set control bits (byte 0), zero delay seq id (byte 3), * and seq id (byte 2) */ switch (qc->tf.protocol) { - case ATA_PROT_ATAPI_DMA: + case ATAPI_PROT_DMA: if (!(qc->tf.flags & ATA_TFLAG_WRITE)) buf32[0] = cpu_to_le32(PDC_PKT_READ); else buf32[0] = 0; break; - case ATA_PROT_ATAPI_NODATA: + case ATAPI_PROT_NODATA: buf32[0] = cpu_to_le32(PDC_PKT_NODATA); break; default: @@ -473,45 +434,37 @@ static void pdc_atapi_pkt(struct ata_queued_cmd *qc) buf32[2] = 0; /* no next-packet */ /* select drive */ - if (sata_scr_valid(&ap->link)) { + if (sata_scr_valid(&ap->link)) dev_sel = PDC_DEVICE_SATA; - } else { - dev_sel = ATA_DEVICE_OBS; - if (qc->dev->devno != 0) - dev_sel |= ATA_DEV1; - } + else + dev_sel = qc->tf.device; + buf[12] = (1 << 5) | ATA_REG_DEVICE; buf[13] = dev_sel; buf[14] = (1 << 5) | ATA_REG_DEVICE | PDC_PKT_CLEAR_BSY; buf[15] = dev_sel; /* once more, waiting for BSY to clear */ buf[16] = (1 << 5) | ATA_REG_NSECT; - buf[17] = 0x00; + buf[17] = qc->tf.nsect; buf[18] = (1 << 5) | ATA_REG_LBAL; - buf[19] = 0x00; + buf[19] = qc->tf.lbal; /* set feature and byte counter registers */ - if (qc->tf.protocol != ATA_PROT_ATAPI_DMA) { + if (qc->tf.protocol != ATAPI_PROT_DMA) feature = PDC_FEATURE_ATAPI_PIO; - /* set byte counter register to real transfer byte count */ - nbytes = qc->nbytes; - if (nbytes > 0xffff) - nbytes = 0xffff; - } else { + else feature = PDC_FEATURE_ATAPI_DMA; - /* set byte counter register to 0 */ - nbytes = 0; - } + buf[20] = (1 << 5) | ATA_REG_FEATURE; buf[21] = feature; buf[22] = (1 << 5) | ATA_REG_BYTEL; - buf[23] = nbytes & 0xFF; + buf[23] = qc->tf.lbam; buf[24] = (1 << 5) | ATA_REG_BYTEH; - buf[25] = (nbytes >> 8) & 0xFF; + buf[25] = qc->tf.lbah; /* send ATAPI packet command 0xA0 */ buf[26] = (1 << 5) | ATA_REG_CMD; - buf[27] = ATA_CMD_PACKET; + buf[27] = qc->tf.command; /* select drive and check DRQ */ buf[28] = (1 << 5) | ATA_REG_DEVICE | PDC_PKT_WAIT_DRDY; @@ -595,7 +548,6 @@ static void pdc_fill_sg(struct ata_queued_cmd *qc) ap->prd[idx].addr = cpu_to_le32(addr); ap->prd[idx].flags_len = cpu_to_le32(len); VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); - idx++; } @@ -613,81 +565,141 @@ static void pdc_qc_prep(struct ata_queued_cmd *qc) switch (qc->tf.protocol) { case ATA_PROT_DMA: pdc_fill_sg(qc); - /* fall through */ - + /*FALLTHROUGH*/ case ATA_PROT_NODATA: i = pdc_pkt_header(&qc->tf, qc->ap->prd_dma, qc->dev->devno, pp->pkt); - if (qc->tf.flags & ATA_TFLAG_LBA48) i = pdc_prep_lba48(&qc->tf, pp->pkt, i); else i = pdc_prep_lba28(&qc->tf, pp->pkt, i); - pdc_pkt_footer(&qc->tf, pp->pkt, i); break; - - case ATA_PROT_ATAPI: + case ATAPI_PROT_PIO: pdc_fill_sg(qc); break; - - case ATA_PROT_ATAPI_DMA: + case ATAPI_PROT_DMA: pdc_fill_sg(qc); /*FALLTHROUGH*/ - case ATA_PROT_ATAPI_NODATA: + case ATAPI_PROT_NODATA: pdc_atapi_pkt(qc); break; - default: break; } } +static int pdc_is_sataii_tx4(unsigned long flags) +{ + const unsigned long mask = PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS; + return (flags & mask) == mask; +} + +static unsigned int pdc_port_no_to_ata_no(unsigned int port_no, + int is_sataii_tx4) +{ + static const unsigned char sataii_tx4_port_remap[4] = { 3, 1, 0, 2}; + return is_sataii_tx4 ? sataii_tx4_port_remap[port_no] : port_no; +} + +static unsigned int pdc_sata_nr_ports(const struct ata_port *ap) +{ + return (ap->flags & PDC_FLAG_4_PORTS) ? 4 : 2; +} + +static unsigned int pdc_sata_ata_port_to_ata_no(const struct ata_port *ap) +{ + const struct ata_host *host = ap->host; + unsigned int nr_ports = pdc_sata_nr_ports(ap); + unsigned int i; + + for (i = 0; i < nr_ports && host->ports[i] != ap; ++i) + ; + BUG_ON(i >= nr_ports); + return pdc_port_no_to_ata_no(i, pdc_is_sataii_tx4(ap->flags)); +} + +static unsigned int pdc_sata_hotplug_offset(const struct ata_port *ap) +{ + return (ap->flags & PDC_FLAG_GEN_II) ? PDC2_SATA_PLUG_CSR : PDC_SATA_PLUG_CSR; +} + static void pdc_freeze(struct ata_port *ap) { - void __iomem *mmio = ap->ioaddr.cmd_addr; + void __iomem *ata_mmio = ap->ioaddr.cmd_addr; u32 tmp; - tmp = readl(mmio + PDC_CTLSTAT); + tmp = readl(ata_mmio + PDC_CTLSTAT); tmp |= PDC_IRQ_DISABLE; tmp &= ~PDC_DMA_ENABLE; - writel(tmp, mmio + PDC_CTLSTAT); - readl(mmio + PDC_CTLSTAT); /* flush */ + writel(tmp, ata_mmio + PDC_CTLSTAT); + readl(ata_mmio + PDC_CTLSTAT); /* flush */ +} + +static void pdc_sata_freeze(struct ata_port *ap) +{ + struct ata_host *host = ap->host; + void __iomem *host_mmio = host->iomap[PDC_MMIO_BAR]; + unsigned int hotplug_offset = pdc_sata_hotplug_offset(ap); + unsigned int ata_no = pdc_sata_ata_port_to_ata_no(ap); + u32 hotplug_status; + + /* Disable hotplug events on this port. + * + * Locking: + * 1) hotplug register accesses must be serialised via host->lock + * 2) ap->lock == &ap->host->lock + * 3) ->freeze() and ->thaw() are called with ap->lock held + */ + hotplug_status = readl(host_mmio + hotplug_offset); + hotplug_status |= 0x11 << (ata_no + 16); + writel(hotplug_status, host_mmio + hotplug_offset); + readl(host_mmio + hotplug_offset); /* flush */ + + pdc_freeze(ap); } static void pdc_thaw(struct ata_port *ap) { - void __iomem *mmio = ap->ioaddr.cmd_addr; + void __iomem *ata_mmio = ap->ioaddr.cmd_addr; u32 tmp; /* clear IRQ */ - readl(mmio + PDC_INT_SEQMASK); + readl(ata_mmio + PDC_COMMAND); /* turn IRQ back on */ - tmp = readl(mmio + PDC_CTLSTAT); + tmp = readl(ata_mmio + PDC_CTLSTAT); tmp &= ~PDC_IRQ_DISABLE; - writel(tmp, mmio + PDC_CTLSTAT); - readl(mmio + PDC_CTLSTAT); /* flush */ + writel(tmp, ata_mmio + PDC_CTLSTAT); + readl(ata_mmio + PDC_CTLSTAT); /* flush */ } -static void pdc_common_error_handler(struct ata_port *ap, ata_reset_fn_t hardreset) +static void pdc_sata_thaw(struct ata_port *ap) { - if (!(ap->pflags & ATA_PFLAG_FROZEN)) - pdc_reset_port(ap); + struct ata_host *host = ap->host; + void __iomem *host_mmio = host->iomap[PDC_MMIO_BAR]; + unsigned int hotplug_offset = pdc_sata_hotplug_offset(ap); + unsigned int ata_no = pdc_sata_ata_port_to_ata_no(ap); + u32 hotplug_status; - /* perform recovery */ - ata_do_eh(ap, ata_std_prereset, ata_std_softreset, hardreset, - ata_std_postreset); -} + pdc_thaw(ap); -static void pdc_pata_error_handler(struct ata_port *ap) -{ - pdc_common_error_handler(ap, NULL); + /* Enable hotplug events on this port. + * Locking: see pdc_sata_freeze(). + */ + hotplug_status = readl(host_mmio + hotplug_offset); + hotplug_status |= 0x11 << ata_no; + hotplug_status &= ~(0x11 << (ata_no + 16)); + writel(hotplug_status, host_mmio + hotplug_offset); + readl(host_mmio + hotplug_offset); /* flush */ } -static void pdc_sata_error_handler(struct ata_port *ap) +static void pdc_error_handler(struct ata_port *ap) { - pdc_common_error_handler(ap, sata_std_hardreset); + if (!(ap->pflags & ATA_PFLAG_FROZEN)) + pdc_reset_port(ap); + + ata_std_error_handler(ap); } static void pdc_post_internal_cmd(struct ata_queued_cmd *qc) @@ -733,11 +745,11 @@ static void pdc_error_intr(struct ata_port *ap, struct ata_queued_cmd *qc, ata_port_abort(ap); } -static inline unsigned int pdc_host_intr(struct ata_port *ap, - struct ata_queued_cmd *qc) +static unsigned int pdc_host_intr(struct ata_port *ap, + struct ata_queued_cmd *qc) { unsigned int handled = 0; - void __iomem *port_mmio = ap->ioaddr.cmd_addr; + void __iomem *ata_mmio = ap->ioaddr.cmd_addr; u32 port_status, err_mask; err_mask = PDC_ERR_MASK; @@ -745,7 +757,7 @@ static inline unsigned int pdc_host_intr(struct ata_port *ap, err_mask &= ~PDC1_ERR_MASK; else err_mask &= ~PDC2_ERR_MASK; - port_status = readl(port_mmio + PDC_GLOBAL_CTL); + port_status = readl(ata_mmio + PDC_GLOBAL_CTL); if (unlikely(port_status & err_mask)) { pdc_error_intr(ap, qc, port_status, err_mask); return 1; @@ -754,13 +766,12 @@ static inline unsigned int pdc_host_intr(struct ata_port *ap, switch (qc->tf.protocol) { case ATA_PROT_DMA: case ATA_PROT_NODATA: - case ATA_PROT_ATAPI_DMA: - case ATA_PROT_ATAPI_NODATA: + case ATAPI_PROT_DMA: + case ATAPI_PROT_NODATA: qc->err_mask |= ac_err_mask(ata_wait_idle(ap)); ata_qc_complete(qc); handled = 1; break; - default: ap->stats.idle_irq++; break; @@ -771,23 +782,9 @@ static inline unsigned int pdc_host_intr(struct ata_port *ap, static void pdc_irq_clear(struct ata_port *ap) { - struct ata_host *host = ap->host; - void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; - - readl(mmio + PDC_INT_SEQMASK); -} - -static int pdc_is_sataii_tx4(unsigned long flags) -{ - const unsigned long mask = PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS; - return (flags & mask) == mask; -} + void __iomem *ata_mmio = ap->ioaddr.cmd_addr; -static unsigned int pdc_port_no_to_ata_no(unsigned int port_no, - int is_sataii_tx4) -{ - static const unsigned char sataii_tx4_port_remap[4] = { 3, 1, 0, 2}; - return is_sataii_tx4 ? sataii_tx4_port_remap[port_no] : port_no; + readl(ata_mmio + PDC_COMMAND); } static irqreturn_t pdc_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs) @@ -797,7 +794,7 @@ static irqreturn_t pdc_interrupt(int irq, void *dev_instance, struct pt_regs *pt u32 mask = 0; unsigned int i, tmp; unsigned int handled = 0; - void __iomem *mmio_base; + void __iomem *host_mmio; unsigned int hotplug_offset, ata_no; u32 hotplug_status; int is_sataii_tx4; @@ -809,35 +806,35 @@ static irqreturn_t pdc_interrupt(int irq, void *dev_instance, struct pt_regs *pt return IRQ_NONE; } - mmio_base = host->iomap[PDC_MMIO_BAR]; + host_mmio = host->iomap[PDC_MMIO_BAR]; + + spin_lock(&host->lock); /* read and clear hotplug flags for all ports */ if (host->ports[0]->flags & PDC_FLAG_GEN_II) hotplug_offset = PDC2_SATA_PLUG_CSR; else hotplug_offset = PDC_SATA_PLUG_CSR; - hotplug_status = readl(mmio_base + hotplug_offset); + hotplug_status = readl(host_mmio + hotplug_offset); if (hotplug_status & 0xff) - writel(hotplug_status | 0xff, mmio_base + hotplug_offset); + writel(hotplug_status | 0xff, host_mmio + hotplug_offset); hotplug_status &= 0xff; /* clear uninteresting bits */ /* reading should also clear interrupts */ - mask = readl(mmio_base + PDC_INT_SEQMASK); + mask = readl(host_mmio + PDC_INT_SEQMASK); if (mask == 0xffffffff && hotplug_status == 0) { VPRINTK("QUICK EXIT 2\n"); - return IRQ_NONE; + goto done_irq; } - spin_lock(&host->lock); - - mask &= 0xffff; /* only 16 tags possible */ + mask &= 0xffff; /* only 16 SEQIDs possible */ if (mask == 0 && hotplug_status == 0) { VPRINTK("QUICK EXIT 3\n"); goto done_irq; } - writel(mask, mmio_base + PDC_INT_SEQMASK); + writel(mask, host_mmio + PDC_INT_SEQMASK); is_sataii_tx4 = pdc_is_sataii_tx4(host->ports[0]->flags); @@ -878,29 +875,30 @@ done_irq: return IRQ_RETVAL(handled); } -static inline void pdc_packet_start(struct ata_queued_cmd *qc) +static void pdc_packet_start(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct pdc_port_priv *pp = ap->private_data; - void __iomem *mmio = ap->host->iomap[PDC_MMIO_BAR]; + void __iomem *host_mmio = ap->host->iomap[PDC_MMIO_BAR]; + void __iomem *ata_mmio = ap->ioaddr.cmd_addr; unsigned int port_no = ap->port_no; u8 seq = (u8) (port_no + 1); VPRINTK("ENTER, ap %p\n", ap); - writel(0x00000001, mmio + (seq * 4)); - readl(mmio + (seq * 4)); /* flush */ + writel(0x00000001, host_mmio + (seq * 4)); + readl(host_mmio + (seq * 4)); /* flush */ pp->pkt[2] = seq; wmb(); /* flush PRD, pkt writes */ - writel(pp->pkt_dma, ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); - readl(ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); /* flush */ + writel(pp->pkt_dma, ata_mmio + PDC_PKT_SUBMIT); + readl(ata_mmio + PDC_PKT_SUBMIT); /* flush */ } -static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc) +static unsigned int pdc_qc_issue(struct ata_queued_cmd *qc) { switch (qc->tf.protocol) { - case ATA_PROT_ATAPI_NODATA: + case ATAPI_PROT_NODATA: if (qc->dev->flags & ATA_DFLAG_CDB_INTR) break; /*FALLTHROUGH*/ @@ -908,31 +906,27 @@ static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc) if (qc->tf.flags & ATA_TFLAG_POLLING) break; /*FALLTHROUGH*/ - case ATA_PROT_ATAPI_DMA: + case ATAPI_PROT_DMA: case ATA_PROT_DMA: pdc_packet_start(qc); return 0; - default: break; } - - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) { - WARN_ON(tf->protocol == ATA_PROT_DMA || - tf->protocol == ATA_PROT_ATAPI_DMA); - ata_tf_load(ap, tf); + WARN_ON(tf->protocol == ATA_PROT_DMA || tf->protocol == ATAPI_PROT_DMA); + ata_sff_tf_load(ap, tf); } static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf) { - WARN_ON(tf->protocol == ATA_PROT_DMA || - tf->protocol == ATA_PROT_ATAPI_DMA); - ata_exec_command(ap, tf); + WARN_ON(tf->protocol == ATA_PROT_DMA || tf->protocol == ATAPI_PROT_DMA); + ata_sff_exec_command(ap, tf); } static int pdc_check_atapi_dma(struct ata_queued_cmd *qc) @@ -992,7 +986,7 @@ static void pdc_ata_setup_port(struct ata_port *ap, static void pdc_host_init(struct ata_host *host) { - void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; + void __iomem *host_mmio = host->iomap[PDC_MMIO_BAR]; int is_gen2 = host->ports[0]->flags & PDC_FLAG_GEN_II; int hotplug_offset; u32 tmp; @@ -1009,38 +1003,38 @@ static void pdc_host_init(struct ata_host *host) */ /* enable BMR_BURST, maybe change FIFO_SHD to 8 dwords */ - tmp = readl(mmio + PDC_FLASH_CTL); + tmp = readl(host_mmio + PDC_FLASH_CTL); tmp |= 0x02000; /* bit 13 (enable bmr burst) */ if (!is_gen2) tmp |= 0x10000; /* bit 16 (fifo threshold at 8 dw) */ - writel(tmp, mmio + PDC_FLASH_CTL); + writel(tmp, host_mmio + PDC_FLASH_CTL); /* clear plug/unplug flags for all ports */ - tmp = readl(mmio + hotplug_offset); - writel(tmp | 0xff, mmio + hotplug_offset); + tmp = readl(host_mmio + hotplug_offset); + writel(tmp | 0xff, host_mmio + hotplug_offset); /* unmask plug/unplug ints */ - tmp = readl(mmio + hotplug_offset); - writel(tmp & ~0xff0000, mmio + hotplug_offset); + tmp = readl(host_mmio + hotplug_offset); + writel(tmp & ~0xff0000, host_mmio + hotplug_offset); /* don't initialise TBG or SLEW on 2nd generation chips */ if (is_gen2) return; /* reduce TBG clock to 133 Mhz. */ - tmp = readl(mmio + PDC_TBG_MODE); + tmp = readl(host_mmio + PDC_TBG_MODE); tmp &= ~0x30000; /* clear bit 17, 16*/ tmp |= 0x10000; /* set bit 17:16 = 0:1 */ - writel(tmp, mmio + PDC_TBG_MODE); + writel(tmp, host_mmio + PDC_TBG_MODE); - readl(mmio + PDC_TBG_MODE); /* flush */ + readl(host_mmio + PDC_TBG_MODE); /* flush */ msleep(10); /* adjust slew rate control register. */ - tmp = readl(mmio + PDC_SLEW_CTL); + tmp = readl(host_mmio + PDC_SLEW_CTL); tmp &= 0xFFFFF03F; /* clear bit 11 ~ 6 */ tmp |= 0x00000900; /* set bit 11-9 = 100b , bit 8-6 = 100 */ - writel(tmp, mmio + PDC_SLEW_CTL); + writel(tmp, host_mmio + PDC_SLEW_CTL); } static int pdc_ata_init_one(struct pci_dev *pdev, @@ -1050,7 +1044,7 @@ static int pdc_ata_init_one(struct pci_dev *pdev, const struct ata_port_info *pi = &pdc_port_info[ent->driver_data]; const struct ata_port_info *ppi[PDC_MAX_PORTS]; struct ata_host *host; - void __iomem *base; + void __iomem *host_mmio; int n_ports, i, rc; int is_sataii_tx4; @@ -1067,7 +1061,7 @@ static int pdc_ata_init_one(struct pci_dev *pdev, pcim_pin_device(pdev); if (rc) return rc; - base = pcim_iomap_table(pdev)[PDC_MMIO_BAR]; + host_mmio = pcim_iomap_table(pdev)[PDC_MMIO_BAR]; /* determine port configuration and setup host */ n_ports = 2; @@ -1077,7 +1071,7 @@ static int pdc_ata_init_one(struct pci_dev *pdev, ppi[i] = pi; if (pi->flags & PDC_FLAG_SATA_PATA) { - u8 tmp = readb(base + PDC_FLASH_CTL+1); + u8 tmp = readb(host_mmio + PDC_FLASH_CTL + 1); if (!(tmp & 0x80)) ppi[n_ports++] = pi + 1; } @@ -1093,13 +1087,13 @@ static int pdc_ata_init_one(struct pci_dev *pdev, for (i = 0; i < host->n_ports; i++) { struct ata_port *ap = host->ports[i]; unsigned int ata_no = pdc_port_no_to_ata_no(i, is_sataii_tx4); - unsigned int port_offset = 0x200 + ata_no * 0x80; + unsigned int ata_offset = 0x200 + ata_no * 0x80; unsigned int scr_offset = 0x400 + ata_no * 0x100; - pdc_ata_setup_port(ap, base + port_offset, base + scr_offset); + pdc_ata_setup_port(ap, host_mmio + ata_offset, host_mmio + scr_offset); ata_port_pbar_desc(ap, PDC_MMIO_BAR, -1, "mmio"); - ata_port_pbar_desc(ap, PDC_MMIO_BAR, port_offset, "port"); + ata_port_pbar_desc(ap, PDC_MMIO_BAR, ata_offset, "ata"); } /* initialize adapter */ diff --git a/drivers/ata/sata_qstor.c b/drivers/ata/sata_qstor.c index ba6eb62..e0b8e99 100644 --- a/drivers/ata/sata_qstor.c +++ b/drivers/ata/sata_qstor.c @@ -121,50 +121,38 @@ static unsigned int qs_qc_issue(struct ata_queued_cmd *qc); static int qs_check_atapi_dma(struct ata_queued_cmd *qc); static void qs_bmdma_stop(struct ata_queued_cmd *qc); static u8 qs_bmdma_status(struct ata_port *ap); -static void qs_irq_clear(struct ata_port *ap); static void qs_freeze(struct ata_port *ap); static void qs_thaw(struct ata_port *ap); +static int qs_prereset(struct ata_link *link, unsigned long deadline); static void qs_error_handler(struct ata_port *ap); static struct scsi_host_template qs_ata_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, + ATA_BASE_SHT(DRV_NAME), .sg_tablesize = QS_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ENABLE_CLUSTERING, - .proc_name = DRV_NAME, .dma_boundary = QS_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, }; -static const struct ata_port_operations qs_ata_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, +static struct ata_port_operations qs_ata_ops = { + .inherits = &ata_sff_port_ops, + .check_atapi_dma = qs_check_atapi_dma, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, + .bmdma_stop = qs_bmdma_stop, + .bmdma_status = qs_bmdma_status, .qc_prep = qs_qc_prep, .qc_issue = qs_qc_issue, - .data_xfer = ata_data_xfer, + .freeze = qs_freeze, .thaw = qs_thaw, + .prereset = qs_prereset, + .softreset = ATA_OP_NULL, .error_handler = qs_error_handler, - .irq_clear = qs_irq_clear, - .irq_on = ata_irq_on, + .post_internal_cmd = ATA_OP_NULL, + .scr_read = qs_scr_read, .scr_write = qs_scr_write, + .port_start = qs_port_start, .host_stop = qs_host_stop, - .bmdma_stop = qs_bmdma_stop, - .bmdma_status = qs_bmdma_status, }; static const struct ata_port_info qs_port_info[] = { @@ -211,11 +199,6 @@ static u8 qs_bmdma_status(struct ata_port *ap) return 0; } -static void qs_irq_clear(struct ata_port *ap) -{ - /* nothing */ -} - static inline void qs_enter_reg_mode(struct ata_port *ap) { u8 __iomem *chan = qs_mmio_base(ap->host) + (ap->port_no * 0x4000); @@ -256,7 +239,7 @@ static int qs_prereset(struct ata_link *link, unsigned long deadline) struct ata_port *ap = link->ap; qs_reset_channel_logic(ap); - return ata_std_prereset(link, deadline); + return ata_sff_prereset(link, deadline); } static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) @@ -270,8 +253,7 @@ static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) static void qs_error_handler(struct ata_port *ap) { qs_enter_reg_mode(ap); - ata_do_eh(ap, qs_prereset, ata_std_softreset, NULL, - ata_std_postreset); + ata_std_error_handler(ap); } static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) @@ -326,7 +308,7 @@ static void qs_qc_prep(struct ata_queued_cmd *qc) qs_enter_reg_mode(qc->ap); if (qc->tf.protocol != ATA_PROT_DMA) { - ata_qc_prep(qc); + ata_sff_qc_prep(qc); return; } @@ -376,7 +358,7 @@ static unsigned int qs_qc_issue(struct ata_queued_cmd *qc) qs_packet_start(qc); return 0; - case ATA_PROT_ATAPI_DMA: + case ATAPI_PROT_DMA: BUG(); break; @@ -385,7 +367,7 @@ static unsigned int qs_qc_issue(struct ata_queued_cmd *qc) } pp->state = qs_state_mmio; - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } static void qs_do_or_die(struct ata_queued_cmd *qc, u8 status) @@ -474,7 +456,7 @@ static inline unsigned int qs_intr_mmio(struct ata_host *host) * and pretend we knew it was ours.. (ugh). * This does not affect packet mode. */ - ata_check_status(ap); + ata_sff_check_status(ap); handled = 1; continue; } @@ -482,13 +464,13 @@ static inline unsigned int qs_intr_mmio(struct ata_host *host) if (!pp || pp->state != qs_state_mmio) continue; if (!(qc->tf.flags & ATA_TFLAG_POLLING)) - handled |= ata_host_intr(ap, qc); + handled |= ata_sff_host_intr(ap, qc); } } return handled; } -static irqreturn_t qs_intr(int irq, void *dev_instance, struct pt_regs *pt_regs) +static irqreturn_t qs_intr(int irq, void *dev_instance, struct pt_regs *regs) { struct ata_host *host = dev_instance; unsigned int handled = 0; diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c index ee0ae7c..77e5a9b 100644 --- a/drivers/ata/sata_sil.c +++ b/drivers/ata/sata_sil.c @@ -60,7 +60,6 @@ enum { SIL_DFL_PORT_FLAGS = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | ATA_FLAG_MMIO, - SIL_DFL_LINK_FLAGS = ATA_LFLAG_HRST_TO_RESUME, /* * Controller IDs @@ -168,54 +167,23 @@ static struct pci_driver sil_pci_driver = { }; static struct scsi_host_template sil_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations sil_ops = { +static struct ata_port_operations sil_ops = { + .inherits = &ata_bmdma_port_ops, .dev_config = sil_dev_config, - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, .set_mode = sil_set_mode, - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, .freeze = sil_freeze, .thaw = sil_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, .scr_read = sil_scr_read, .scr_write = sil_scr_write, - .port_start = ata_port_start, }; static const struct ata_port_info sil_port_info[] = { /* sil_3112 */ { .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_MOD15WRITE, - .link_flags = SIL_DFL_LINK_FLAGS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA5, @@ -225,7 +193,6 @@ static const struct ata_port_info sil_port_info[] = { { .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_MOD15WRITE | SIL_FLAG_NO_SATA_IRQ, - .link_flags = SIL_DFL_LINK_FLAGS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA5, @@ -234,7 +201,6 @@ static const struct ata_port_info sil_port_info[] = { /* sil_3512 */ { .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT, - .link_flags = SIL_DFL_LINK_FLAGS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA5, @@ -243,7 +209,6 @@ static const struct ata_port_info sil_port_info[] = { /* sil_3114 */ { .flags = SIL_DFL_PORT_FLAGS | SIL_FLAG_RERR_ON_DMA_ACT, - .link_flags = SIL_DFL_LINK_FLAGS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA5, @@ -404,7 +369,7 @@ static void sil_host_intr(struct ata_port *ap, u32 bmdma2) if (unlikely(!qc || (qc->tf.flags & ATA_TFLAG_POLLING))) { /* this sometimes happens, just clear IRQ */ - ata_chk_status(ap); + ap->ops->sff_check_status(ap); return; } @@ -416,15 +381,14 @@ static void sil_host_intr(struct ata_port *ap, u32 bmdma2) */ /* Check the ATA_DFLAG_CDB_INTR flag is enough here. - * The flag was turned on only for atapi devices. - * No need to check is_atapi_taskfile(&qc->tf) again. + * The flag was turned on only for atapi devices. No + * need to check ata_is_atapi(qc->tf.protocol) again. */ if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) goto err_hsm; break; case HSM_ST_LAST: - if (qc->tf.protocol == ATA_PROT_DMA || - qc->tf.protocol == ATA_PROT_ATAPI_DMA) { + if (ata_is_dma(qc->tf.protocol)) { /* clear DMA-Start bit */ ap->ops->bmdma_stop(qc); @@ -441,18 +405,17 @@ static void sil_host_intr(struct ata_port *ap, u32 bmdma2) } /* check main status, clearing INTRQ */ - status = ata_chk_status(ap); + status = ap->ops->sff_check_status(ap); if (unlikely(status & ATA_BUSY)) goto err_hsm; /* ack bmdma irq events */ - ata_bmdma_irq_clear(ap); + ata_sff_irq_clear(ap); /* kick HSM in the ass */ - ata_hsm_move(ap, qc, status, 0); + ata_sff_hsm_move(ap, qc, status, 0); - if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || - qc->tf.protocol == ATA_PROT_ATAPI_DMA)) + if (unlikely(qc->err_mask) && ata_is_dma(qc->tf.protocol)) ata_ehi_push_desc(ehi, "BMDMA2 stat 0x%x", bmdma2); return; @@ -463,7 +426,8 @@ static void sil_host_intr(struct ata_port *ap, u32 bmdma2) ata_port_freeze(ap); } -static irqreturn_t sil_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs) +static irqreturn_t sil_interrupt(int irq, void *dev_instance, + struct pt_regs *regs) { struct ata_host *host = dev_instance; void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR]; @@ -517,8 +481,8 @@ static void sil_thaw(struct ata_port *ap) u32 tmp; /* clear IRQ */ - ata_chk_status(ap); - ata_bmdma_irq_clear(ap); + ap->ops->sff_check_status(ap); + ata_sff_irq_clear(ap); /* turn on SATA IRQ if supported */ if (!(ap->flags & SIL_FLAG_NO_SATA_IRQ)) @@ -692,7 +656,7 @@ static int sil_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) ioaddr->ctl_addr = mmio_base + sil_port[i].ctl; ioaddr->bmdma_addr = mmio_base + sil_port[i].bmdma; ioaddr->scr_addr = mmio_base + sil_port[i].scr; - ata_std_ports(ioaddr); + ata_sff_std_ports(ioaddr); ata_port_pbar_desc(ap, SIL_MMIO_BAR, -1, "mmio"); ata_port_pbar_desc(ap, SIL_MMIO_BAR, sil_port[i].tf, "tf"); diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c index 90b5b83..e95c2bc 100644 --- a/drivers/ata/sata_sil24.c +++ b/drivers/ata/sata_sil24.c @@ -254,7 +254,6 @@ enum { ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA | ATA_FLAG_NCQ | ATA_FLAG_ACPI_SATA | ATA_FLAG_AN | ATA_FLAG_PMP, - SIL24_COMMON_LFLAGS = ATA_LFLAG_SKIP_D2H_BSY, SIL24_FLAG_PCIX_IRQ_WOC = (1 << 24), /* IRQ loss errata on PCI-X */ IRQ_STAT_4PORTS = 0xf, @@ -286,45 +285,45 @@ static struct sil24_cerr_info { "device error via D2H FIS" }, [PORT_CERR_SDB] = { AC_ERR_DEV, 0, "device error via SDB FIS" }, - [PORT_CERR_DATA] = { AC_ERR_ATA_BUS, ATA_EH_SOFTRESET, + [PORT_CERR_DATA] = { AC_ERR_ATA_BUS, ATA_EH_RESET, "error in data FIS" }, - [PORT_CERR_SEND] = { AC_ERR_ATA_BUS, ATA_EH_SOFTRESET, + [PORT_CERR_SEND] = { AC_ERR_ATA_BUS, ATA_EH_RESET, "failed to transmit command FIS" }, - [PORT_CERR_INCONSISTENT] = { AC_ERR_HSM, ATA_EH_SOFTRESET, + [PORT_CERR_INCONSISTENT] = { AC_ERR_HSM, ATA_EH_RESET, "protocol mismatch" }, - [PORT_CERR_DIRECTION] = { AC_ERR_HSM, ATA_EH_SOFTRESET, + [PORT_CERR_DIRECTION] = { AC_ERR_HSM, ATA_EH_RESET, "data directon mismatch" }, - [PORT_CERR_UNDERRUN] = { AC_ERR_HSM, ATA_EH_SOFTRESET, + [PORT_CERR_UNDERRUN] = { AC_ERR_HSM, ATA_EH_RESET, "ran out of SGEs while writing" }, - [PORT_CERR_OVERRUN] = { AC_ERR_HSM, ATA_EH_SOFTRESET, + [PORT_CERR_OVERRUN] = { AC_ERR_HSM, ATA_EH_RESET, "ran out of SGEs while reading" }, - [PORT_CERR_PKT_PROT] = { AC_ERR_HSM, ATA_EH_SOFTRESET, + [PORT_CERR_PKT_PROT] = { AC_ERR_HSM, ATA_EH_RESET, "invalid data directon for ATAPI CDB" }, - [PORT_CERR_SGT_BOUNDARY] = { AC_ERR_SYSTEM, ATA_EH_SOFTRESET, - "SGT no on qword boundary" }, - [PORT_CERR_SGT_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET, + [PORT_CERR_SGT_BOUNDARY] = { AC_ERR_SYSTEM, ATA_EH_RESET, + "SGT not on qword boundary" }, + [PORT_CERR_SGT_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET, "PCI target abort while fetching SGT" }, - [PORT_CERR_SGT_MSTABRT] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET, + [PORT_CERR_SGT_MSTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET, "PCI master abort while fetching SGT" }, - [PORT_CERR_SGT_PCIPERR] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET, + [PORT_CERR_SGT_PCIPERR] = { AC_ERR_HOST_BUS, ATA_EH_RESET, "PCI parity error while fetching SGT" }, - [PORT_CERR_CMD_BOUNDARY] = { AC_ERR_SYSTEM, ATA_EH_SOFTRESET, + [PORT_CERR_CMD_BOUNDARY] = { AC_ERR_SYSTEM, ATA_EH_RESET, "PRB not on qword boundary" }, - [PORT_CERR_CMD_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET, + [PORT_CERR_CMD_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET, "PCI target abort while fetching PRB" }, - [PORT_CERR_CMD_MSTABRT] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET, + [PORT_CERR_CMD_MSTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET, "PCI master abort while fetching PRB" }, - [PORT_CERR_CMD_PCIPERR] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET, + [PORT_CERR_CMD_PCIPERR] = { AC_ERR_HOST_BUS, ATA_EH_RESET, "PCI parity error while fetching PRB" }, - [PORT_CERR_XFR_UNDEF] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET, + [PORT_CERR_XFR_UNDEF] = { AC_ERR_HOST_BUS, ATA_EH_RESET, "undefined error while transferring data" }, - [PORT_CERR_XFR_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET, + [PORT_CERR_XFR_TGTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET, "PCI target abort while transferring data" }, - [PORT_CERR_XFR_MSTABRT] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET, + [PORT_CERR_XFR_MSTABRT] = { AC_ERR_HOST_BUS, ATA_EH_RESET, "PCI master abort while transferring data" }, - [PORT_CERR_XFR_PCIPERR] = { AC_ERR_HOST_BUS, ATA_EH_SOFTRESET, + [PORT_CERR_XFR_PCIPERR] = { AC_ERR_HOST_BUS, ATA_EH_RESET, "PCI parity error while transferring data" }, - [PORT_CERR_SENDSERVICE] = { AC_ERR_HSM, ATA_EH_SOFTRESET, + [PORT_CERR_SENDSERVICE] = { AC_ERR_HSM, ATA_EH_RESET, "FIS received while sending service FIS" }, }; @@ -337,23 +336,26 @@ static struct sil24_cerr_info { struct sil24_port_priv { union sil24_cmd_block *cmd_block; /* 32 cmd blocks */ dma_addr_t cmd_block_dma; /* DMA base addr for them */ - struct ata_taskfile tf; /* Cached taskfile registers */ int do_port_rst; }; static void sil24_dev_config(struct ata_device *dev); -static u8 sil24_check_status(struct ata_port *ap); static int sil24_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val); static int sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val); -static void sil24_tf_read(struct ata_port *ap, struct ata_taskfile *tf); static int sil24_qc_defer(struct ata_queued_cmd *qc); static void sil24_qc_prep(struct ata_queued_cmd *qc); static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc); -static void sil24_irq_clear(struct ata_port *ap); +static bool sil24_qc_fill_rtf(struct ata_queued_cmd *qc); static void sil24_pmp_attach(struct ata_port *ap); static void sil24_pmp_detach(struct ata_port *ap); static void sil24_freeze(struct ata_port *ap); static void sil24_thaw(struct ata_port *ap); +static int sil24_softreset(struct ata_link *link, unsigned int *class, + unsigned long deadline); +static int sil24_hardreset(struct ata_link *link, unsigned int *class, + unsigned long deadline); +static int sil24_pmp_hardreset(struct ata_link *link, unsigned int *class, + unsigned long deadline); static void sil24_error_handler(struct ata_port *ap); static void sil24_post_internal_cmd(struct ata_queued_cmd *qc); static int sil24_port_start(struct ata_port *ap); @@ -386,52 +388,36 @@ static struct pci_driver sil24_pci_driver = { }; static struct scsi_host_template sil24_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .change_queue_depth = ata_scsi_change_queue_depth, + ATA_NCQ_SHT(DRV_NAME), .can_queue = SIL24_MAX_CMDS, - .this_id = ATA_SHT_THIS_ID, .sg_tablesize = SIL24_MAX_SGE, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, }; -static const struct ata_port_operations sil24_ops = { - .dev_config = sil24_dev_config, - - .check_status = sil24_check_status, - .check_altstatus = sil24_check_status, - .dev_select = ata_noop_dev_select, - - .tf_read = sil24_tf_read, +static struct ata_port_operations sil24_ops = { + .inherits = &sata_pmp_port_ops, .qc_defer = sil24_qc_defer, .qc_prep = sil24_qc_prep, .qc_issue = sil24_qc_issue, + .qc_fill_rtf = sil24_qc_fill_rtf, - .irq_clear = sil24_irq_clear, + .freeze = sil24_freeze, + .thaw = sil24_thaw, + .softreset = sil24_softreset, + .hardreset = sil24_hardreset, + .pmp_softreset = sil24_softreset, + .pmp_hardreset = sil24_pmp_hardreset, + .error_handler = sil24_error_handler, + .post_internal_cmd = sil24_post_internal_cmd, + .dev_config = sil24_dev_config, .scr_read = sil24_scr_read, .scr_write = sil24_scr_write, - .pmp_attach = sil24_pmp_attach, .pmp_detach = sil24_pmp_detach, - .freeze = sil24_freeze, - .thaw = sil24_thaw, - .error_handler = sil24_error_handler, - .post_internal_cmd = sil24_post_internal_cmd, - .port_start = sil24_port_start, - #ifdef CONFIG_PM .port_resume = sil24_port_resume, #endif @@ -449,7 +435,6 @@ static const struct ata_port_info sil24_port_info[] = { { .flags = SIL24_COMMON_FLAGS | SIL24_NPORTS2FLAG(4) | SIL24_FLAG_PCIX_IRQ_WOC, - .link_flags = SIL24_COMMON_LFLAGS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA5, /* udma0-5 */ @@ -458,7 +443,6 @@ static const struct ata_port_info sil24_port_info[] = { /* sil_3132 */ { .flags = SIL24_COMMON_FLAGS | SIL24_NPORTS2FLAG(2), - .link_flags = SIL24_COMMON_LFLAGS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA5, /* udma0-5 */ @@ -467,7 +451,6 @@ static const struct ata_port_info sil24_port_info[] = { /* sil_3131/sil_3531 */ { .flags = SIL24_COMMON_FLAGS | SIL24_NPORTS2FLAG(1), - .link_flags = SIL24_COMMON_LFLAGS, .pio_mask = 0x1f, /* pio0-4 */ .mwdma_mask = 0x07, /* mwdma0-2 */ .udma_mask = ATA_UDMA5, /* udma0-5 */ @@ -482,9 +465,19 @@ static int sil24_tag(int tag) return tag; } +static unsigned long sil24_port_offset(struct ata_port *ap) +{ + return ap->port_no * PORT_REGS_SIZE; +} + +static void __iomem *sil24_port_base(struct ata_port *ap) +{ + return ap->host->iomap[SIL24_PORT_BAR] + sil24_port_offset(ap); +} + static void sil24_dev_config(struct ata_device *dev) { - void __iomem *port = dev->link->ap->ioaddr.cmd_addr; + void __iomem *port = sil24_port_base(dev->link->ap); if (dev->cdb_len == 16) writel(PORT_CS_CDB16, port + PORT_CTRL_STAT); @@ -494,7 +487,7 @@ static void sil24_dev_config(struct ata_device *dev) static void sil24_read_tf(struct ata_port *ap, int tag, struct ata_taskfile *tf) { - void __iomem *port = ap->ioaddr.cmd_addr; + void __iomem *port = sil24_port_base(ap); struct sil24_prb __iomem *prb; u8 fis[6 * 4]; @@ -503,12 +496,6 @@ static void sil24_read_tf(struct ata_port *ap, int tag, struct ata_taskfile *tf) ata_tf_from_fis(fis, tf); } -static u8 sil24_check_status(struct ata_port *ap) -{ - struct sil24_port_priv *pp = ap->private_data; - return pp->tf.command; -} - static int sil24_scr_map[] = { [SCR_CONTROL] = 0, [SCR_STATUS] = 1, @@ -518,7 +505,7 @@ static int sil24_scr_map[] = { static int sil24_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val) { - void __iomem *scr_addr = ap->ioaddr.scr_addr; + void __iomem *scr_addr = sil24_port_base(ap) + PORT_SCONTROL; if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { void __iomem *addr; @@ -531,7 +518,7 @@ static int sil24_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val) static int sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) { - void __iomem *scr_addr = ap->ioaddr.scr_addr; + void __iomem *scr_addr = sil24_port_base(ap) + PORT_SCONTROL; if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { void __iomem *addr; @@ -542,15 +529,9 @@ static int sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) return -EINVAL; } -static void sil24_tf_read(struct ata_port *ap, struct ata_taskfile *tf) -{ - struct sil24_port_priv *pp = ap->private_data; - *tf = pp->tf; -} - static void sil24_config_port(struct ata_port *ap) { - void __iomem *port = ap->ioaddr.cmd_addr; + void __iomem *port = sil24_port_base(ap); /* configure IRQ WoC */ if (ap->flags & SIL24_FLAG_PCIX_IRQ_WOC) @@ -575,7 +556,7 @@ static void sil24_config_port(struct ata_port *ap) static void sil24_config_pmp(struct ata_port *ap, int attached) { - void __iomem *port = ap->ioaddr.cmd_addr; + void __iomem *port = sil24_port_base(ap); if (attached) writel(PORT_CS_PMP_EN, port + PORT_CTRL_STAT); @@ -585,7 +566,7 @@ static void sil24_config_pmp(struct ata_port *ap, int attached) static void sil24_clear_pmp(struct ata_port *ap) { - void __iomem *port = ap->ioaddr.cmd_addr; + void __iomem *port = sil24_port_base(ap); int i; writel(PORT_CS_PMP_RESUME, port + PORT_CTRL_CLR); @@ -600,12 +581,12 @@ static void sil24_clear_pmp(struct ata_port *ap) static int sil24_init_port(struct ata_port *ap) { - void __iomem *port = ap->ioaddr.cmd_addr; + void __iomem *port = sil24_port_base(ap); struct sil24_port_priv *pp = ap->private_data; u32 tmp; /* clear PMP error status */ - if (ap->nr_pmp_links) + if (sata_pmp_attached(ap)) sil24_clear_pmp(ap); writel(PORT_CS_INIT, port + PORT_CTRL_STAT); @@ -616,7 +597,7 @@ static int sil24_init_port(struct ata_port *ap) if ((tmp & (PORT_CS_INIT | PORT_CS_RDY)) != PORT_CS_RDY) { pp->do_port_rst = 1; - ap->link.eh_context.i.action |= ATA_EH_HARDRESET; + ap->link.eh_context.i.action |= ATA_EH_RESET; return -EIO; } @@ -628,7 +609,7 @@ static int sil24_exec_polled_cmd(struct ata_port *ap, int pmp, int is_cmd, u32 ctrl, unsigned long timeout_msec) { - void __iomem *port = ap->ioaddr.cmd_addr; + void __iomem *port = sil24_port_base(ap); struct sil24_port_priv *pp = ap->private_data; struct sil24_prb *prb = &pp->cmd_block[0].ata.prb; dma_addr_t paddr = pp->cmd_block_dma; @@ -670,10 +651,11 @@ static int sil24_exec_polled_cmd(struct ata_port *ap, int pmp, return rc; } -static int sil24_do_softreset(struct ata_link *link, unsigned int *class, - int pmp, unsigned long deadline) +static int sil24_softreset(struct ata_link *link, unsigned int *class, + unsigned long deadline) { struct ata_port *ap = link->ap; + int pmp = sata_srst_pmp(link); unsigned long timeout_msec = 0; struct ata_taskfile tf; const char *reason; @@ -681,12 +663,6 @@ static int sil24_do_softreset(struct ata_link *link, unsigned int *class, DPRINTK("ENTER\n"); - if (ata_link_offline(link)) { - DPRINTK("PHY reports no device\n"); - *class = ATA_DEV_NONE; - goto out; - } - /* put the port into known state */ if (sil24_init_port(ap)) { reason = "port not ready"; @@ -711,10 +687,6 @@ static int sil24_do_softreset(struct ata_link *link, unsigned int *class, sil24_read_tf(ap, 0, &tf); *class = ata_dev_classify(&tf); - if (*class == ATA_DEV_UNKNOWN) - *class = ATA_DEV_NONE; - - out: DPRINTK("EXIT, class=%u\n", *class); return 0; @@ -723,17 +695,11 @@ static int sil24_do_softreset(struct ata_link *link, unsigned int *class, return -EIO; } -static int sil24_softreset(struct ata_link *link, unsigned int *class, - unsigned long deadline) -{ - return sil24_do_softreset(link, class, SATA_PMP_CTRL_PORT, deadline); -} - static int sil24_hardreset(struct ata_link *link, unsigned int *class, unsigned long deadline) { struct ata_port *ap = link->ap; - void __iomem *port = ap->ioaddr.cmd_addr; + void __iomem *port = sil24_port_base(ap); struct sil24_port_priv *pp = ap->private_data; int did_port_rst = 0; const char *reason; @@ -832,16 +798,29 @@ static int sil24_qc_defer(struct ata_queued_cmd *qc) struct ata_link *link = qc->dev->link; struct ata_port *ap = link->ap; u8 prot = qc->tf.protocol; - int is_atapi = (prot == ATA_PROT_ATAPI || - prot == ATA_PROT_ATAPI_NODATA || - prot == ATA_PROT_ATAPI_DMA); - - /* ATAPI commands completing with CHECK_SENSE cause various - * weird problems if other commands are active. PMP DMA CS - * errata doesn't cover all and HSM violation occurs even with - * only one other device active. Always run an ATAPI command - * by itself. - */ + + /* + * There is a bug in the chip: + * Port LRAM Causes the PRB/SGT Data to be Corrupted + * If the host issues a read request for LRAM and SActive registers + * while active commands are available in the port, PRB/SGT data in + * the LRAM can become corrupted. This issue applies only when + * reading from, but not writing to, the LRAM. + * + * Therefore, reading LRAM when there is no particular error [and + * other commands may be outstanding] is prohibited. + * + * To avoid this bug there are two situations where a command must run + * exclusive of any other commands on the port: + * + * - ATAPI commands which check the sense data + * - Passthrough ATA commands which always have ATA_QCFLAG_RESULT_TF + * set. + * + */ + int is_excl = (ata_is_atapi(prot) || + (qc->flags & ATA_QCFLAG_RESULT_TF)); + if (unlikely(ap->excl_link)) { if (link == ap->excl_link) { if (ap->nr_active_links) @@ -849,7 +828,7 @@ static int sil24_qc_defer(struct ata_queued_cmd *qc) qc->flags |= ATA_QCFLAG_CLEAR_EXCL; } else return ATA_DEFER_PORT; - } else if (unlikely(is_atapi)) { + } else if (unlikely(is_excl)) { ap->excl_link = link; if (ap->nr_active_links) return ATA_DEFER_PORT; @@ -870,35 +849,21 @@ static void sil24_qc_prep(struct ata_queued_cmd *qc) cb = &pp->cmd_block[sil24_tag(qc->tag)]; - switch (qc->tf.protocol) { - case ATA_PROT_PIO: - case ATA_PROT_DMA: - case ATA_PROT_NCQ: - case ATA_PROT_NODATA: + if (!ata_is_atapi(qc->tf.protocol)) { prb = &cb->ata.prb; sge = cb->ata.sge; - break; - - case ATA_PROT_ATAPI: - case ATA_PROT_ATAPI_DMA: - case ATA_PROT_ATAPI_NODATA: + } else { prb = &cb->atapi.prb; sge = cb->atapi.sge; memset(cb->atapi.cdb, 0, 32); memcpy(cb->atapi.cdb, qc->cdb, qc->dev->cdb_len); - if (qc->tf.protocol != ATA_PROT_ATAPI_NODATA) { + if (ata_is_data(qc->tf.protocol)) { if (qc->tf.flags & ATA_TFLAG_WRITE) ctrl = PRB_CTRL_PACKET_WRITE; else ctrl = PRB_CTRL_PACKET_READ; } - break; - - default: - prb = NULL; /* shut up, gcc */ - sge = NULL; - BUG(); } prb->ctrl = cpu_to_le16(ctrl); @@ -912,7 +877,7 @@ static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct sil24_port_priv *pp = ap->private_data; - void __iomem *port = ap->ioaddr.cmd_addr; + void __iomem *port = sil24_port_base(ap); unsigned int tag = sil24_tag(qc->tag); dma_addr_t paddr; void __iomem *activate; @@ -926,27 +891,33 @@ static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc) return 0; } -static void sil24_irq_clear(struct ata_port *ap) +static bool sil24_qc_fill_rtf(struct ata_queued_cmd *qc) { - /* unused */ + sil24_read_tf(qc->ap, qc->tag, &qc->result_tf); + return true; } static void sil24_pmp_attach(struct ata_port *ap) { + u32 *gscr = ap->link.device->gscr; + sil24_config_pmp(ap, 1); sil24_init_port(ap); + + if (sata_pmp_gscr_vendor(gscr) == 0x11ab && + sata_pmp_gscr_devid(gscr) == 0x4140) { + ata_port_printk(ap, KERN_INFO, + "disabling NCQ support due to sil24-mv4140 quirk\n"); + ap->flags &= ~ATA_FLAG_NCQ; + } } static void sil24_pmp_detach(struct ata_port *ap) { sil24_init_port(ap); sil24_config_pmp(ap, 0); -} -static int sil24_pmp_softreset(struct ata_link *link, unsigned int *class, - unsigned long deadline) -{ - return sil24_do_softreset(link, class, link->pmp, deadline); + ap->flags |= ATA_FLAG_NCQ; } static int sil24_pmp_hardreset(struct ata_link *link, unsigned int *class, @@ -961,12 +932,12 @@ static int sil24_pmp_hardreset(struct ata_link *link, unsigned int *class, return rc; } - return sata_pmp_std_hardreset(link, class, deadline); + return sata_std_hardreset(link, class, deadline); } static void sil24_freeze(struct ata_port *ap) { - void __iomem *port = ap->ioaddr.cmd_addr; + void __iomem *port = sil24_port_base(ap); /* Port-wide IRQ mask in HOST_CTRL doesn't really work, clear * PORT_IRQ_ENABLE instead. @@ -976,7 +947,7 @@ static void sil24_freeze(struct ata_port *ap) static void sil24_thaw(struct ata_port *ap) { - void __iomem *port = ap->ioaddr.cmd_addr; + void __iomem *port = sil24_port_base(ap); u32 tmp; /* clear IRQ */ @@ -989,7 +960,7 @@ static void sil24_thaw(struct ata_port *ap) static void sil24_error_intr(struct ata_port *ap) { - void __iomem *port = ap->ioaddr.cmd_addr; + void __iomem *port = sil24_port_base(ap); struct sil24_port_priv *pp = ap->private_data; struct ata_queued_cmd *qc = NULL; struct ata_link *link; @@ -1023,7 +994,7 @@ static void sil24_error_intr(struct ata_port *ap) if (irq_stat & PORT_IRQ_UNK_FIS) { ehi->err_mask |= AC_ERR_HSM; - ehi->action |= ATA_EH_SOFTRESET; + ehi->action |= ATA_EH_RESET; ata_ehi_push_desc(ehi, "unknown FIS"); freeze = 1; } @@ -1044,14 +1015,14 @@ static void sil24_error_intr(struct ata_port *ap) */ if (ap->nr_active_links >= 3) { ehi->err_mask |= AC_ERR_OTHER; - ehi->action |= ATA_EH_HARDRESET; + ehi->action |= ATA_EH_RESET; ata_ehi_push_desc(ehi, "PMP DMA CS errata"); pp->do_port_rst = 1; freeze = 1; } /* find out the offending link and qc */ - if (ap->nr_pmp_links) { + if (sata_pmp_attached(ap)) { context = readl(port + PORT_CONTEXT); pmp = (context >> 5) & 0xf; @@ -1065,7 +1036,7 @@ static void sil24_error_intr(struct ata_port *ap) irq_stat); } else { err_mask |= AC_ERR_HSM; - action |= ATA_EH_HARDRESET; + action |= ATA_EH_RESET; freeze = 1; } } else @@ -1079,25 +1050,27 @@ static void sil24_error_intr(struct ata_port *ap) if (ci && ci->desc) { err_mask |= ci->err_mask; action |= ci->action; + if (action & ATA_EH_RESET) + freeze = 1; ata_ehi_push_desc(ehi, "%s", ci->desc); } else { err_mask |= AC_ERR_OTHER; - action |= ATA_EH_SOFTRESET; + action |= ATA_EH_RESET; + freeze = 1; ata_ehi_push_desc(ehi, "unknown command error %d", cerr); } /* record error info */ - if (qc) { - sil24_read_tf(ap, qc->tag, &pp->tf); + if (qc) qc->err_mask |= err_mask; - } else + else ehi->err_mask |= err_mask; ehi->action |= action; /* if PMP, resume */ - if (ap->nr_pmp_links) + if (sata_pmp_attached(ap)) writel(PORT_CS_PMP_RESUME, port + PORT_CTRL_STAT); } @@ -1112,18 +1085,9 @@ static void sil24_error_intr(struct ata_port *ap) } } -static void sil24_finish_qc(struct ata_queued_cmd *qc) -{ - struct ata_port *ap = qc->ap; - struct sil24_port_priv *pp = ap->private_data; - - if (qc->flags & ATA_QCFLAG_RESULT_TF) - sil24_read_tf(ap, qc->tag, &pp->tf); -} - static inline void sil24_host_intr(struct ata_port *ap) { - void __iomem *port = ap->ioaddr.cmd_addr; + void __iomem *port = sil24_port_base(ap); u32 slot_stat, qc_active; int rc; @@ -1145,13 +1109,13 @@ static inline void sil24_host_intr(struct ata_port *ap) } qc_active = slot_stat & ~HOST_SSTAT_ATTN; - rc = ata_qc_complete_multiple(ap, qc_active, sil24_finish_qc); + rc = ata_qc_complete_multiple(ap, qc_active); if (rc > 0) return; if (rc < 0) { struct ata_eh_info *ehi = &ap->link.eh_info; ehi->err_mask |= AC_ERR_HSM; - ehi->action |= ATA_EH_SOFTRESET; + ehi->action |= ATA_EH_RESET; ata_port_freeze(ap); return; } @@ -1207,11 +1171,7 @@ static void sil24_error_handler(struct ata_port *ap) if (sil24_init_port(ap)) ata_eh_freeze_port(ap); - /* perform recovery */ - sata_pmp_do_eh(ap, ata_std_prereset, sil24_softreset, sil24_hardreset, - ata_std_postreset, sata_pmp_std_prereset, - sil24_pmp_softreset, sil24_pmp_hardreset, - sata_pmp_std_postreset); + sata_pmp_error_handler(ap); pp->do_port_rst = 0; } @@ -1238,8 +1198,6 @@ static int sil24_port_start(struct ata_port *ap) if (!pp) return -ENOMEM; - pp->tf.command = ATA_DRDY; - cb = dmam_alloc_coherent(dev, cb_size, &cb_dma, GFP_KERNEL); if (!cb) return -ENOMEM; @@ -1254,6 +1212,9 @@ static int sil24_port_start(struct ata_port *ap) ap->private_data = pp; + ata_port_pbar_desc(ap, SIL24_HOST_BAR, -1, "host"); + ata_port_pbar_desc(ap, SIL24_PORT_BAR, sil24_port_offset(ap), "port"); + return 0; } @@ -1272,7 +1233,8 @@ static void sil24_init_controller(struct ata_host *host) /* init ports */ for (i = 0; i < host->n_ports; i++) { struct ata_port *ap = host->ports[i]; - void __iomem *port = ap->ioaddr.cmd_addr; + void __iomem *port = sil24_port_base(ap); + /* Initial PHY setting */ writel(0x20c, port + PORT_PHY_CFG); @@ -1305,7 +1267,7 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) const struct ata_port_info *ppi[] = { &pi, NULL }; void __iomem * const *iomap; struct ata_host *host; - int i, rc; + int rc; u32 tmp; /* cause link error if sil24_cmd_block is sized wrongly */ @@ -1345,18 +1307,6 @@ static int sil24_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) return -ENOMEM; host->iomap = iomap; - for (i = 0; i < host->n_ports; i++) { - struct ata_port *ap = host->ports[i]; - size_t offset = ap->port_no * PORT_REGS_SIZE; - void __iomem *port = iomap[SIL24_PORT_BAR] + offset; - - host->ports[i]->ioaddr.cmd_addr = port; - host->ports[i]->ioaddr.scr_addr = port + PORT_SCONTROL; - - ata_port_pbar_desc(ap, SIL24_HOST_BAR, -1, "host"); - ata_port_pbar_desc(ap, SIL24_PORT_BAR, offset, "port"); - } - /* configure and activate the device */ if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); diff --git a/drivers/ata/sata_sis.c b/drivers/ata/sata_sis.c index a01260a..1010b30 100644 --- a/drivers/ata/sata_sis.c +++ b/drivers/ata/sata_sis.c @@ -86,45 +86,13 @@ static struct pci_driver sis_pci_driver = { }; static struct scsi_host_template sis_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations sis_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, +static struct ata_port_operations sis_ops = { + .inherits = &ata_bmdma_port_ops, .scr_read = sis_scr_read, .scr_write = sis_scr_write, - .port_start = ata_port_start, }; static const struct ata_port_info sis_port_info = { @@ -174,7 +142,7 @@ static u32 sis_scr_cfg_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) u8 pmr; if (sc_reg == SCR_ERROR) /* doesn't exist in PCI cfg space */ - return 0xffffffff; + return -EINVAL; pci_read_config_byte(pdev, SIS_PMR, &pmr); @@ -190,14 +158,14 @@ static u32 sis_scr_cfg_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) return 0; } -static void sis_scr_cfg_write(struct ata_port *ap, unsigned int sc_reg, u32 val) +static int sis_scr_cfg_write(struct ata_port *ap, unsigned int sc_reg, u32 val) { struct pci_dev *pdev = to_pci_dev(ap->host->dev); unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); u8 pmr; if (sc_reg == SCR_ERROR) /* doesn't exist in PCI cfg space */ - return; + return -EINVAL; pci_read_config_byte(pdev, SIS_PMR, &pmr); @@ -206,6 +174,8 @@ static void sis_scr_cfg_write(struct ata_port *ap, unsigned int sc_reg, u32 val) if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED)) pci_write_config_dword(pdev, cfg_addr+0x10, val); + + return 0; } static int sis_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) @@ -243,14 +213,14 @@ static int sis_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) pci_read_config_byte(pdev, SIS_PMR, &pmr); if (ap->flags & SIS_FLAG_CFGSCR) - sis_scr_cfg_write(ap, sc_reg, val); + return sis_scr_cfg_write(ap, sc_reg, val); else { iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)); if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED)) iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)+0x10); + return 0; } - return 0; } static int sis_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) @@ -341,7 +311,7 @@ static int sis_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) break; } - rc = ata_pci_prepare_sff_host(pdev, ppi, &host); + rc = ata_pci_sff_prepare_host(pdev, ppi, &host); if (rc) return rc; @@ -359,8 +329,8 @@ static int sis_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) pci_set_master(pdev); pci_intx(pdev, 1); - return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED, - &sis_sht); + return ata_host_activate(host, pdev->irq, ata_sff_interrupt, + IRQF_SHARED, &sis_sht); } static int __init sis_init(void) diff --git a/drivers/ata/sata_svw.c b/drivers/ata/sata_svw.c index d620ccf..16aa683 100644 --- a/drivers/ata/sata_svw.c +++ b/drivers/ata/sata_svw.c @@ -61,7 +61,7 @@ enum { /* ap->flags bits */ K2_FLAG_SATA_8_PORTS = (1 << 24), K2_FLAG_NO_ATAPI_DMA = (1 << 25), - K2_FLAG_BAR_POS_3 = (1 << 26), + K2_FLAG_BAR_POS_3 = (1 << 26), /* Taskfile registers offsets */ K2_SATA_TF_CMD_OFFSET = 0x00, @@ -93,8 +93,8 @@ enum { chip_svw4 = 0, chip_svw8 = 1, - chip_svw42 = 2, /* bar 3 */ - chip_svw43 = 3, /* bar 5 */ + chip_svw42 = 2, /* bar 3 */ + chip_svw43 = 3, /* bar 5 */ }; static u8 k2_stat_check_status(struct ata_port *ap); @@ -233,7 +233,7 @@ static void k2_bmdma_setup_mmio(struct ata_queued_cmd *qc) /* issue r/w command if this is not a ATA DMA command*/ if (qc->tf.protocol != ATA_PROT_DMA) - ap->ops->exec_command(ap, &qc->tf); + ap->ops->sff_exec_command(ap, &qc->tf); } /** @@ -269,7 +269,7 @@ static void k2_bmdma_start_mmio(struct ata_queued_cmd *qc) and the start command. */ /* issue r/w command if the access is to ATA*/ if (qc->tf.protocol == ATA_PROT_DMA) - ap->ops->exec_command(ap, &qc->tf); + ap->ops->sff_exec_command(ap, &qc->tf); } @@ -310,7 +310,7 @@ static int k2_sata_proc_info(struct Scsi_Host *shost, char *page, char **start, /* Match it to a port node */ index = (ap == ap->host->ports[0]) ? 0 : 1; for (np = np->child; np != NULL; np = np->sibling) { - u32 *reg = (u32 *)get_property(np, "reg", NULL); + const u32 *reg = of_get_property(np, "reg", NULL); if (!reg) continue; if (index == *reg) @@ -327,50 +327,23 @@ static int k2_sata_proc_info(struct Scsi_Host *shost, char *page, char **start, static struct scsi_host_template k2_sata_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, + ATA_BMDMA_SHT(DRV_NAME), #ifdef CONFIG_PPC_OF .proc_info = k2_sata_proc_info, #endif - .bios_param = ata_std_bios_param, }; -static const struct ata_port_operations k2_sata_ops = { - .tf_load = k2_sata_tf_load, - .tf_read = k2_sata_tf_read, - .check_status = k2_stat_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, +static struct ata_port_operations k2_sata_ops = { + .inherits = &ata_bmdma_port_ops, + .sff_tf_load = k2_sata_tf_load, + .sff_tf_read = k2_sata_tf_read, + .sff_check_status = k2_stat_check_status, .check_atapi_dma = k2_sata_check_atapi_dma, .bmdma_setup = k2_bmdma_setup_mmio, .bmdma_start = k2_bmdma_start_mmio, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, .scr_read = k2_sata_scr_read, .scr_write = k2_sata_scr_write, - .port_start = ata_port_start, }; static const struct ata_port_info k2_port_info[] = { @@ -457,7 +430,6 @@ static int k2_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *en bar_pos = 5; if (ppi[0]->flags & K2_FLAG_BAR_POS_3) bar_pos = 3; - /* * If this driver happens to only be useful on Apple's K2, then * we should check that here as it has a normal Serverworks ID @@ -472,9 +444,9 @@ static int k2_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *en */ if (pci_resource_len(pdev, bar_pos) == 0) { /* In IDE mode we need to pin the device to ensure that - pcim_release does not clear the busmaster bit in config - space, clearing causes busmaster DMA to fail on - ports 3 & 4 */ + pcim_release does not clear the busmaster bit in config + space, clearing causes busmaster DMA to fail on + ports 3 & 4 */ pcim_pin_device(pdev); return -ENODEV; } @@ -520,8 +492,8 @@ static int k2_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *en writel(0x0, mmio_base + K2_SATA_SIM_OFFSET); pci_set_master(pdev); - return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED, - &k2_sata_sht); + return ata_host_activate(host, pdev->irq, ata_sff_interrupt, + IRQF_SHARED, &k2_sata_sht); } /* 0x240 is device ID for Apple K2 device @@ -532,8 +504,8 @@ static int k2_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *en * */ static const struct pci_device_id k2_sata_pci_tbl[] = { { PCI_VDEVICE(SERVERWORKS, 0x0240), chip_svw4 }, - { PCI_VDEVICE(SERVERWORKS, 0x0241), chip_svw4 }, - { PCI_VDEVICE(SERVERWORKS, 0x0242), chip_svw8 }, + { PCI_VDEVICE(SERVERWORKS, 0x0241), chip_svw8 }, + { PCI_VDEVICE(SERVERWORKS, 0x0242), chip_svw4 }, { PCI_VDEVICE(SERVERWORKS, 0x024a), chip_svw4 }, { PCI_VDEVICE(SERVERWORKS, 0x024b), chip_svw4 }, { PCI_VDEVICE(SERVERWORKS, 0x0410), chip_svw42 }, diff --git a/drivers/ata/sata_sx4.c b/drivers/ata/sata_sx4.c index dcccf3b..68c71ad 100644 --- a/drivers/ata/sata_sx4.c +++ b/drivers/ata/sata_sx4.c @@ -232,40 +232,30 @@ static void pdc20621_get_from_dimm(struct ata_host *host, static void pdc20621_put_to_dimm(struct ata_host *host, void *psource, u32 offset, u32 size); static void pdc20621_irq_clear(struct ata_port *ap); -static unsigned int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc); +static unsigned int pdc20621_qc_issue(struct ata_queued_cmd *qc); static struct scsi_host_template pdc_sata_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, + ATA_BASE_SHT(DRV_NAME), .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, }; -static const struct ata_port_operations pdc_20621_ops = { - .tf_load = pdc_tf_load_mmio, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = pdc_exec_command_mmio, - .dev_select = ata_std_dev_select, +/* TODO: inherit from base port_ops after converting to new EH */ +static struct ata_port_operations pdc_20621_ops = { + .sff_tf_load = pdc_tf_load_mmio, + .sff_tf_read = ata_sff_tf_read, + .sff_check_status = ata_sff_check_status, + .sff_exec_command = pdc_exec_command_mmio, + .sff_dev_select = ata_sff_dev_select, .phy_reset = pdc_20621_phy_reset, .qc_prep = pdc20621_qc_prep, - .qc_issue = pdc20621_qc_issue_prot, - .data_xfer = ata_data_xfer, + .qc_issue = pdc20621_qc_issue, + .qc_fill_rtf = ata_sff_qc_fill_rtf, + .sff_data_xfer = ata_sff_data_xfer, .eng_timeout = pdc_eng_timeout, - .irq_clear = pdc20621_irq_clear, - .irq_on = ata_irq_on, + .sff_irq_clear = pdc20621_irq_clear, + .sff_irq_on = ata_sff_irq_on, .port_start = pdc_port_start, }; @@ -334,7 +324,7 @@ static inline void pdc20621_ata_sg(struct ata_taskfile *tf, u8 *buf, { u32 addr; unsigned int dw = PDC_DIMM_APKT_PRD >> 2; - u32 *buf32 = (u32 *) buf; + __le32 *buf32 = (__le32 *) buf; /* output ATA packet S/G table */ addr = PDC_20621_DIMM_BASE + PDC_20621_DIMM_DATA + @@ -356,7 +346,7 @@ static inline void pdc20621_host_sg(struct ata_taskfile *tf, u8 *buf, { u32 addr; unsigned int dw = PDC_DIMM_HPKT_PRD >> 2; - u32 *buf32 = (u32 *) buf; + __le32 *buf32 = (__le32 *) buf; /* output Host DMA packet S/G table */ addr = PDC_20621_DIMM_BASE + PDC_20621_DIMM_DATA + @@ -377,7 +367,7 @@ static inline unsigned int pdc20621_ata_pkt(struct ata_taskfile *tf, unsigned int portno) { unsigned int i, dw; - u32 *buf32 = (u32 *) buf; + __le32 *buf32 = (__le32 *) buf; u8 dev_reg; unsigned int dimm_sg = PDC_20621_DIMM_BASE + @@ -429,7 +419,8 @@ static inline void pdc20621_host_pkt(struct ata_taskfile *tf, u8 *buf, unsigned int portno) { unsigned int dw; - u32 tmp, *buf32 = (u32 *) buf; + u32 tmp; + __le32 *buf32 = (__le32 *) buf; unsigned int host_sg = PDC_20621_DIMM_BASE + (PDC_DIMM_WINDOW_STEP * portno) + @@ -474,7 +465,7 @@ static void pdc20621_dma_prep(struct ata_queued_cmd *qc) void __iomem *dimm_mmio = ap->host->iomap[PDC_DIMM_BAR]; unsigned int portno = ap->port_no; unsigned int i, idx, total_len = 0, sgt_len; - u32 *buf = (u32 *) &pp->dimm_buf[PDC_DIMM_HEADER_SZ]; + __le32 *buf = (__le32 *) &pp->dimm_buf[PDC_DIMM_HEADER_SZ]; WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); @@ -692,7 +683,7 @@ static void pdc20621_packet_start(struct ata_queued_cmd *qc) } } -static unsigned int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc) +static unsigned int pdc20621_qc_issue(struct ata_queued_cmd *qc) { switch (qc->tf.protocol) { case ATA_PROT_DMA: @@ -700,7 +691,7 @@ static unsigned int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc) pdc20621_packet_start(qc); return 0; - case ATA_PROT_ATAPI_DMA: + case ATAPI_PROT_DMA: BUG(); break; @@ -708,7 +699,7 @@ static unsigned int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc) break; } - return ata_qc_issue_prot(qc); + return ata_sff_qc_issue(qc); } static inline unsigned int pdc20621_host_intr(struct ata_port *ap, @@ -780,7 +771,7 @@ static inline unsigned int pdc20621_host_intr(struct ata_port *ap, /* command completion, but no data xfer */ } else if (qc->tf.protocol == ATA_PROT_NODATA) { - status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); + status = ata_sff_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); DPRINTK("BUS_NODATA (drv_stat 0x%X)\n", status); qc->err_mask |= ac_err_mask(status); ata_qc_complete(qc); @@ -803,7 +794,7 @@ static void pdc20621_irq_clear(struct ata_port *ap) readl(mmio + PDC_20621_SEQMASK); } -static irqreturn_t pdc20621_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs) +static irqreturn_t pdc20621_interrupt(int irq, void *dev_instance, struct pt_regs *regs) { struct ata_host *host = dev_instance; struct ata_port *ap; @@ -889,7 +880,7 @@ static void pdc_eng_timeout(struct ata_port *ap) break; default: - drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); + drv_stat = ata_sff_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); ata_port_printk(ap, KERN_ERR, "unknown timeout, cmd 0x%x stat 0x%x\n", @@ -908,7 +899,7 @@ static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) { WARN_ON(tf->protocol == ATA_PROT_DMA || tf->protocol == ATA_PROT_NODATA); - ata_tf_load(ap, tf); + ata_sff_tf_load(ap, tf); } @@ -916,7 +907,7 @@ static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile { WARN_ON(tf->protocol == ATA_PROT_DMA || tf->protocol == ATA_PROT_NODATA); - ata_exec_command(ap, tf); + ata_sff_exec_command(ap, tf); } diff --git a/drivers/ata/sata_uli.c b/drivers/ata/sata_uli.c index e710e71..f277cea 100644 --- a/drivers/ata/sata_uli.c +++ b/drivers/ata/sata_uli.c @@ -76,50 +76,13 @@ static struct pci_driver uli_pci_driver = { }; static struct scsi_host_template uli_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations uli_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - +static struct ata_port_operations uli_ops = { + .inherits = &ata_bmdma_port_ops, .scr_read = uli_scr_read, .scr_write = uli_scr_write, - - .port_start = ata_port_start, }; static const struct ata_port_info uli_port_info = { @@ -212,11 +175,11 @@ static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) host->private_data = hpriv; /* the first two ports are standard SFF */ - rc = ata_pci_init_sff_host(host); + rc = ata_pci_sff_init_host(host); if (rc) return rc; - rc = ata_pci_init_bmdma(host); + rc = ata_pci_bmdma_init(host); if (rc) return rc; @@ -237,7 +200,7 @@ static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4; ioaddr->bmdma_addr = iomap[4] + 16; hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4; - ata_std_ports(ioaddr); + ata_sff_std_ports(ioaddr); ata_port_desc(host->ports[2], "cmd 0x%llx ctl 0x%llx bmdma 0x%llx", @@ -252,7 +215,7 @@ static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4; ioaddr->bmdma_addr = iomap[4] + 24; hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5; - ata_std_ports(ioaddr); + ata_sff_std_ports(ioaddr); ata_port_desc(host->ports[2], "cmd 0x%llx ctl 0x%llx bmdma 0x%llx", @@ -279,8 +242,8 @@ static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) pci_set_master(pdev); pci_intx(pdev, 1); - return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED, - &uli_sht); + return ata_host_activate(host, pdev->irq, ata_sff_interrupt, + IRQF_SHARED, &uli_sht); } static int __init uli_init(void) diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c index 3ef072f..96deeb3 100644 --- a/drivers/ata/sata_via.c +++ b/drivers/ata/sata_via.c @@ -30,8 +30,6 @@ * Hardware documentation available under NDA. * * - * To-do list: - * - VT6421 PATA support * */ @@ -73,7 +71,7 @@ static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); static int svia_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); static int svia_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); static void svia_noop_freeze(struct ata_port *ap); -static void vt6420_error_handler(struct ata_port *ap); +static int vt6420_prereset(struct ata_link *link, unsigned long deadline); static int vt6421_pata_cable_detect(struct ata_port *ap); static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev); static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev); @@ -102,110 +100,26 @@ static struct pci_driver svia_pci_driver = { }; static struct scsi_host_template svia_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations vt6420_sata_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - +static struct ata_port_operations vt6420_sata_ops = { + .inherits = &ata_bmdma_port_ops, .freeze = svia_noop_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = vt6420_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_port_start, + .prereset = vt6420_prereset, }; -static const struct ata_port_operations vt6421_pata_ops = { +static struct ata_port_operations vt6421_pata_ops = { + .inherits = &ata_bmdma_port_ops, + .cable_detect = vt6421_pata_cable_detect, .set_piomode = vt6421_set_pio_mode, .set_dmamode = vt6421_set_dma_mode, - - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = vt6421_pata_cable_detect, - - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - - .port_start = ata_port_start, }; -static const struct ata_port_operations vt6421_sata_ops = { - .tf_load = ata_tf_load, - .tf_read = ata_tf_read, - .check_status = ata_check_status, - .exec_command = ata_exec_command, - .dev_select = ata_std_dev_select, - - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, - - .freeze = ata_bmdma_freeze, - .thaw = ata_bmdma_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .cable_detect = ata_cable_sata, - - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, - +static struct ata_port_operations vt6421_sata_ops = { + .inherits = &ata_bmdma_port_ops, .scr_read = svia_scr_read, .scr_write = svia_scr_write, - - .port_start = ata_port_start, }; static const struct ata_port_info vt6420_port_info = { @@ -259,8 +173,8 @@ static void svia_noop_freeze(struct ata_port *ap) /* Some VIA controllers choke if ATA_NIEN is manipulated in * certain way. Leave it alone and just clear pending IRQ. */ - ata_chk_status(ap); - ata_bmdma_irq_clear(ap); + ap->ops->sff_check_status(ap); + ata_sff_irq_clear(ap); } /** @@ -322,23 +236,17 @@ static int vt6420_prereset(struct ata_link *link, unsigned long deadline) if (!online) { /* tell EH to bail */ - ehc->i.action &= ~ATA_EH_RESET_MASK; + ehc->i.action &= ~ATA_EH_RESET; return 0; } skip_scr: /* wait for !BSY */ - ata_wait_ready(ap, deadline); + ata_sff_wait_ready(link, deadline); return 0; } -static void vt6420_error_handler(struct ata_port *ap) -{ - return ata_bmdma_drive_eh(ap, vt6420_prereset, ata_std_softreset, - NULL, ata_std_postreset); -} - static int vt6421_pata_cable_detect(struct ata_port *ap) { struct pci_dev *pdev = to_pci_dev(ap->host->dev); @@ -396,7 +304,7 @@ static void vt6421_init_addrs(struct ata_port *ap) ioaddr->bmdma_addr = bmdma_addr; ioaddr->scr_addr = vt6421_scr_addr(iomap[5], ap->port_no); - ata_std_ports(ioaddr); + ata_sff_std_ports(ioaddr); ata_port_pbar_desc(ap, ap->port_no, -1, "port"); ata_port_pbar_desc(ap, 4, ap->port_no * 8, "bmdma"); @@ -408,7 +316,7 @@ static int vt6420_prepare_host(struct pci_dev *pdev, struct ata_host **r_host) struct ata_host *host; int rc; - rc = ata_pci_prepare_sff_host(pdev, ppi, &host); + rc = ata_pci_sff_prepare_host(pdev, ppi, &host); if (rc) return rc; *r_host = host; @@ -540,8 +448,8 @@ static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) svia_configure(pdev); pci_set_master(pdev); - return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED, - &svia_sht); + return ata_host_activate(host, pdev->irq, ata_sff_interrupt, + IRQF_SHARED, &svia_sht); } static int __init svia_init(void) diff --git a/drivers/ata/sata_vsc.c b/drivers/ata/sata_vsc.c index efb3476..4b68022 100644 --- a/drivers/ata/sata_vsc.c +++ b/drivers/ata/sata_vsc.c @@ -200,7 +200,7 @@ static void vsc_sata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) struct ata_ioports *ioaddr = &ap->ioaddr; u16 nsect, lbal, lbam, lbah, feature; - tf->command = ata_check_status(ap); + tf->command = ata_sff_check_status(ap); tf->device = readw(ioaddr->device_addr); feature = readw(ioaddr->error_addr); nsect = readw(ioaddr->nsect_addr); @@ -243,7 +243,7 @@ static void vsc_port_intr(u8 port_status, struct ata_port *ap) qc = ata_qc_from_tag(ap, ap->link.active_tag); if (qc && likely(!(qc->tf.flags & ATA_TFLAG_POLLING))) - handled = ata_host_intr(ap, qc); + handled = ata_sff_host_intr(ap, qc); /* We received an interrupt during a polled command, * or some other spurious condition. Interrupt reporting @@ -251,7 +251,7 @@ static void vsc_port_intr(u8 port_status, struct ata_port *ap) * simply clear the interrupt */ if (unlikely(!handled)) - ata_chk_status(ap); + ap->ops->sff_check_status(ap); } /* @@ -260,7 +260,8 @@ static void vsc_port_intr(u8 port_status, struct ata_port *ap) * Read the interrupt register and process for the devices that have * them pending. */ -static irqreturn_t vsc_sata_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs) +static irqreturn_t vsc_sata_interrupt(int irq, void *dev_instance, + struct pt_regs *regs) { struct ata_host *host = dev_instance; unsigned int i; @@ -300,46 +301,18 @@ out: static struct scsi_host_template vsc_sata_sht = { - .module = THIS_MODULE, - .name = DRV_NAME, - .ioctl = ata_scsi_ioctl, - .queuecommand = ata_scsi_queuecmd, - .can_queue = ATA_DEF_QUEUE, - .this_id = ATA_SHT_THIS_ID, - .sg_tablesize = LIBATA_MAX_PRD, - .cmd_per_lun = ATA_SHT_CMD_PER_LUN, - .emulated = ATA_SHT_EMULATED, - .use_clustering = ATA_SHT_USE_CLUSTERING, - .proc_name = DRV_NAME, - .dma_boundary = ATA_DMA_BOUNDARY, - .slave_configure = ata_scsi_slave_config, - .slave_destroy = ata_scsi_slave_destroy, - .bios_param = ata_std_bios_param, + ATA_BMDMA_SHT(DRV_NAME), }; -static const struct ata_port_operations vsc_sata_ops = { - .tf_load = vsc_sata_tf_load, - .tf_read = vsc_sata_tf_read, - .exec_command = ata_exec_command, - .check_status = ata_check_status, - .dev_select = ata_std_dev_select, - .bmdma_setup = ata_bmdma_setup, - .bmdma_start = ata_bmdma_start, - .bmdma_stop = ata_bmdma_stop, - .bmdma_status = ata_bmdma_status, - .qc_prep = ata_qc_prep, - .qc_issue = ata_qc_issue_prot, - .data_xfer = ata_data_xfer, +static struct ata_port_operations vsc_sata_ops = { + .inherits = &ata_bmdma_port_ops, + .sff_tf_load = vsc_sata_tf_load, + .sff_tf_read = vsc_sata_tf_read, .freeze = vsc_freeze, .thaw = vsc_thaw, - .error_handler = ata_bmdma_error_handler, - .post_internal_cmd = ata_bmdma_post_internal_cmd, - .irq_clear = ata_bmdma_irq_clear, - .irq_on = ata_irq_on, .scr_read = vsc_sata_scr_read, .scr_write = vsc_sata_scr_write, - .port_start = ata_port_start, }; static void __devinit vsc_sata_setup_port(struct ata_ioports *port, diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c index c697a7a..ced700c 100644 --- a/drivers/scsi/ipr.c +++ b/drivers/scsi/ipr.c @@ -3951,7 +3951,7 @@ static int __ipr_eh_dev_reset(struct scsi_cmnd * scsi_cmd) if (ipr_is_gata(res) && res->sata_port) { ap = res->sata_port->ap; spin_unlock_irq(scsi_cmd->device->host->host_lock); - ata_do_eh(ap, NULL, NULL, ipr_sata_reset, NULL); + ata_std_error_handler(ap); spin_lock_irq(scsi_cmd->device->host->host_lock); list_for_each_entry(ipr_cmd, &ioa_cfg->pending_q, queue) { @@ -5094,33 +5094,6 @@ static void ipr_ata_post_internal(struct ata_queued_cmd *qc) } /** - * ipr_tf_read - Read the current ATA taskfile for the ATA port - * @ap: ATA port - * @tf: destination ATA taskfile - * - * Return value: - * none - **/ -static void ipr_tf_read(struct ata_port *ap, struct ata_taskfile *tf) -{ - struct ipr_sata_port *sata_port = ap->private_data; - struct ipr_ioasa_gata *g = &sata_port->ioasa; - - tf->feature = g->error; - tf->nsect = g->nsect; - tf->lbal = g->lbal; - tf->lbam = g->lbam; - tf->lbah = g->lbah; - tf->device = g->device; - tf->command = g->status; - tf->hob_nsect = g->hob_nsect; - tf->hob_lbal = g->hob_lbal; - tf->hob_lbam = g->hob_lbam; - tf->hob_lbah = g->hob_lbah; - tf->ctl = g->alt_status; -} - -/** * ipr_copy_sata_tf - Copy a SATA taskfile to an IOA data structure * @regs: destination * @tf: source ATA taskfile @@ -5275,12 +5248,12 @@ static unsigned int ipr_qc_issue(struct ata_queued_cmd *qc) regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA; break; - case ATA_PROT_ATAPI: - case ATA_PROT_ATAPI_NODATA: + case ATAPI_PROT_PIO: + case ATAPI_PROT_NODATA: regs->flags |= IPR_ATA_FLAG_PACKET_CMD; break; - case ATA_PROT_ATAPI_DMA: + case ATAPI_PROT_DMA: regs->flags |= IPR_ATA_FLAG_PACKET_CMD; regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA; break; @@ -5297,40 +5270,41 @@ static unsigned int ipr_qc_issue(struct ata_queued_cmd *qc) } /** - * ipr_ata_check_status - Return last ATA status - * @ap: ATA port + * ipr_qc_fill_rtf - Read result TF + * @qc: ATA queued command * * Return value: - * ATA status + * true **/ -static u8 ipr_ata_check_status(struct ata_port *ap) +static bool ipr_qc_fill_rtf(struct ata_queued_cmd *qc) { - struct ipr_sata_port *sata_port = ap->private_data; - return sata_port->ioasa.status; -} + struct ipr_sata_port *sata_port = qc->ap->private_data; + struct ipr_ioasa_gata *g = &sata_port->ioasa; + struct ata_taskfile *tf = &qc->result_tf; -/** - * ipr_ata_check_altstatus - Return last ATA altstatus - * @ap: ATA port - * - * Return value: - * Alt ATA status - **/ -static u8 ipr_ata_check_altstatus(struct ata_port *ap) -{ - struct ipr_sata_port *sata_port = ap->private_data; - return sata_port->ioasa.alt_status; + tf->feature = g->error; + tf->nsect = g->nsect; + tf->lbal = g->lbal; + tf->lbam = g->lbam; + tf->lbah = g->lbah; + tf->device = g->device; + tf->command = g->status; + tf->hob_nsect = g->hob_nsect; + tf->hob_lbal = g->hob_lbal; + tf->hob_lbam = g->hob_lbam; + tf->hob_lbah = g->hob_lbah; + tf->ctl = g->alt_status; + + return true; } static struct ata_port_operations ipr_sata_ops = { - .check_status = ipr_ata_check_status, - .check_altstatus = ipr_ata_check_altstatus, - .dev_select = ata_noop_dev_select, .phy_reset = ipr_ata_phy_reset, + .hardreset = ipr_sata_reset, .post_internal_cmd = ipr_ata_post_internal, - .tf_read = ipr_tf_read, .qc_prep = ata_noop_qc_prep, .qc_issue = ipr_qc_issue, + .qc_fill_rtf = ipr_qc_fill_rtf, .port_start = ata_sas_port_start, .port_stop = ata_sas_port_stop }; diff --git a/drivers/scsi/libsas/sas_ata.c b/drivers/scsi/libsas/sas_ata.c index 4cbcf78..835e13e 100644 --- a/drivers/scsi/libsas/sas_ata.c +++ b/drivers/scsi/libsas/sas_ata.c @@ -177,7 +177,7 @@ static unsigned int sas_ata_qc_issue(struct ata_queued_cmd *qc) ata_tf_to_fis(&qc->tf, 1, 0, (u8*)&task->ata_task.fis); task->uldd_task = qc; - if (is_atapi_taskfile(&qc->tf)) { + if (ata_is_atapi(qc->tf.protocol)) { memcpy(task->ata_task.atapi_packet, qc->cdb, qc->dev->cdb_len); task->total_xfer_len = qc->nbytes + qc->pad_len; task->num_scatter = qc->pad_len ? qc->n_elem + 1 : qc->n_elem; @@ -201,7 +201,7 @@ static unsigned int sas_ata_qc_issue(struct ata_queued_cmd *qc) case ATA_PROT_NCQ: task->ata_task.use_ncq = 1; /* fall through */ - case ATA_PROT_ATAPI_DMA: + case ATAPI_PROT_DMA: case ATA_PROT_DMA: task->ata_task.dma_xfer = 1; break; @@ -228,10 +228,12 @@ static unsigned int sas_ata_qc_issue(struct ata_queued_cmd *qc) return 0; } -static u8 sas_ata_check_status(struct ata_port *ap) +static bool sas_ata_qc_fill_rtf(struct ata_queued_cmd *qc) { - struct domain_device *dev = ap->private_data; - return dev->sata_dev.tf.command; + struct domain_device *dev = qc->ap->private_data; + + memcpy(&qc->result_tf, &dev->sata_dev.tf, sizeof(qc->result_tf)); + return true; } static void sas_ata_phy_reset(struct ata_port *ap) @@ -295,12 +297,6 @@ static void sas_ata_post_internal(struct ata_queued_cmd *qc) } } -static void sas_ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf) -{ - struct domain_device *dev = ap->private_data; - memcpy(tf, &dev->sata_dev.tf, sizeof (*tf)); -} - static int sas_ata_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) { @@ -352,14 +348,10 @@ static int sas_ata_scr_read(struct ata_port *ap, unsigned int sc_reg_in, } static struct ata_port_operations sas_sata_ops = { - .check_status = sas_ata_check_status, - .check_altstatus = sas_ata_check_status, - .dev_select = ata_noop_dev_select, .phy_reset = sas_ata_phy_reset, .post_internal_cmd = sas_ata_post_internal, - .tf_read = sas_ata_tf_read, .qc_prep = ata_noop_qc_prep, - .qc_issue = sas_ata_qc_issue, + .qc_issue = sas_ata_qc_fill_rtf, .port_start = ata_sas_port_start, .port_stop = ata_sas_port_stop, .scr_read = sas_ata_scr_read, diff --git a/include/linux/ata.h b/include/linux/ata.h index 4f9e5ed..1c622e2 100644 --- a/include/linux/ata.h +++ b/include/linux/ata.h @@ -286,9 +286,10 @@ enum { ATA_CBL_NONE = 0, ATA_CBL_PATA40 = 1, ATA_CBL_PATA80 = 2, - ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */ - ATA_CBL_PATA_UNK = 4, - ATA_CBL_SATA = 5, + ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */ + ATA_CBL_PATA_UNK = 4, /* don't know, maybe 80c? */ + ATA_CBL_PATA_IGN = 5, /* don't know, ignore cable handling */ + ATA_CBL_SATA = 6, /* SATA Status and Control Registers */ SCR_STATUS = 0, @@ -324,6 +325,13 @@ enum { ATA_TFLAG_LBA = (1 << 4), /* enable LBA */ ATA_TFLAG_FUA = (1 << 5), /* enable FUA */ ATA_TFLAG_POLLING = (1 << 6), /* set nIEN to 1 and use polling */ + + /* protocol flags */ + ATA_PROT_FLAG_PIO = (1 << 0), /* is PIO */ + ATA_PROT_FLAG_DMA = (1 << 1), /* is DMA */ + ATA_PROT_FLAG_DATA = ATA_PROT_FLAG_PIO | ATA_PROT_FLAG_DMA, + ATA_PROT_FLAG_NCQ = (1 << 2), /* is NCQ */ + ATA_PROT_FLAG_ATAPI = (1 << 3), /* is ATAPI */ }; enum ata_tf_protocols { @@ -333,9 +341,9 @@ enum ata_tf_protocols { ATA_PROT_PIO, /* PIO data xfer */ ATA_PROT_DMA, /* DMA */ ATA_PROT_NCQ, /* NCQ */ - ATA_PROT_ATAPI, /* packet command, PIO data xfer*/ - ATA_PROT_ATAPI_NODATA, /* packet command, no data */ - ATA_PROT_ATAPI_DMA, /* packet command with special DMA sauce */ + ATAPI_PROT_NODATA, /* packet command, no data */ + ATAPI_PROT_PIO, /* packet command, PIO data xfer*/ + ATAPI_PROT_DMA, /* packet command with special DMA sauce */ }; enum ata_ioctls { @@ -346,8 +354,8 @@ enum ata_ioctls { /* core structures */ struct ata_prd { - u32 addr; - u32 flags_len; + __le32 addr; + __le32 flags_len; }; struct ata_taskfile { @@ -373,13 +381,69 @@ struct ata_taskfile { u8 command; /* IO operation */ }; +/* + * protocol tests + */ +static inline unsigned int ata_prot_flags(u8 prot) +{ + switch (prot) { + case ATA_PROT_NODATA: + return 0; + case ATA_PROT_PIO: + return ATA_PROT_FLAG_PIO; + case ATA_PROT_DMA: + return ATA_PROT_FLAG_DMA; + case ATA_PROT_NCQ: + return ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ; + case ATAPI_PROT_NODATA: + return ATA_PROT_FLAG_ATAPI; + case ATAPI_PROT_PIO: + return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO; + case ATAPI_PROT_DMA: + return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA; + } + return 0; +} + +static inline int ata_is_atapi(u8 prot) +{ + return ata_prot_flags(prot) & ATA_PROT_FLAG_ATAPI; +} + +static inline int ata_is_nodata(u8 prot) +{ + return !(ata_prot_flags(prot) & ATA_PROT_FLAG_DATA); +} + +static inline int ata_is_pio(u8 prot) +{ + return ata_prot_flags(prot) & ATA_PROT_FLAG_PIO; +} + +static inline int ata_is_dma(u8 prot) +{ + return ata_prot_flags(prot) & ATA_PROT_FLAG_DMA; +} + +static inline int ata_is_ncq(u8 prot) +{ + return ata_prot_flags(prot) & ATA_PROT_FLAG_NCQ; +} + +static inline int ata_is_data(u8 prot) +{ + return ata_prot_flags(prot) & ATA_PROT_FLAG_DATA; +} + +/* + * id tests + */ #define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0) #define ata_id_has_lba(id) ((id)[49] & (1 << 9)) #define ata_id_has_dma(id) ((id)[49] & (1 << 8)) #define ata_id_has_ncq(id) ((id)[76] & (1 << 8)) #define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1) #define ata_id_removeable(id) ((id)[0] & (1 << 7)) -#define ata_id_has_dword_io(id) ((id)[48] & (1 << 0)) #define ata_id_has_atapi_AN(id) \ ( (((id)[76] != 0x0000) && ((id)[76] != 0xffff)) && \ ((id)[78] & (1 << 5)) ) @@ -395,26 +459,27 @@ struct ata_taskfile { #define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20) -static inline int ata_id_has_hipm(const u16 *id) +static inline bool ata_id_has_hipm(const u16 *id) { u16 val = id[76]; if (val == 0 || val == 0xffff) - return 0; + return false; return val & (1 << 9); } -static inline int ata_id_has_dipm(const u16 *id) +static inline bool ata_id_has_dipm(const u16 *id) { u16 val = id[78]; if (val == 0 || val == 0xffff) - return 0; + return false; return val & (1 << 3); } + static inline int ata_id_has_fua(const u16 *id) { if ((id[84] & 0xC000) != 0x4000) @@ -519,6 +584,26 @@ static inline int ata_id_is_sata(const u16 *id) return ata_id_major_version(id) >= 5 && id[93] == 0; } +static inline int ata_id_has_tpm(const u16 *id) +{ + /* The TPM bits are only valid on ATA8 */ + if (ata_id_major_version(id) < 8) + return 0; + if ((id[48] & 0xC000) != 0x4000) + return 0; + return id[48] & (1 << 0); +} + +static inline int ata_id_has_dword_io(const u16 *id) +{ + /* ATA 8 reuses this flag for "trusted" computing */ + if (ata_id_major_version(id) > 7) + return 0; + if (id[48] & (1 << 0)) + return 1; + return 0; +} + static inline int ata_id_current_chs_valid(const u16 *id) { /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command @@ -554,8 +639,6 @@ static inline int ata_drive_40wire(const u16 *dev_id) static inline int ata_drive_40wire_relaxed(const u16 *dev_id) { - if (ata_id_is_sata(dev_id)) - return 0; /* SATA */ if ((dev_id[93] & 0x2000) == 0x2000) return 0; /* 80 wire */ return 1; @@ -576,11 +659,9 @@ static inline int atapi_command_packet_set(const u16 *dev_id) return (dev_id[0] >> 8) & 0x1f; } -static inline int is_atapi_taskfile(const struct ata_taskfile *tf) +static inline int atapi_id_dmadir(const u16 *dev_id) { - return (tf->protocol == ATA_PROT_ATAPI) || - (tf->protocol == ATA_PROT_ATAPI_NODATA) || - (tf->protocol == ATA_PROT_ATAPI_DMA); + return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000); } static inline int is_multi_taskfile(struct ata_taskfile *tf) diff --git a/include/linux/libata.h b/include/linux/libata.h index 10c56c1..c374ef8 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -35,6 +35,7 @@ #include <linux/workqueue.h> #include <scsi/scsi_host.h> #include <linux/libata-compat.h> +#include <linux/cdrom.h> /* * Define if arch has non-standard setup. This is a _PCI_ standard @@ -110,17 +111,16 @@ enum { /* various global constants */ LIBATA_MAX_PRD = ATA_MAX_PRD / 2, LIBATA_DUMB_MAX_PRD = ATA_MAX_PRD / 4, /* Worst case */ - ATA_MAX_PORTS = 8, ATA_DEF_QUEUE = 1, /* tag ATA_MAX_QUEUE - 1 is reserved for internal commands */ ATA_MAX_QUEUE = 32, ATA_TAG_INTERNAL = ATA_MAX_QUEUE - 1, - ATA_MAX_BUS = 2, - ATA_DEF_BUSY_WAIT = 10000, ATA_SHORT_PAUSE = (HZ >> 6) + 1, ATAPI_MAX_DRAIN = 16 << 10, + ATA_ALL_DEVICES = (1 << ATA_MAX_DEVICES) - 1, + ATA_SHT_EMULATED = 1, ATA_SHT_CMD_PER_LUN = 1, ATA_SHT_THIS_ID = -1, @@ -137,16 +137,18 @@ enum { ATA_DFLAG_AN = (1 << 7), /* AN configured */ ATA_DFLAG_HIPM = (1 << 8), /* device supports HIPM */ ATA_DFLAG_DIPM = (1 << 9), /* device supports DIPM */ + ATA_DFLAG_DMADIR = (1 << 10), /* device requires DMADIR */ ATA_DFLAG_CFG_MASK = (1 << 12) - 1, ATA_DFLAG_PIO = (1 << 12), /* device limited to PIO mode */ ATA_DFLAG_NCQ_OFF = (1 << 13), /* device limited to non-NCQ mode */ ATA_DFLAG_SPUNDOWN = (1 << 14), /* XXX: for spindown_compat */ ATA_DFLAG_SLEEPING = (1 << 15), /* device is sleeping */ - ATA_DFLAG_INIT_MASK = (1 << 16) - 1, + ATA_DFLAG_DUBIOUS_XFER = (1 << 16), /* data transfer not verified */ + ATA_DFLAG_INIT_MASK = (1 << 24) - 1, - ATA_DFLAG_DETACH = (1 << 16), - ATA_DFLAG_DETACHED = (1 << 17), + ATA_DFLAG_DETACH = (1 << 24), + ATA_DFLAG_DETACHED = (1 << 25), ATA_DEV_UNKNOWN = 0, /* unknown device */ ATA_DEV_ATA = 1, /* ATA device */ @@ -160,9 +162,6 @@ enum { ATA_DEV_NONE = 9, /* no device */ /* struct ata_link flags */ - ATA_LFLAG_HRST_TO_RESUME = (1 << 0), /* hardreset to resume link */ - ATA_LFLAG_SKIP_D2H_BSY = (1 << 1), /* can't wait for the first D2H - * Register FIS clearing BSY */ ATA_LFLAG_NO_SRST = (1 << 2), /* avoid softreset */ ATA_LFLAG_ASSUME_ATA = (1 << 3), /* assume ATA class */ ATA_LFLAG_ASSUME_SEMB = (1 << 4), /* assume SEMB class */ @@ -217,13 +216,14 @@ enum { /* struct ata_queued_cmd flags */ ATA_QCFLAG_ACTIVE = (1 << 0), /* cmd not yet ack'd to scsi lyer */ - ATA_QCFLAG_SG = (1 << 1), /* have s/g table? */ - ATA_QCFLAG_SINGLE = (1 << 2), /* no s/g, just a single buffer */ - ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE, + ATA_QCFLAG_SG = (1 << 1), /* have s/g table? */ + ATA_QCFLAG_SINGLE = (1 << 2), /* no s/g, just a single buffer */ + ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE, ATA_QCFLAG_IO = (1 << 3), /* standard IO command */ ATA_QCFLAG_RESULT_TF = (1 << 4), /* result TF requested */ ATA_QCFLAG_CLEAR_EXCL = (1 << 5), /* clear excl_link on completion */ ATA_QCFLAG_QUIET = (1 << 6), /* don't report device error */ + ATA_QCFLAG_RETRY = (1 << 7), /* retry after failure */ ATA_QCFLAG_FAILED = (1 << 16), /* cmd failed and is owned by EH */ ATA_QCFLAG_SENSE_VALID = (1 << 17), /* sense data valid */ @@ -248,6 +248,25 @@ enum { */ ATA_TMOUT_FF_WAIT = 4 * HZ / 5, + /* Spec mandates to wait for ">= 2ms" before checking status + * after reset. We wait 150ms, because that was the magic + * delay used for ATAPI devices in Hale Landis's ATADRVR, for + * the period of time between when the ATA command register is + * written, and then status is checked. Because waiting for + * "a while" before checking status is fine, post SRST, we + * perform this magic delay here as well. + * + * Old drivers/ide uses the 2mS rule and then waits for ready. + */ + ATA_WAIT_AFTER_RESET_MSECS = 150, + + /* If PMP is supported, we have to do follow-up SRST. As some + * PMPs don't send D2H Reg FIS after hardreset, LLDs are + * advised to wait only for the following duration before + * doing SRST. + */ + ATA_TMOUT_PMP_SRST_WAIT = 1 * HZ, + /* ATA bus states */ BUS_UNKNOWN = 0, BUS_DMA = 1, @@ -266,23 +285,19 @@ enum { PORT_DISABLED = 2, /* encoding various smaller bitmaps into a single - * unsigned int bitmap + * unsigned long bitmap */ - ATA_BITS_PIO = 7, - ATA_BITS_MWDMA = 5, - ATA_BITS_UDMA = 8, + ATA_NR_PIO_MODES = 7, + ATA_NR_MWDMA_MODES = 5, + ATA_NR_UDMA_MODES = 8, ATA_SHIFT_PIO = 0, - ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_BITS_PIO, - ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_BITS_MWDMA, - - ATA_MASK_PIO = ((1 << ATA_BITS_PIO) - 1) << ATA_SHIFT_PIO, - ATA_MASK_MWDMA = ((1 << ATA_BITS_MWDMA) - 1) << ATA_SHIFT_MWDMA, - ATA_MASK_UDMA = ((1 << ATA_BITS_UDMA) - 1) << ATA_SHIFT_UDMA, + ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_NR_PIO_MODES, + ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_NR_MWDMA_MODES, /* size of buffer to pad xfers ending on unaligned boundaries */ ATA_DMA_PAD_SZ = 4, - ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE, + ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE, /* ering size */ ATA_ERING_SIZE = 32, @@ -296,19 +311,18 @@ enum { /* reset / recovery action types */ ATA_EH_REVALIDATE = (1 << 0), - ATA_EH_SOFTRESET = (1 << 1), - ATA_EH_HARDRESET = (1 << 2), + ATA_EH_SOFTRESET = (1 << 1), /* meaningful only in ->prereset */ + ATA_EH_HARDRESET = (1 << 2), /* meaningful only in ->prereset */ + ATA_EH_RESET = ATA_EH_SOFTRESET | ATA_EH_HARDRESET, ATA_EH_ENABLE_LINK = (1 << 3), + ATA_EH_LPM = (1 << 4), /* link power management action */ - ATA_EH_RESET_MASK = ATA_EH_SOFTRESET | ATA_EH_HARDRESET, ATA_EH_PERDEV_MASK = ATA_EH_REVALIDATE, /* ata_eh_info->flags */ ATA_EHI_HOTPLUGGED = (1 << 0), /* could have been hotplugged */ - ATA_EHI_RESUME_LINK = (1 << 1), /* resume link (reset modifier) */ ATA_EHI_NO_AUTOPSY = (1 << 2), /* no autopsy */ ATA_EHI_QUIET = (1 << 3), /* be quiet */ - ATA_EHI_LPM = (1 << 4), /* link power management action */ ATA_EHI_DID_SOFTRESET = (1 << 16), /* already soft-reset this port */ ATA_EHI_DID_HARDRESET = (1 << 17), /* already soft-reset this port */ @@ -317,7 +331,6 @@ enum { ATA_EHI_POST_SETMODE = (1 << 20), /* revaildating after setmode */ ATA_EHI_DID_RESET = ATA_EHI_DID_SOFTRESET | ATA_EHI_DID_HARDRESET, - ATA_EHI_RESET_MODIFIER_MASK = ATA_EHI_RESUME_LINK, /* max tries if error condition is still set after ->error_handler */ ATA_EH_MAX_TRIES = 5, @@ -328,7 +341,7 @@ enum { ATA_EH_PMP_TRIES = 5, ATA_EH_PMP_LINK_TRIES = 3, - SATA_PMP_SCR_TIMEOUT = 250, + SATA_PMP_RW_TIMEOUT = 3000, /* PMP read/write timeout */ /* Horkage types. May be set by libata or controller on drives (some horkage may be drive/controller pair dependant */ @@ -338,7 +351,7 @@ enum { ATA_HORKAGE_NONCQ = (1 << 2), /* Don't use NCQ */ ATA_HORKAGE_MAX_SEC_128 = (1 << 3), /* Limit max sects to 128 */ ATA_HORKAGE_BROKEN_HPA = (1 << 4), /* Broken HPA */ - ATA_HORKAGE_SKIP_PM = (1 << 5), /* Skip PM operations */ + ATA_HORKAGE_DISABLE = (1 << 5), /* Disable it */ ATA_HORKAGE_HPA_SIZE = (1 << 6), /* native size off by one */ ATA_HORKAGE_IPM = (1 << 7), /* Link PM problems */ ATA_HORKAGE_IVB = (1 << 8), /* cbl det validity bit bugs */ @@ -349,6 +362,38 @@ enum { ATA_DMA_MASK_ATA = (1 << 0), /* DMA on ATA Disk */ ATA_DMA_MASK_ATAPI = (1 << 1), /* DMA on ATAPI */ ATA_DMA_MASK_CFA = (1 << 2), /* DMA on CF Card */ + + /* ATAPI command types */ + ATAPI_READ = 0, /* READs */ + ATAPI_WRITE = 1, /* WRITEs */ + ATAPI_READ_CD = 2, /* READ CD [MSF] */ + ATAPI_PASS_THRU = 3, /* SAT pass-thru */ + ATAPI_MISC = 4, /* the rest */ + + /* Timing constants */ + ATA_TIMING_SETUP = (1 << 0), + ATA_TIMING_ACT8B = (1 << 1), + ATA_TIMING_REC8B = (1 << 2), + ATA_TIMING_CYC8B = (1 << 3), + ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B | + ATA_TIMING_CYC8B, + ATA_TIMING_ACTIVE = (1 << 4), + ATA_TIMING_RECOVER = (1 << 5), + ATA_TIMING_CYCLE = (1 << 6), + ATA_TIMING_UDMA = (1 << 7), + ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B | + ATA_TIMING_REC8B | ATA_TIMING_CYC8B | + ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER | + ATA_TIMING_CYCLE | ATA_TIMING_UDMA, +}; + +enum ata_xfer_mask { + ATA_MASK_PIO = ((1LU << ATA_NR_PIO_MODES) - 1) + << ATA_SHIFT_PIO, + ATA_MASK_MWDMA = ((1LU << ATA_NR_MWDMA_MODES) - 1) + << ATA_SHIFT_MWDMA, + ATA_MASK_UDMA = ((1LU << ATA_NR_UDMA_MODES) - 1) + << ATA_SHIFT_UDMA, }; enum hsm_task_states { @@ -400,6 +445,7 @@ enum link_pm { }; extern struct class_device_attribute class_device_attr_link_power_management_policy; +#ifdef CONFIG_ATA_SFF struct ata_ioports { void __iomem *cmd_addr; void __iomem *data_addr; @@ -417,6 +463,7 @@ struct ata_ioports { void __iomem *bmdma_addr; void __iomem *scr_addr; }; +#endif /* CONFIG_ATA_SFF */ struct ata_host { spinlock_t lock; @@ -424,10 +471,10 @@ struct ata_host { void __iomem * const *iomap; unsigned int n_ports; void *private_data; - const struct ata_port_operations *ops; + struct ata_port_operations *ops; unsigned long flags; #ifdef CONFIG_ATA_ACPI - void *acpi_handle; + void *acpi_handle; #endif struct ata_port *simplex_claimed; /* channel owning the DMA */ struct ata_port *ports[0]; @@ -446,23 +493,25 @@ struct ata_queued_cmd { unsigned long flags; /* ATA_QCFLAG_xxx */ unsigned int tag; unsigned int n_elem; - unsigned int n_iter; - unsigned int orig_n_elem; + unsigned int n_iter; + unsigned int orig_n_elem; int dma_dir; - unsigned int pad_len; + unsigned int pad_len; unsigned int sect_size; unsigned int nbytes; + unsigned int extrabytes; + unsigned int raw_nbytes; unsigned int curbytes; struct scatterlist *cursg; unsigned int cursg_ofs; struct scatterlist sgent; - struct scatterlist pad_sgent; - void *buf_virt; + struct scatterlist pad_sgent; + void *buf_virt; /* DO NOT iterate over __sg manually, use ata_for_each_sg() */ struct scatterlist *__sg; @@ -482,7 +531,7 @@ struct ata_port_stats { }; struct ata_ering_entry { - int is_io; + unsigned int eflags; unsigned int err_mask; u64 timestamp; }; @@ -499,18 +548,13 @@ struct ata_device { unsigned int horkage; /* List of broken features */ struct scsi_device *sdev; /* attached SCSI device */ #ifdef CONFIG_ATA_ACPI - void *acpi_handle; + void *acpi_handle; union acpi_object *gtf_cache; #endif /* n_sector is used as CLEAR_OFFSET, read comment above CLEAR_OFFSET */ u64 n_sectors; /* size of device, if ATA */ unsigned int class; /* ATA_DEV_xxx */ - union { - u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */ - u32 gscr[SATA_PMP_GSCR_DWORDS]; /* PMP GSCR block */ - }; - u8 pio_mode; u8 dma_mode; u8 xfer_mode; @@ -522,9 +566,9 @@ struct ata_device { unsigned int cdb_len; /* per-dev xfer mask */ - unsigned int pio_mask; - unsigned int mwdma_mask; - unsigned int udma_mask; + unsigned long pio_mask; + unsigned long mwdma_mask; + unsigned long udma_mask; /* for CHS addressing */ u16 cylinders; /* Number of cylinders */ @@ -532,8 +576,13 @@ struct ata_device { u16 sectors; /* Number of sectors per track */ /* error history */ - struct ata_ering ering; int spdn_cnt; + struct ata_ering ering; + + union { + u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */ + u32 gscr[SATA_PMP_GSCR_DWORDS]; /* PMP GSCR block */ + }; }; /* Offset into struct ata_device. Fields above it are maintained @@ -560,6 +609,8 @@ struct ata_eh_context { int tries[ATA_MAX_DEVICES]; unsigned int classes[ATA_MAX_DEVICES]; unsigned int did_probe_mask; + unsigned int saved_ncq_enabled; + u8 saved_xfer_mode[ATA_MAX_DEVICES]; }; struct ata_acpi_drive @@ -596,7 +647,7 @@ struct ata_link { struct ata_port { struct Scsi_Host *scsi_host; /* our co-allocated scsi host */ - const struct ata_port_operations *ops; + struct ata_port_operations *ops; spinlock_t *lock; unsigned long flags; /* ATA_FLAG_xxx */ unsigned int pflags; /* ATA_PFLAG_xxx */ @@ -606,10 +657,12 @@ struct ata_port { struct ata_prd *prd; /* our SG list */ dma_addr_t prd_dma; /* and its DMA mapping */ - void *pad; /* array of DMA pad buffers */ - dma_addr_t pad_dma; + void *pad; /* array of DMA pad buffers */ + dma_addr_t pad_dma; +#ifdef CONFIG_ATA_SFF struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */ +#endif /* CONFIG_ATA_SFF */ u8 ctl; /* cache of ATA control register */ u8 last_ctl; /* Cache last written value */ @@ -655,86 +708,114 @@ struct ata_port { void *private_data; #ifdef CONFIG_ATA_ACPI - void *acpi_handle; + void *acpi_handle; struct ata_acpi_gtm __acpi_init_gtm; /* use ata_acpi_init_gtm() */ #endif u8 sector_buf[ATA_SECT_SIZE]; /* owned by EH */ }; -struct ata_port_operations { - void (*dev_config) (struct ata_device *); - - void (*set_piomode) (struct ata_port *, struct ata_device *); - void (*set_dmamode) (struct ata_port *, struct ata_device *); - unsigned long (*mode_filter) (struct ata_device *, unsigned long); - - void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf); - void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf); - - void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf); - u8 (*check_status)(struct ata_port *ap); - u8 (*check_altstatus)(struct ata_port *ap); - void (*dev_select)(struct ata_port *ap, unsigned int device); - - void (*phy_reset) (struct ata_port *ap); /* obsolete */ - int (*set_mode) (struct ata_link *link, struct ata_device **r_failed_dev); - - int (*cable_detect) (struct ata_port *ap); - - int (*check_atapi_dma) (struct ata_queued_cmd *qc); - - void (*bmdma_setup) (struct ata_queued_cmd *qc); - void (*bmdma_start) (struct ata_queued_cmd *qc); - - void (*data_xfer) (struct ata_device *, unsigned char *, unsigned int, int); - - int (*qc_defer) (struct ata_queued_cmd *qc); - void (*qc_prep) (struct ata_queued_cmd *qc); - unsigned int (*qc_issue) (struct ata_queued_cmd *qc); - - /* port multiplier */ - void (*pmp_attach) (struct ata_port *ap); - void (*pmp_detach) (struct ata_port *ap); +/* The following initializer overrides a method to NULL whether one of + * its parent has the method defined or not. This is equivalent to + * ERR_PTR(-ENOENT). Unfortunately, ERR_PTR doesn't render a constant + * expression and thus can't be used as an initializer. + */ +#define ATA_OP_NULL (void *)(unsigned long)(-ENOENT) - /* Error handlers. ->error_handler overrides ->eng_timeout and - * indicates that new-style EH is in place. +struct ata_port_operations { + /* + * Command execution */ - void (*eng_timeout) (struct ata_port *ap); /* obsolete */ - - void (*freeze) (struct ata_port *ap); - void (*thaw) (struct ata_port *ap); - void (*error_handler) (struct ata_port *ap); - void (*post_internal_cmd) (struct ata_queued_cmd *qc); - - irq_handler_t irq_handler; - void (*irq_clear) (struct ata_port *); - u8 (*irq_on) (struct ata_port *); - - int (*scr_read) (struct ata_port *ap, unsigned int sc_reg, u32 *val); - int (*scr_write) (struct ata_port *ap, unsigned int sc_reg, u32 val); - - int (*port_suspend) (struct ata_port *ap, pm_message_t mesg); - int (*port_resume) (struct ata_port *ap); - int (*enable_pm) (struct ata_port *ap, enum link_pm policy); - void (*disable_pm) (struct ata_port *ap); - int (*port_start) (struct ata_port *ap); - void (*port_stop) (struct ata_port *ap); - - void (*host_stop) (struct ata_host *host); + int (*qc_defer)(struct ata_queued_cmd *qc); + int (*check_atapi_dma)(struct ata_queued_cmd *qc); + void (*qc_prep)(struct ata_queued_cmd *qc); + unsigned int (*qc_issue)(struct ata_queued_cmd *qc); + bool (*qc_fill_rtf)(struct ata_queued_cmd *qc); + + /* + * Configuration and exception handling + */ + int (*cable_detect)(struct ata_port *ap); + unsigned long (*mode_filter)(struct ata_device *dev, unsigned long xfer_mask); + void (*set_piomode)(struct ata_port *ap, struct ata_device *dev); + void (*set_dmamode)(struct ata_port *ap, struct ata_device *dev); + int (*set_mode)(struct ata_link *link, struct ata_device **r_failed_dev); + + void (*dev_config)(struct ata_device *dev); + + void (*freeze)(struct ata_port *ap); + void (*thaw)(struct ata_port *ap); + ata_prereset_fn_t prereset; + ata_reset_fn_t softreset; + ata_reset_fn_t hardreset; + ata_postreset_fn_t postreset; + ata_prereset_fn_t pmp_prereset; + ata_reset_fn_t pmp_softreset; + ata_reset_fn_t pmp_hardreset; + ata_postreset_fn_t pmp_postreset; + void (*error_handler)(struct ata_port *ap); + void (*post_internal_cmd)(struct ata_queued_cmd *qc); + + /* + * Optional features + */ + int (*scr_read)(struct ata_port *ap, unsigned int sc_reg, u32 *val); + int (*scr_write)(struct ata_port *ap, unsigned int sc_reg, u32 val); + void (*pmp_attach)(struct ata_port *ap); + void (*pmp_detach)(struct ata_port *ap); + int (*enable_pm)(struct ata_port *ap, enum link_pm policy); + void (*disable_pm)(struct ata_port *ap); + + /* + * Start, stop, suspend and resume + */ + int (*port_suspend)(struct ata_port *ap, pm_message_t mesg); + int (*port_resume)(struct ata_port *ap); + int (*port_start)(struct ata_port *ap); + void (*port_stop)(struct ata_port *ap); + void (*host_stop)(struct ata_host *host); + +#ifdef CONFIG_ATA_SFF + /* + * SFF / taskfile oriented ops + */ + void (*sff_dev_select)(struct ata_port *ap, unsigned int device); + u8 (*sff_check_status)(struct ata_port *ap); + u8 (*sff_check_altstatus)(struct ata_port *ap); + void (*sff_tf_load)(struct ata_port *ap, const struct ata_taskfile *tf); + void (*sff_tf_read)(struct ata_port *ap, struct ata_taskfile *tf); + void (*sff_exec_command)(struct ata_port *ap, + const struct ata_taskfile *tf); + unsigned int (*sff_data_xfer)(struct ata_device *dev, + unsigned char *buf, unsigned int buflen, int rw); + u8 (*sff_irq_on)(struct ata_port *); + void (*sff_irq_clear)(struct ata_port *); + + void (*bmdma_setup)(struct ata_queued_cmd *qc); + void (*bmdma_start)(struct ata_queued_cmd *qc); + void (*bmdma_stop)(struct ata_queued_cmd *qc); + u8 (*bmdma_status)(struct ata_port *ap); +#endif /* CONFIG_ATA_SFF */ + + /* + * Obsolete + */ + void (*phy_reset)(struct ata_port *ap); + void (*eng_timeout)(struct ata_port *ap); - void (*bmdma_stop) (struct ata_queued_cmd *qc); - u8 (*bmdma_status) (struct ata_port *ap); + /* + * ->inherits must be the last field and all the preceding + * fields must be pointers. + */ + const struct ata_port_operations *inherits; }; struct ata_port_info { - struct scsi_host_template *sht; unsigned long flags; unsigned long link_flags; unsigned long pio_mask; unsigned long mwdma_mask; unsigned long udma_mask; - const struct ata_port_operations *port_ops; - irq_handler_t irq_handler; + struct ata_port_operations *port_ops; void *private_data; }; @@ -750,13 +831,14 @@ struct ata_timing { unsigned short udma; /* t2CYCTYP/2 */ }; -#define FIT(v, vmin, vmax) max_t(short, min_t(short, v, vmax), vmin) - +/* + * Core layer - drivers/ata/libata-core.c + */ extern const unsigned long sata_deb_timing_normal[]; extern const unsigned long sata_deb_timing_hotplug[]; extern const unsigned long sata_deb_timing_long[]; -extern const struct ata_port_operations ata_dummy_port_ops; +extern struct ata_port_operations ata_dummy_port_ops; extern const struct ata_port_info ata_dummy_port_info; static inline const unsigned long * @@ -773,24 +855,22 @@ static inline int ata_port_is_dummy(struct ata_port *ap) return ap->ops == &ata_dummy_port_ops; } -extern void sata_print_link_status(struct ata_link *link); extern void ata_port_probe(struct ata_port *); -extern void ata_bus_reset(struct ata_port *ap); extern int sata_set_spd(struct ata_link *link); +extern int ata_std_prereset(struct ata_link *link, unsigned long deadline); +extern int ata_wait_after_reset(struct ata_link *link, unsigned long deadline, + int (*check_ready)(struct ata_link *link)); extern int sata_link_debounce(struct ata_link *link, const unsigned long *params, unsigned long deadline); extern int sata_link_resume(struct ata_link *link, const unsigned long *params, unsigned long deadline); -extern int ata_std_prereset(struct ata_link *link, unsigned long deadline); -extern int ata_std_softreset(struct ata_link *link, unsigned int *classes, - unsigned long deadline); extern int sata_link_hardreset(struct ata_link *link, - const unsigned long *timing, unsigned long deadline); + const unsigned long *timing, unsigned long deadline, + bool *online, int (*check_ready)(struct ata_link *)); extern int sata_std_hardreset(struct ata_link *link, unsigned int *class, unsigned long deadline); extern void ata_std_postreset(struct ata_link *link, unsigned int *classes); extern void ata_port_disable(struct ata_port *); -extern void ata_std_ports(struct ata_ioports *ioaddr); extern struct ata_host *ata_host_alloc(struct device *dev, int max_ports); extern struct ata_host *ata_host_alloc_pinfo(struct device *dev, @@ -803,7 +883,7 @@ extern int ata_host_activate(struct ata_host *host, int irq, struct scsi_host_template *sht); extern void ata_host_detach(struct ata_host *host); extern void ata_host_init(struct ata_host *, struct device *, - unsigned long, const struct ata_port_operations *); + unsigned long, struct ata_port_operations *); extern int ata_scsi_detect(struct scsi_host_template *sht); extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg); extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *)); @@ -816,7 +896,6 @@ extern void ata_sas_port_stop(struct ata_port *ap); extern int ata_sas_slave_configure(struct scsi_device *, struct ata_port *); extern int ata_sas_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *), struct ata_port *ap); -extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc); extern int sata_scr_valid(struct ata_link *link); extern int sata_scr_read(struct ata_link *link, int reg, u32 *val); extern int sata_scr_write(struct ata_link *link, int reg, u32 val); @@ -828,72 +907,38 @@ extern int ata_host_suspend(struct ata_host *host, pm_message_t mesg); extern void ata_host_resume(struct ata_host *host); #endif extern int ata_ratelimit(void); -extern int ata_busy_sleep(struct ata_port *ap, - unsigned long timeout_pat, unsigned long timeout); -extern void ata_wait_after_reset(struct ata_port *ap, unsigned long deadline); -extern int ata_wait_ready(struct ata_port *ap, unsigned long deadline); -extern void ata_port_queue_task(struct ata_port *ap, work_func_t fn, - void *data, unsigned long delay); extern u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, unsigned long interval_msec, unsigned long timeout_msec); -extern unsigned int ata_dev_try_classify(struct ata_device *dev, int present, - u8 *r_err); - -/* - * Default driver ops implementations - */ -extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf); -extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf); +extern int atapi_cmd_type(u8 opcode); extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis); extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf); -extern void ata_noop_dev_select(struct ata_port *ap, unsigned int device); -extern void ata_std_dev_select(struct ata_port *ap, unsigned int device); -extern u8 ata_check_status(struct ata_port *ap); -extern u8 ata_altstatus(struct ata_port *ap); -extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf); +extern unsigned long ata_pack_xfermask(unsigned long pio_mask, + unsigned long mwdma_mask, unsigned long udma_mask); +extern void ata_unpack_xfermask(unsigned long xfer_mask, + unsigned long *pio_mask, unsigned long *mwdma_mask, + unsigned long *udma_mask); +extern u8 ata_xfer_mask2mode(unsigned long xfer_mask); +extern unsigned long ata_xfer_mode2mask(u8 xfer_mode); +extern int ata_xfer_mode2shift(unsigned long xfer_mode); +extern const char *ata_mode_string(unsigned long xfer_mask); +extern unsigned long ata_id_xfermask(const u16 *id); extern int ata_port_start(struct ata_port *ap); -extern int ata_sff_port_start(struct ata_port *ap); -extern irqreturn_t ata_interrupt(int irq, void *dev_instance, struct pt_regs *pt_regs); -extern void ata_data_xfer(struct ata_device *adev, unsigned char *buf, - unsigned int buflen, int write_data); -extern void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf, - unsigned int buflen, int write_data); extern int ata_std_qc_defer(struct ata_queued_cmd *qc); -extern void ata_dumb_qc_prep(struct ata_queued_cmd *qc); -extern void ata_qc_prep(struct ata_queued_cmd *qc); extern void ata_noop_qc_prep(struct ata_queued_cmd *qc); -extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc); extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, - unsigned int buflen); + unsigned int buflen); extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, - unsigned int n_elem); + unsigned int n_elem); extern unsigned int ata_dev_classify(const struct ata_taskfile *tf); extern void ata_dev_disable(struct ata_device *adev); extern void ata_id_string(const u16 *id, unsigned char *s, unsigned int ofs, unsigned int len); extern void ata_id_c_string(const u16 *id, unsigned char *s, unsigned int ofs, unsigned int len); -extern void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown); -extern void ata_bmdma_setup(struct ata_queued_cmd *qc); -extern void ata_bmdma_start(struct ata_queued_cmd *qc); -extern void ata_bmdma_stop(struct ata_queued_cmd *qc); -extern u8 ata_bmdma_status(struct ata_port *ap); -extern void ata_bmdma_irq_clear(struct ata_port *ap); -extern void ata_bmdma_freeze(struct ata_port *ap); -extern void ata_bmdma_thaw(struct ata_port *ap); -extern void ata_bmdma_drive_eh(struct ata_port *ap, ata_prereset_fn_t prereset, - ata_reset_fn_t softreset, - ata_reset_fn_t hardreset, - ata_postreset_fn_t postreset); -extern void ata_bmdma_error_handler(struct ata_port *ap); -extern void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc); -extern int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, - u8 status, int in_wq); extern void ata_qc_complete(struct ata_queued_cmd *qc); -extern int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, - void (*finish_qc)(struct ata_queued_cmd *)); +extern int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active); extern void ata_scsi_simulate(struct ata_device *dev, struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *)); extern int ata_std_bios_param(struct scsi_device *sdev, @@ -905,42 +950,48 @@ extern int ata_scsi_change_queue_depth(struct scsi_device *sdev, int queue_depth); extern struct ata_device *ata_dev_pair(struct ata_device *adev); extern int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev); -extern u8 ata_irq_on(struct ata_port *ap); extern int ata_cable_40wire(struct ata_port *ap); extern int ata_cable_80wire(struct ata_port *ap); extern int ata_cable_sata(struct ata_port *ap); +extern int ata_cable_ignore(struct ata_port *ap); extern int ata_cable_unknown(struct ata_port *ap); -/* - * Timing helpers - */ - +/* Timing helpers */ extern unsigned int ata_pio_need_iordy(const struct ata_device *); +extern const struct ata_timing *ata_timing_find_mode(u8 xfer_mode); extern int ata_timing_compute(struct ata_device *, unsigned short, struct ata_timing *, int, int); extern void ata_timing_merge(const struct ata_timing *, const struct ata_timing *, struct ata_timing *, unsigned int); +extern u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle); -enum { - ATA_TIMING_SETUP = (1 << 0), - ATA_TIMING_ACT8B = (1 << 1), - ATA_TIMING_REC8B = (1 << 2), - ATA_TIMING_CYC8B = (1 << 3), - ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B | - ATA_TIMING_CYC8B, - ATA_TIMING_ACTIVE = (1 << 4), - ATA_TIMING_RECOVER = (1 << 5), - ATA_TIMING_CYCLE = (1 << 6), - ATA_TIMING_UDMA = (1 << 7), - ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B | - ATA_TIMING_REC8B | ATA_TIMING_CYC8B | - ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER | - ATA_TIMING_CYCLE | ATA_TIMING_UDMA, +/* PCI */ +#ifdef CONFIG_PCI +struct pci_dev; + +struct pci_bits { + unsigned int reg; /* PCI config register to read */ + unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */ + unsigned long mask; + unsigned long val; }; -/* libata-acpi.c */ +extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits); +extern void ata_pci_remove_one(struct pci_dev *pdev); + +#ifdef CONFIG_PM +extern void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg); +extern int __must_check ata_pci_device_do_resume(struct pci_dev *pdev); +extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); +extern int ata_pci_device_resume(struct pci_dev *pdev); +#endif /* CONFIG_PM */ +#endif /* CONFIG_PCI */ + +/* + * ACPI - drivers/ata/libata-acpi.c + */ #ifdef CONFIG_ATA_ACPI static inline const struct ata_acpi_gtm *ata_acpi_init_gtm(struct ata_port *ap) { @@ -948,63 +999,44 @@ static inline const struct ata_acpi_gtm *ata_acpi_init_gtm(struct ata_port *ap) return &ap->__acpi_init_gtm; return NULL; } -extern int ata_acpi_cbl_80wire(struct ata_port *ap); int ata_acpi_stm(struct ata_port *ap, const struct ata_acpi_gtm *stm); int ata_acpi_gtm(struct ata_port *ap, struct ata_acpi_gtm *stm); +unsigned long ata_acpi_gtm_xfermask(struct ata_device *dev, + const struct ata_acpi_gtm *gtm); +int ata_acpi_cbl_80wire(struct ata_port *ap, const struct ata_acpi_gtm *gtm); #else static inline const struct ata_acpi_gtm *ata_acpi_init_gtm(struct ata_port *ap) { return NULL; } -static inline int ata_acpi_cbl_80wire(struct ata_port *ap) { return 0; } -#endif - -#ifdef CONFIG_PCI -struct pci_dev; -extern int ata_pci_init_one(struct pci_dev *pdev, - const struct ata_port_info * const * ppi); -extern void ata_pci_remove_one(struct pci_dev *pdev); -#ifdef CONFIG_PM -extern void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg); -extern int __must_check ata_pci_device_do_resume(struct pci_dev *pdev); -extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); -extern int ata_pci_device_resume(struct pci_dev *pdev); -#endif -extern int ata_pci_clear_simplex(struct pci_dev *pdev); +static inline int ata_acpi_stm(const struct ata_port *ap, + struct ata_acpi_gtm *stm) +{ + return -ENOSYS; +} -struct pci_bits { - unsigned int reg; /* PCI config register to read */ - unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */ - unsigned long mask; - unsigned long val; -}; +static inline int ata_acpi_gtm(const struct ata_port *ap, + struct ata_acpi_gtm *stm) +{ + return -ENOSYS; +} -extern int ata_pci_init_sff_host(struct ata_host *host); -extern int ata_pci_init_bmdma(struct ata_host *host); -extern int ata_pci_prepare_sff_host(struct pci_dev *pdev, - const struct ata_port_info * const * ppi, - struct ata_host **r_host); -extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits); -extern unsigned long ata_pci_default_filter(struct ata_device *, unsigned long); -#endif /* CONFIG_PCI */ +static inline unsigned int ata_acpi_gtm_xfermask(struct ata_device *dev, + const struct ata_acpi_gtm *gtm) +{ + return 0; +} -/* - * PMP - */ -extern int sata_pmp_qc_defer_cmd_switch(struct ata_queued_cmd *qc); -extern int sata_pmp_std_prereset(struct ata_link *link, unsigned long deadline); -extern int sata_pmp_std_hardreset(struct ata_link *link, unsigned int *class, - unsigned long deadline); -extern void sata_pmp_std_postreset(struct ata_link *link, unsigned int *class); -extern void sata_pmp_do_eh(struct ata_port *ap, - ata_prereset_fn_t prereset, ata_reset_fn_t softreset, - ata_reset_fn_t hardreset, ata_postreset_fn_t postreset, - ata_prereset_fn_t pmp_prereset, ata_reset_fn_t pmp_softreset, - ata_reset_fn_t pmp_hardreset, ata_postreset_fn_t pmp_postreset); +static inline int ata_acpi_cbl_80wire(struct ata_port *ap, + const struct ata_acpi_gtm *gtm) +{ + return 0; +} +#endif /* - * EH + * EH - drivers/ata/libata-eh.c */ extern void ata_port_schedule_eh(struct ata_port *ap); extern int ata_link_abort(struct ata_link *link); @@ -1017,10 +1049,97 @@ extern void ata_eh_thaw_port(struct ata_port *ap); extern void ata_eh_qc_complete(struct ata_queued_cmd *qc); extern void ata_eh_qc_retry(struct ata_queued_cmd *qc); +extern void ata_eh_analyze_ncq_error(struct ata_link *link); extern void ata_do_eh(struct ata_port *ap, ata_prereset_fn_t prereset, ata_reset_fn_t softreset, ata_reset_fn_t hardreset, ata_postreset_fn_t postreset); +extern void ata_std_error_handler(struct ata_port *ap); + +/* + * Base operations to inherit from and initializers for sht + * + * Operations + * + * base : Common to all libata drivers. + * sata : SATA controllers w/ native interface. + * pmp : SATA controllers w/ PMP support. + * sff : SFF ATA controllers w/o BMDMA support. + * bmdma : SFF ATA controllers w/ BMDMA support. + * + * sht initializers + * + * BASE : Common to all libata drivers. The user must set + * sg_tablesize and dma_boundary. + * PIO : SFF ATA controllers w/ only PIO support. + * BMDMA : SFF ATA controllers w/ BMDMA support. sg_tablesize and + * dma_boundary are set to BMDMA limits. + * NCQ : SATA controllers supporting NCQ. The user must set + * sg_tablesize, dma_boundary and can_queue. + */ +extern const struct ata_port_operations ata_base_port_ops; +extern const struct ata_port_operations sata_port_ops; + +#define ATA_BASE_SHT(drv_name) \ + .module = THIS_MODULE, \ + .name = drv_name, \ + .ioctl = ata_scsi_ioctl, \ + .queuecommand = ata_scsi_queuecmd, \ + .can_queue = ATA_DEF_QUEUE, \ + .this_id = ATA_SHT_THIS_ID, \ + .cmd_per_lun = ATA_SHT_CMD_PER_LUN, \ + .emulated = ATA_SHT_EMULATED, \ + .use_clustering = ATA_SHT_USE_CLUSTERING, \ + .proc_name = drv_name, \ + .slave_configure = ata_scsi_slave_config, \ + .slave_destroy = ata_scsi_slave_destroy, \ + .bios_param = ata_std_bios_param + +#define ATA_NCQ_SHT(drv_name) \ + ATA_BASE_SHT(drv_name), \ + .change_queue_depth = ata_scsi_change_queue_depth + +/* + * PMP helpers + */ +#ifdef CONFIG_SATA_PMP +static inline bool sata_pmp_supported(struct ata_port *ap) +{ + return ap->flags & ATA_FLAG_PMP; +} + +static inline bool sata_pmp_attached(struct ata_port *ap) +{ + return ap->nr_pmp_links != 0; +} + +static inline int ata_is_host_link(const struct ata_link *link) +{ + return link == &link->ap->link; +} +#else /* CONFIG_SATA_PMP */ +static inline bool sata_pmp_supported(struct ata_port *ap) +{ + return false; +} + +static inline bool sata_pmp_attached(struct ata_port *ap) +{ + return false; +} + +static inline int ata_is_host_link(const struct ata_link *link) +{ + return 1; +} +#endif /* CONFIG_SATA_PMP */ + +static inline int sata_srst_pmp(struct ata_link *link) +{ + if (sata_pmp_supported(link->ap) && ata_is_host_link(link)) + return SATA_PMP_CTRL_PORT; + return link->pmp; +} /* * printk helpers @@ -1029,7 +1148,7 @@ extern void ata_do_eh(struct ata_port *ap, ata_prereset_fn_t prereset, printk("%sata%u: "fmt, lv, (ap)->print_id , ##args) #define ata_link_printk(link, lv, fmt, args...) do { \ - if ((link)->ap->nr_pmp_links) \ + if (sata_pmp_attached((link)->ap)) \ printk("%sata%u.%02u: "fmt, lv, (link)->ap->print_id, \ (link)->pmp , ##args); \ else \ @@ -1049,18 +1168,11 @@ extern void ata_ehi_push_desc(struct ata_eh_info *ehi, const char *fmt, ...) __attribute__ ((format (printf, 2, 3))); extern void ata_ehi_clear_desc(struct ata_eh_info *ehi); -static inline void ata_ehi_schedule_probe(struct ata_eh_info *ehi) -{ - ehi->flags |= ATA_EHI_RESUME_LINK; - ehi->action |= ATA_EH_SOFTRESET; - ehi->probe_mask |= (1 << ATA_MAX_DEVICES) - 1; -} - static inline void ata_ehi_hotplugged(struct ata_eh_info *ehi) { - ata_ehi_schedule_probe(ehi); + ehi->probe_mask |= (1 << ATA_MAX_DEVICES) - 1; ehi->flags |= ATA_EHI_HOTPLUGGED; - ehi->action |= ATA_EH_ENABLE_LINK; + ehi->action |= ATA_EH_RESET | ATA_EH_ENABLE_LINK; ehi->err_mask |= AC_ERR_ATA_BUS; } @@ -1110,7 +1222,7 @@ static inline unsigned int ata_tag_valid(unsigned int tag) static inline unsigned int ata_tag_internal(unsigned int tag) { - return tag == ATA_MAX_QUEUE - 1; + return tag == ATA_TAG_INTERNAL; } /* @@ -1151,11 +1263,6 @@ static inline unsigned int ata_dev_absent(const struct ata_device *dev) /* * link helpers */ -static inline int ata_is_host_link(const struct ata_link *link) -{ - return link == &link->ap->link; -} - static inline int ata_link_max_devices(const struct ata_link *link) { if (ata_is_host_link(link) && link->ap->flags & ATA_FLAG_SLAVE_POSS) @@ -1170,7 +1277,7 @@ static inline int ata_link_active(struct ata_link *link) static inline struct ata_link *ata_port_first_link(struct ata_port *ap) { - if (ap->nr_pmp_links) + if (sata_pmp_attached(ap)) return ap->pmp_link; return &ap->link; } @@ -1179,13 +1286,13 @@ static inline struct ata_link *ata_port_next_link(struct ata_link *link) { struct ata_port *ap = link->ap; - if (link == &ap->link) { - if (!ap->nr_pmp_links) + if (ata_is_host_link(link)) { + if (!sata_pmp_attached(ap)) return NULL; return ap->pmp_link; } - if (++link - ap->pmp_link < ap->nr_pmp_links) + if (++link < ap->nr_pmp_links + ap->pmp_link) return link; return NULL; } @@ -1206,11 +1313,6 @@ static inline struct ata_link *ata_port_next_link(struct ata_link *link) for ((dev) = (link)->device + ata_link_max_devices(link) - 1; \ (dev) >= (link)->device || ((dev) = NULL); (dev)--) -static inline u8 ata_chk_status(struct ata_port *ap) -{ - return ap->ops->check_status(ap); -} - /** * ata_ncq_enabled - Test whether NCQ is enabled * @dev: ATA device to test for @@ -1227,74 +1329,6 @@ static inline int ata_ncq_enabled(struct ata_device *dev) ATA_DFLAG_NCQ)) == ATA_DFLAG_NCQ; } -/** - * ata_pause - Flush writes and pause 400 nanoseconds. - * @ap: Port to wait for. - * - * LOCKING: - * Inherited from caller. - */ - -static inline void ata_pause(struct ata_port *ap) -{ - ata_altstatus(ap); - ndelay(400); -} - - -/** - * ata_busy_wait - Wait for a port status register - * @ap: Port to wait for. - * @bits: bits that must be clear - * @max: number of 10uS waits to perform - * - * Waits up to max*10 microseconds for the selected bits in the port's - * status register to be cleared. - * Returns final value of status register. - * - * LOCKING: - * Inherited from caller. - */ - -static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits, - unsigned int max) -{ - u8 status; - - do { - udelay(10); - status = ata_chk_status(ap); - max--; - } while (status != 0xff && (status & bits) && (max > 0)); - - return status; -} - - -/** - * ata_wait_idle - Wait for a port to be idle. - * @ap: Port to wait for. - * - * Waits up to 10ms for port's BUSY and DRQ signals to clear. - * Returns final value of status register. - * - * LOCKING: - * Inherited from caller. - */ - -static inline u8 ata_wait_idle(struct ata_port *ap) -{ - u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); - -#ifdef ATA_DEBUG - if (status != 0xff && (status & (ATA_BUSY | ATA_DRQ))) - ata_port_printk(ap, KERN_DEBUG, "abnormal Status 0x%X\n", - status); -#endif - - return status; -} - static inline void ata_qc_set_polling(struct ata_queued_cmd *qc) { qc->tf.ctl |= ATA_NIEN; @@ -1323,6 +1357,11 @@ static inline struct ata_queued_cmd *ata_qc_from_tag(struct ata_port *ap, return NULL; } +static inline unsigned int ata_qc_raw_nbytes(struct ata_queued_cmd *qc) +{ + return qc->nbytes - min(qc->extrabytes, qc->nbytes); +} + static inline void ata_tf_init(struct ata_device *dev, struct ata_taskfile *tf) { memset(tf, 0, sizeof(*tf)); @@ -1341,7 +1380,7 @@ static inline void ata_qc_reinit(struct ata_queued_cmd *qc) qc->flags = 0; qc->cursg = NULL; qc->cursg_ofs = 0; - qc->nbytes = qc->curbytes = 0; + qc->nbytes = qc->raw_nbytes = qc->extrabytes = qc->curbytes = 0; qc->n_elem = 0; qc->n_iter = 0; qc->err_mask = 0; @@ -1397,4 +1436,172 @@ static inline struct ata_port *ata_shost_to_port(struct Scsi_Host *host) return *(struct ata_port **)&host->hostdata[0]; } +static inline int ata_check_ready(u8 status) +{ + if (!(status & ATA_BUSY)) + return 1; + + /* 0xff indicates either no device or device not ready */ + if (status == 0xff) + return -ENODEV; + + return 0; +} + + +/************************************************************************** + * PMP - drivers/ata/libata-pmp.c + */ +#ifdef CONFIG_SATA_PMP + +extern const struct ata_port_operations sata_pmp_port_ops; + +extern int sata_pmp_qc_defer_cmd_switch(struct ata_queued_cmd *qc); +extern void sata_pmp_error_handler(struct ata_port *ap); + +#else /* CONFIG_SATA_PMP */ + +#define sata_pmp_port_ops sata_port_ops +#define sata_pmp_qc_defer_cmd_switch ata_std_qc_defer +#define sata_pmp_error_handler ata_std_error_handler + +#endif /* CONFIG_SATA_PMP */ + + +/************************************************************************** + * SFF - drivers/ata/libata-sff.c + */ +#ifdef CONFIG_ATA_SFF + +extern const struct ata_port_operations ata_sff_port_ops; +extern const struct ata_port_operations ata_bmdma_port_ops; + +/* PIO only, sg_tablesize and dma_boundary limits can be removed */ +#define ATA_PIO_SHT(drv_name) \ + ATA_BASE_SHT(drv_name), \ + .sg_tablesize = LIBATA_MAX_PRD, \ + .dma_boundary = ATA_DMA_BOUNDARY + +#define ATA_BMDMA_SHT(drv_name) \ + ATA_BASE_SHT(drv_name), \ + .sg_tablesize = LIBATA_MAX_PRD, \ + .dma_boundary = ATA_DMA_BOUNDARY + +extern void ata_sff_qc_prep(struct ata_queued_cmd *qc); +extern void ata_sff_dumb_qc_prep(struct ata_queued_cmd *qc); +extern void ata_sff_dev_select(struct ata_port *ap, unsigned int device); +extern u8 ata_sff_check_status(struct ata_port *ap); +extern void ata_sff_pause(struct ata_port *ap); +extern void ata_sff_dma_pause(struct ata_port *ap); +extern int ata_sff_busy_sleep(struct ata_port *ap, + unsigned long timeout_pat, unsigned long timeout); +extern int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline); +extern void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf); +extern void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf); +extern void ata_sff_exec_command(struct ata_port *ap, + const struct ata_taskfile *tf); +extern unsigned int ata_sff_data_xfer(struct ata_device *dev, + unsigned char *buf, unsigned int buflen, int rw); +extern unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev, + unsigned char *buf, unsigned int buflen, int rw); +extern u8 ata_sff_irq_on(struct ata_port *ap); +extern void ata_sff_irq_clear(struct ata_port *ap); +extern int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, + u8 status, int in_wq); +extern unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc); +extern bool ata_sff_qc_fill_rtf(struct ata_queued_cmd *qc); +extern unsigned int ata_sff_host_intr(struct ata_port *ap, + struct ata_queued_cmd *qc); +extern irqreturn_t ata_sff_interrupt(int irq, void *dev_instance, + struct pt_regs *pt_regs); +extern void ata_sff_freeze(struct ata_port *ap); +extern void ata_sff_thaw(struct ata_port *ap); +extern int ata_sff_prereset(struct ata_link *link, unsigned long deadline); +extern unsigned int ata_sff_dev_classify(struct ata_device *dev, int present, + u8 *r_err); +extern int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask, + unsigned long deadline); +extern int ata_sff_softreset(struct ata_link *link, unsigned int *classes, + unsigned long deadline); +extern int sata_sff_hardreset(struct ata_link *link, unsigned int *class, + unsigned long deadline); +extern void ata_sff_postreset(struct ata_link *link, unsigned int *classes); +extern void ata_sff_error_handler(struct ata_port *ap); +extern void ata_sff_post_internal_cmd(struct ata_queued_cmd *qc); +extern int ata_sff_port_start(struct ata_port *ap); +extern void ata_sff_std_ports(struct ata_ioports *ioaddr); +extern unsigned long ata_bmdma_mode_filter(struct ata_device *dev, + unsigned long xfer_mask); +extern void ata_bmdma_setup(struct ata_queued_cmd *qc); +extern void ata_bmdma_start(struct ata_queued_cmd *qc); +extern void ata_bmdma_stop(struct ata_queued_cmd *qc); +extern u8 ata_bmdma_status(struct ata_port *ap); +extern void ata_bus_reset(struct ata_port *ap); + +#ifdef CONFIG_PCI +extern int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev); +extern int ata_pci_bmdma_init(struct ata_host *host); +extern int ata_pci_sff_init_host(struct ata_host *host); +extern int ata_pci_sff_prepare_host(struct pci_dev *pdev, + const struct ata_port_info * const * ppi, + struct ata_host **r_host); +extern int ata_pci_sff_activate_host(struct ata_host *host, + irq_handler_t irq_handler, + struct scsi_host_template *sht); +extern int ata_pci_sff_init_one(struct pci_dev *pdev, + const struct ata_port_info * const * ppi, + struct scsi_host_template *sht, void *host_priv); +#endif /* CONFIG_PCI */ + +/** + * ata_sff_busy_wait - Wait for a port status register + * @ap: Port to wait for. + * @bits: bits that must be clear + * @max: number of 10uS waits to perform + * + * Waits up to max*10 microseconds for the selected bits in the port's + * status register to be cleared. + * Returns final value of status register. + * + * LOCKING: + * Inherited from caller. + */ +static inline u8 ata_sff_busy_wait(struct ata_port *ap, unsigned int bits, + unsigned int max) +{ + u8 status; + + do { + udelay(10); + status = ap->ops->sff_check_status(ap); + max--; + } while (status != 0xff && (status & bits) && (max > 0)); + + return status; +} + +/** + * ata_wait_idle - Wait for a port to be idle. + * @ap: Port to wait for. + * + * Waits up to 10ms for port's BUSY and DRQ signals to clear. + * Returns final value of status register. + * + * LOCKING: + * Inherited from caller. + */ +static inline u8 ata_wait_idle(struct ata_port *ap) +{ + u8 status = ata_sff_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); + +#ifdef ATA_DEBUG + if (status != 0xff && (status & (ATA_BUSY | ATA_DRQ))) + ata_port_printk(ap, KERN_DEBUG, "abnormal Status 0x%X\n", + status); +#endif + + return status; +} +#endif /* CONFIG_ATA_SFF */ + #endif /* __LINUX_LIBATA_H__ */