From: Rob Evers <revers@redhat.com> Date: Tue, 16 Feb 2010 19:37:48 -0500 Subject: lpfc: Add support for new SLI features Message-id: <20100216193709.8604.4251.sendpatchset@localhost.localdomain> Patchwork-id: 23292 O-Subject: [RHEL5.5 2/7] lpfc: Add support for new SLI features Bugzilla: 564506 RH-Acked-by: Mike Christie <mchristi@redhat.com> RH-Acked-by: Tomas Henzl <thenzl@redhat.com> https://bugzilla.redhat.com/show_bug.cgi?id=564506 Add support for new SLI features Signed-off-by: Jarod Wilson <jarod@redhat.com> diff --git a/drivers/scsi/lpfc/lpfc_hw4.h b/drivers/scsi/lpfc/lpfc_hw4.h index 034b497..3441c41 100644 --- a/drivers/scsi/lpfc/lpfc_hw4.h +++ b/drivers/scsi/lpfc/lpfc_hw4.h @@ -54,29 +54,35 @@ struct dma_address { uint32_t addr_hi; }; -#define LPFC_SLIREV_CONF_WORD 0x58 struct lpfc_sli_intf { uint32_t word0; -#define lpfc_sli_intf_iftype_MASK 0x00000007 -#define lpfc_sli_intf_iftype_SHIFT 0 -#define lpfc_sli_intf_iftype_WORD word0 -#define lpfc_sli_intf_rev_MASK 0x0000000f -#define lpfc_sli_intf_rev_SHIFT 4 -#define lpfc_sli_intf_rev_WORD word0 -#define LPFC_SLIREV_CONF_SLI4 4 -#define lpfc_sli_intf_family_MASK 0x000000ff -#define lpfc_sli_intf_family_SHIFT 8 -#define lpfc_sli_intf_family_WORD word0 -#define lpfc_sli_intf_feat1_MASK 0x000000ff -#define lpfc_sli_intf_feat1_SHIFT 16 -#define lpfc_sli_intf_feat1_WORD word0 -#define lpfc_sli_intf_feat2_MASK 0x0000001f -#define lpfc_sli_intf_feat2_SHIFT 24 -#define lpfc_sli_intf_feat2_WORD word0 -#define lpfc_sli_intf_valid_MASK 0x00000007 -#define lpfc_sli_intf_valid_SHIFT 29 -#define lpfc_sli_intf_valid_WORD word0 +#define lpfc_sli_intf_valid_SHIFT 29 +#define lpfc_sli_intf_valid_MASK 0x00000007 +#define lpfc_sli_intf_valid_WORD word0 #define LPFC_SLI_INTF_VALID 6 +#define lpfc_sli_intf_featurelevel2_SHIFT 24 +#define lpfc_sli_intf_featurelevel2_MASK 0x0000001F +#define lpfc_sli_intf_featurelevel2_WORD word0 +#define lpfc_sli_intf_featurelevel1_SHIFT 16 +#define lpfc_sli_intf_featurelevel1_MASK 0x000000FF +#define lpfc_sli_intf_featurelevel1_WORD word0 +#define LPFC_SLI_INTF_FEATERLEVEL1_1 1 +#define LPFC_SLI_INTF_FEATERLEVEL1_2 2 +#define lpfc_sli_intf_sli_family_SHIFT 8 +#define lpfc_sli_intf_sli_family_MASK 0x000000FF +#define lpfc_sli_intf_sli_family_WORD word0 +#define LPFC_SLI_INTF_FAMILY_BE2 0 +#define LPFC_SLI_INTF_FAMILY_BE3 1 +#define lpfc_sli_intf_slirev_SHIFT 4 +#define lpfc_sli_intf_slirev_MASK 0x0000000F +#define lpfc_sli_intf_slirev_WORD word0 +#define LPFC_SLI_INTF_REV_SLI3 3 +#define LPFC_SLI_INTF_REV_SLI4 4 +#define lpfc_sli_intf_if_type_SHIFT 0 +#define lpfc_sli_intf_if_type_MASK 0x00000007 +#define lpfc_sli_intf_if_type_WORD word0 +#define LPFC_SLI_INTF_IF_TYPE_0 0 +#define LPFC_SLI_INTF_IF_TYPE_1 1 }; #define LPFC_SLI4_MBX_EMBED true @@ -514,7 +520,7 @@ struct lpfc_register { #define LPFC_UERR_STATUS_LO 0x00A0 #define LPFC_UE_MASK_HI 0x00AC #define LPFC_UE_MASK_LO 0x00A8 -#define LPFC_SCRATCHPAD 0x0058 +#define LPFC_SLI_INTF 0x0058 /* BAR0 Registers */ #define LPFC_HST_STATE 0x00AC @@ -574,19 +580,6 @@ struct lpfc_register { #define LPFC_POST_STAGE_ARMFW_READY 0xC000 #define LPFC_POST_STAGE_ARMFW_UE 0xF000 -#define lpfc_scratchpad_slirev_SHIFT 4 -#define lpfc_scratchpad_slirev_MASK 0xF -#define lpfc_scratchpad_slirev_WORD word0 -#define lpfc_scratchpad_chiptype_SHIFT 8 -#define lpfc_scratchpad_chiptype_MASK 0xFF -#define lpfc_scratchpad_chiptype_WORD word0 -#define lpfc_scratchpad_featurelevel1_SHIFT 16 -#define lpfc_scratchpad_featurelevel1_MASK 0xFF -#define lpfc_scratchpad_featurelevel1_WORD word0 -#define lpfc_scratchpad_featurelevel2_SHIFT 24 -#define lpfc_scratchpad_featurelevel2_MASK 0xFF -#define lpfc_scratchpad_featurelevel2_WORD word0 - /* BAR1 Registers */ #define LPFC_IMR_MASK_ALL 0xFFFFFFFF #define LPFC_ISCR_CLEAR_ALL 0xFFFFFFFF @@ -1147,10 +1140,7 @@ struct sli4_sge { /* SLI-4 */ this flag !! */ #define lpfc_sli4_sge_last_MASK 0x00000001 #define lpfc_sli4_sge_last_WORD word2 - uint32_t word3; -#define lpfc_sli4_sge_len_SHIFT 0 -#define lpfc_sli4_sge_len_MASK 0x0001FFFF -#define lpfc_sli4_sge_len_WORD word3 + uint32_t sge_len; }; struct fcf_record { diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c index 948eb49..5967d41 100644 --- a/drivers/scsi/lpfc/lpfc_init.c +++ b/drivers/scsi/lpfc/lpfc_init.c @@ -2451,7 +2451,10 @@ lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev) shost->this_id = -1; shost->max_cmd_len = 16; if (phba->sli_rev == LPFC_SLI_REV4) { - shost->dma_boundary = LPFC_SLI4_MAX_SEGMENT_SIZE; + if (bf_get(lpfc_sli_intf_featurelevel1, + &phba->sli4_hba.sli_intf) == + LPFC_SLI_INTF_FEATERLEVEL1_1) + shost->dma_boundary = LPFC_SLI4_FL1_MAX_SEGMENT_SIZE; shost->sg_tablesize = phba->cfg_sg_seg_cnt; } @@ -3533,8 +3536,7 @@ static int lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) { struct lpfc_sli *psli; - int rc; - int i, hbq_count; + int rc, i, hbq_count, buf_size, dma_buf_size, max_buf_size; /* Before proceed, wait for POST done and device ready */ rc = lpfc_sli4_post_status_check(phba); @@ -3587,31 +3589,26 @@ lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) * used to create the sg_dma_buf_pool must be dynamically calculated. * 2 segments are added since the IOCB needs a command and response bde. * To insure that the scsi sgl does not cross a 4k page boundary only - * sgl sizes of 1k, 2k, 4k, and 8k are supported. - * Table of sgl sizes and seg_cnt: - * sgl size, sg_seg_cnt total seg - * 1k 50 52 - * 2k 114 116 - * 4k 242 244 - * 8k 498 500 - * cmd(32) + rsp(160) + (52 * sizeof(sli4_sge)) = 1024 - * cmd(32) + rsp(160) + (116 * sizeof(sli4_sge)) = 2048 - * cmd(32) + rsp(160) + (244 * sizeof(sli4_sge)) = 4096 - * cmd(32) + rsp(160) + (500 * sizeof(sli4_sge)) = 8192 + * sgl sizes of must be a power of 2. */ - if (phba->cfg_sg_seg_cnt <= LPFC_DEFAULT_SG_SEG_CNT) - phba->cfg_sg_seg_cnt = 50; - else if (phba->cfg_sg_seg_cnt <= 114) - phba->cfg_sg_seg_cnt = 114; - else if (phba->cfg_sg_seg_cnt <= 242) - phba->cfg_sg_seg_cnt = 242; + buf_size = (sizeof(struct fcp_cmnd) + sizeof(struct fcp_rsp) + + ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct sli4_sge))); + /* Feature Level 1 hardware is limited to 2 pages */ + if ((bf_get(lpfc_sli_intf_featurelevel1, &phba->sli4_hba.sli_intf) == + LPFC_SLI_INTF_FEATERLEVEL1_1)) + max_buf_size = LPFC_SLI4_FL1_MAX_BUF_SIZE; else - phba->cfg_sg_seg_cnt = 498; - - phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) - + sizeof(struct fcp_rsp); - phba->cfg_sg_dma_buf_size += - ((phba->cfg_sg_seg_cnt + 2) * sizeof(struct sli4_sge)); + max_buf_size = LPFC_SLI4_MAX_BUF_SIZE; + for (dma_buf_size = LPFC_SLI4_MIN_BUF_SIZE; + dma_buf_size < max_buf_size && buf_size > dma_buf_size; + dma_buf_size = dma_buf_size << 1) + ; + if (dma_buf_size == max_buf_size) + phba->cfg_sg_seg_cnt = (dma_buf_size - + sizeof(struct fcp_cmnd) - sizeof(struct fcp_rsp) - + (2 * sizeof(struct sli4_sge))) / + sizeof(struct sli4_sge); + phba->cfg_sg_dma_buf_size = dma_buf_size; /* Initialize buffer queue management fields */ hbq_count = lpfc_sli_hbq_count(); @@ -4658,7 +4655,7 @@ lpfc_sli_pci_mem_unset(struct lpfc_hba *phba) int lpfc_sli4_post_status_check(struct lpfc_hba *phba) { - struct lpfc_register sta_reg, uerrlo_reg, uerrhi_reg, scratchpad; + struct lpfc_register sta_reg, uerrlo_reg, uerrhi_reg; int i, port_error = -ENODEV; if (!phba->sli4_hba.STAregaddr) @@ -4694,14 +4691,21 @@ lpfc_sli4_post_status_check(struct lpfc_hba *phba) bf_get(lpfc_hst_state_port_status, &sta_reg)); /* Log device information */ - scratchpad.word0 = readl(phba->sli4_hba.SCRATCHPADregaddr); - lpfc_printf_log(phba, KERN_INFO, LOG_INIT, - "2534 Device Info: ChipType=0x%x, SliRev=0x%x, " - "FeatureL1=0x%x, FeatureL2=0x%x\n", - bf_get(lpfc_scratchpad_chiptype, &scratchpad), - bf_get(lpfc_scratchpad_slirev, &scratchpad), - bf_get(lpfc_scratchpad_featurelevel1, &scratchpad), - bf_get(lpfc_scratchpad_featurelevel2, &scratchpad)); + phba->sli4_hba.sli_intf.word0 = readl(phba->sli4_hba.SLIINTFregaddr); + if (bf_get(lpfc_sli_intf_valid, + &phba->sli4_hba.sli_intf) == LPFC_SLI_INTF_VALID) { + lpfc_printf_log(phba, KERN_INFO, LOG_INIT, + "2534 Device Info: ChipType=0x%x, SliRev=0x%x, " + "FeatureL1=0x%x, FeatureL2=0x%x\n", + bf_get(lpfc_sli_intf_sli_family, + &phba->sli4_hba.sli_intf), + bf_get(lpfc_sli_intf_slirev, + &phba->sli4_hba.sli_intf), + bf_get(lpfc_sli_intf_featurelevel1, + &phba->sli4_hba.sli_intf), + bf_get(lpfc_sli_intf_featurelevel2, + &phba->sli4_hba.sli_intf)); + } phba->sli4_hba.ue_mask_lo = readl(phba->sli4_hba.UEMASKLOregaddr); phba->sli4_hba.ue_mask_hi = readl(phba->sli4_hba.UEMASKHIregaddr); /* With uncoverable error, log the error message and return error */ @@ -4740,8 +4744,8 @@ lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba) LPFC_UE_MASK_LO; phba->sli4_hba.UEMASKHIregaddr = phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI; - phba->sli4_hba.SCRATCHPADregaddr = phba->sli4_hba.conf_regs_memmap_p + - LPFC_SCRATCHPAD; + phba->sli4_hba.SLIINTFregaddr = phba->sli4_hba.conf_regs_memmap_p + + LPFC_SLI_INTF; } /** @@ -8003,11 +8007,11 @@ lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid) return -EPERM; } - if (pci_read_config_dword(pdev, LPFC_SLIREV_CONF_WORD, &intf.word0)) + if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0)) return -ENODEV; if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) && - (bf_get(lpfc_sli_intf_rev, &intf) == LPFC_SLIREV_CONF_SLI4)) + (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4)) rc = lpfc_pci_probe_one_s4(pdev, pid); else rc = lpfc_pci_probe_one_s3(pdev, pid); diff --git a/drivers/scsi/lpfc/lpfc_scsi.c b/drivers/scsi/lpfc/lpfc_scsi.c index 8340b7a..f190216 100644 --- a/drivers/scsi/lpfc/lpfc_scsi.c +++ b/drivers/scsi/lpfc/lpfc_scsi.c @@ -720,19 +720,17 @@ lpfc_new_scsi_buf_s4(struct lpfc_vport *vport, int num_to_alloc) */ sgl->addr_hi = cpu_to_le32(putPaddrHigh(pdma_phys_fcp_cmd)); sgl->addr_lo = cpu_to_le32(putPaddrLow(pdma_phys_fcp_cmd)); - bf_set(lpfc_sli4_sge_len, sgl, sizeof(struct fcp_cmnd)); bf_set(lpfc_sli4_sge_last, sgl, 0); sgl->word2 = cpu_to_le32(sgl->word2); - sgl->word3 = cpu_to_le32(sgl->word3); + sgl->sge_len = cpu_to_le32(sizeof(struct fcp_cmnd)); sgl++; /* Setup the physical region for the FCP RSP */ sgl->addr_hi = cpu_to_le32(putPaddrHigh(pdma_phys_fcp_rsp)); sgl->addr_lo = cpu_to_le32(putPaddrLow(pdma_phys_fcp_rsp)); - bf_set(lpfc_sli4_sge_len, sgl, sizeof(struct fcp_rsp)); bf_set(lpfc_sli4_sge_last, sgl, 1); sgl->word2 = cpu_to_le32(sgl->word2); - sgl->word3 = cpu_to_le32(sgl->word3); + sgl->sge_len = cpu_to_le32(sizeof(struct fcp_rsp)); /* * Since the IOCB for the FCP I/O is built into this @@ -1108,7 +1106,6 @@ lpfc_scsi_prep_dma_buf_s4(struct lpfc_hba *phba, struct lpfc_scsi_buf *lpfc_cmd) for (num_bde = 0; num_bde < nseg;) { physaddr = sg_dma_address(sgel); dma_len = sg_dma_len(sgel); - bf_set(lpfc_sli4_sge_len, sgl, sg_dma_len(sgel)); sgl->addr_lo = cpu_to_le32(putPaddrLow(physaddr)); sgl->addr_hi = cpu_to_le32(putPaddrHigh(physaddr)); if ((num_bde + 1) == nseg) @@ -1117,7 +1114,7 @@ lpfc_scsi_prep_dma_buf_s4(struct lpfc_hba *phba, struct lpfc_scsi_buf *lpfc_cmd) bf_set(lpfc_sli4_sge_last, sgl, 0); bf_set(lpfc_sli4_sge_offset, sgl, dma_offset); sgl->word2 = cpu_to_le32(sgl->word2); - sgl->word3 = cpu_to_le32(sgl->word3); + sgl->sge_len = cpu_to_le32(dma_len); dma_offset += dma_len; sgl++; sgel++; diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c index 4607e60..2700429 100644 --- a/drivers/scsi/lpfc/lpfc_sli.c +++ b/drivers/scsi/lpfc/lpfc_sli.c @@ -5748,19 +5748,19 @@ lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq, for (i = 0; i < numBdes; i++) { /* Should already be byte swapped. */ - sgl->addr_hi = bpl->addrHigh; - sgl->addr_lo = bpl->addrLow; - /* swap the size field back to the cpu so we - * can assign it to the sgl. - */ - bde.tus.w = le32_to_cpu(bpl->tus.w); - bf_set(lpfc_sli4_sge_len, sgl, bde.tus.f.bdeSize); + sgl->addr_hi = bpl->addrHigh; + sgl->addr_lo = bpl->addrLow; + if ((i+1) == numBdes) bf_set(lpfc_sli4_sge_last, sgl, 1); else bf_set(lpfc_sli4_sge_last, sgl, 0); sgl->word2 = cpu_to_le32(sgl->word2); - sgl->word3 = cpu_to_le32(sgl->word3); + /* swap the size field back to the cpu so we + * can assign it to the sgl. + */ + bde.tus.w = le32_to_cpu(bpl->tus.w); + sgl->sge_len = cpu_to_le32(bde.tus.f.bdeSize); bpl++; sgl++; } @@ -5773,11 +5773,10 @@ lpfc_sli4_bpl2sgl(struct lpfc_hba *phba, struct lpfc_iocbq *piocbq, cpu_to_le32(icmd->un.genreq64.bdl.addrHigh); sgl->addr_lo = cpu_to_le32(icmd->un.genreq64.bdl.addrLow); - bf_set(lpfc_sli4_sge_len, sgl, - icmd->un.genreq64.bdl.bdeSize); bf_set(lpfc_sli4_sge_last, sgl, 1); sgl->word2 = cpu_to_le32(sgl->word2); - sgl->word3 = cpu_to_le32(sgl->word3); + sgl->sge_len = + cpu_to_le32(icmd->un.genreq64.bdl.bdeSize); } return sglq->sli4_xritag; } diff --git a/drivers/scsi/lpfc/lpfc_sli4.h b/drivers/scsi/lpfc/lpfc_sli4.h index 1366d48..648dd5d 100644 --- a/drivers/scsi/lpfc/lpfc_sli4.h +++ b/drivers/scsi/lpfc/lpfc_sli4.h @@ -248,7 +248,10 @@ struct lpfc_bmbx { #define SLI4_CT_VFI 2 #define SLI4_CT_FCFI 3 -#define LPFC_SLI4_MAX_SEGMENT_SIZE 0x10000 +#define LPFC_SLI4_FL1_MAX_SEGMENT_SIZE 0x10000 +#define LPFC_SLI4_FL1_MAX_BUF_SIZE 0X2000 +#define LPFC_SLI4_MIN_BUF_SIZE 0x400 +#define LPFC_SLI4_MAX_BUF_SIZE 0x20000 /* * SLI4 specific data structures @@ -295,7 +298,7 @@ struct lpfc_sli4_hba { void __iomem *UERRHIregaddr; /* Address to UERR_STATUS_HI register */ void __iomem *UEMASKLOregaddr; /* Address to UE_MASK_LO register */ void __iomem *UEMASKHIregaddr; /* Address to UE_MASK_HI register */ - void __iomem *SCRATCHPADregaddr; /* Address to scratchpad register */ + void __iomem *SLIINTFregaddr; /* Address to SLI_INTF register */ /* BAR1 FCoE function CSR register memory map */ void __iomem *STAregaddr; /* Address to HST_STATE register */ void __iomem *ISRregaddr; /* Address to HST_ISR register */ @@ -310,6 +313,7 @@ struct lpfc_sli4_hba { uint32_t ue_mask_lo; uint32_t ue_mask_hi; + struct lpfc_register sli_intf; struct msix_entry *msix_entries; uint32_t cfg_eqn; struct lpfc_fcp_eq_hdl *fcp_eq_hdl; /* FCP per-WQ handle */