From: George Beshers <gbeshers@redhat.com> Date: Thu, 31 Jul 2008 15:33:34 -0400 Subject: [IA64] Force error to surface in nofault code Message-id: 20080731192739.4411.10534.sendpatchset@dhcp-100-2-194.bos.redhat.com O-Subject: [RHEL5.3 PATCH 11/19] [IA64] Force error to surface in nofault code Bugzilla: 455308 RH-Acked-by: Prarit Bhargava <prarit@redhat.com> [patch] Force error to surface in nofault code BZ#455308 Upstream: http://git.kernel.org/?p=linux/kernel/git/aegl/linux-2.6.git;a=commitdiff;h=45d9ca492e4bd1522d1b5bd125c2908f1cee3d4a Montecito behaves slightly differently than previous processors, resulting in the MCA due to a failed PIO read to sometimes surfacing outside the nofault code. Adding an additional or and stop bits ensures the MCA surfaces in the nofault code. Signed-off-by: Russ Anderson <rja@sgi.com> diff --git a/arch/ia64/sn/kernel/xp_nofault.S b/arch/ia64/sn/kernel/xp_nofault.S index b772543..6472ad5 100644 --- a/arch/ia64/sn/kernel/xp_nofault.S +++ b/arch/ia64/sn/kernel/xp_nofault.S @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2004-2005 Silicon Graphics, Inc. All Rights Reserved. + * Copyright (c) 2004-2007 Silicon Graphics, Inc. All Rights Reserved. */ @@ -14,6 +14,10 @@ * PIO read fails, the MCA handler will force the error to look * corrected and vector to the xp_error_PIOR which will return an error. * + * The definition of "consumption" and the time it takes for an MCA + * to surface is processor implementation specific. This code + * may need to be adjusted for future processor implementations. + * * extern int xp_nofault_PIOR(void *remote_register); */ @@ -21,7 +25,8 @@ xp_nofault_PIOR: mov r8=r0 // Stage a success return value ld8.acq r9=[r32];; // PIO Read the specified register - adds r9=1,r9 // Add to force a consume + adds r9=1,r9;; // Add to force a consume + srlz.i;; // Allow time for MCA to surface br.ret.sptk.many b0;; // Return success .global xp_error_PIOR